jbt_reg_write_1   170 drivers/gpu/drm/panel/panel-tpo-td028ttec1.c 	jbt_reg_write_1(lcd, JBT_REG_POWER_ON_OFF, 0x17, &ret);
jbt_reg_write_1   173 drivers/gpu/drm/panel/panel-tpo-td028ttec1.c 	jbt_reg_write_1(lcd, JBT_REG_DISPLAY_MODE, 0x80, &ret);
jbt_reg_write_1   176 drivers/gpu/drm/panel/panel-tpo-td028ttec1.c 	jbt_reg_write_1(lcd, JBT_REG_QUAD_RATE, 0x00, &ret);
jbt_reg_write_1   179 drivers/gpu/drm/panel/panel-tpo-td028ttec1.c 	jbt_reg_write_1(lcd, JBT_REG_POWER_ON_OFF, 0x16, &ret);
jbt_reg_write_1   190 drivers/gpu/drm/panel/panel-tpo-td028ttec1.c 	jbt_reg_write_1(lcd, JBT_REG_DISPLAY_MODE1, 0x01, &ret);
jbt_reg_write_1   191 drivers/gpu/drm/panel/panel-tpo-td028ttec1.c 	jbt_reg_write_1(lcd, JBT_REG_DISPLAY_MODE2, 0x00, &ret);
jbt_reg_write_1   192 drivers/gpu/drm/panel/panel-tpo-td028ttec1.c 	jbt_reg_write_1(lcd, JBT_REG_RGB_FORMAT, 0x60, &ret);
jbt_reg_write_1   193 drivers/gpu/drm/panel/panel-tpo-td028ttec1.c 	jbt_reg_write_1(lcd, JBT_REG_DRIVE_SYSTEM, 0x10, &ret);
jbt_reg_write_1   194 drivers/gpu/drm/panel/panel-tpo-td028ttec1.c 	jbt_reg_write_1(lcd, JBT_REG_BOOSTER_OP, 0x56, &ret);
jbt_reg_write_1   195 drivers/gpu/drm/panel/panel-tpo-td028ttec1.c 	jbt_reg_write_1(lcd, JBT_REG_BOOSTER_MODE, 0x33, &ret);
jbt_reg_write_1   196 drivers/gpu/drm/panel/panel-tpo-td028ttec1.c 	jbt_reg_write_1(lcd, JBT_REG_BOOSTER_FREQ, 0x11, &ret);
jbt_reg_write_1   197 drivers/gpu/drm/panel/panel-tpo-td028ttec1.c 	jbt_reg_write_1(lcd, JBT_REG_BOOSTER_FREQ, 0x11, &ret);
jbt_reg_write_1   198 drivers/gpu/drm/panel/panel-tpo-td028ttec1.c 	jbt_reg_write_1(lcd, JBT_REG_OPAMP_SYSCLK, 0x02, &ret);
jbt_reg_write_1   199 drivers/gpu/drm/panel/panel-tpo-td028ttec1.c 	jbt_reg_write_1(lcd, JBT_REG_VSC_VOLTAGE, 0x2b, &ret);
jbt_reg_write_1   200 drivers/gpu/drm/panel/panel-tpo-td028ttec1.c 	jbt_reg_write_1(lcd, JBT_REG_VCOM_VOLTAGE, 0x40, &ret);
jbt_reg_write_1   201 drivers/gpu/drm/panel/panel-tpo-td028ttec1.c 	jbt_reg_write_1(lcd, JBT_REG_EXT_DISPL, 0x03, &ret);
jbt_reg_write_1   202 drivers/gpu/drm/panel/panel-tpo-td028ttec1.c 	jbt_reg_write_1(lcd, JBT_REG_DCCLK_DCEV, 0x04, &ret);
jbt_reg_write_1   207 drivers/gpu/drm/panel/panel-tpo-td028ttec1.c 	jbt_reg_write_1(lcd, JBT_REG_ASW_SLEW, 0x04, &ret);
jbt_reg_write_1   208 drivers/gpu/drm/panel/panel-tpo-td028ttec1.c 	jbt_reg_write_1(lcd, JBT_REG_DUMMY_DISPLAY, 0x00, &ret);
jbt_reg_write_1   210 drivers/gpu/drm/panel/panel-tpo-td028ttec1.c 	jbt_reg_write_1(lcd, JBT_REG_SLEEP_OUT_FR_A, 0x11, &ret);
jbt_reg_write_1   211 drivers/gpu/drm/panel/panel-tpo-td028ttec1.c 	jbt_reg_write_1(lcd, JBT_REG_SLEEP_OUT_FR_B, 0x11, &ret);
jbt_reg_write_1   212 drivers/gpu/drm/panel/panel-tpo-td028ttec1.c 	jbt_reg_write_1(lcd, JBT_REG_SLEEP_OUT_FR_C, 0x11, &ret);
jbt_reg_write_1   219 drivers/gpu/drm/panel/panel-tpo-td028ttec1.c 	jbt_reg_write_1(lcd, JBT_REG_GAMMA1_FINE_2, 0x00, &ret);
jbt_reg_write_1   220 drivers/gpu/drm/panel/panel-tpo-td028ttec1.c 	jbt_reg_write_1(lcd, JBT_REG_GAMMA1_INCLINATION, 0x00, &ret);
jbt_reg_write_1   221 drivers/gpu/drm/panel/panel-tpo-td028ttec1.c 	jbt_reg_write_1(lcd, JBT_REG_GAMMA1_BLUE_OFFSET, 0x00, &ret);
jbt_reg_write_1   224 drivers/gpu/drm/panel/panel-tpo-td028ttec1.c 	jbt_reg_write_1(lcd, JBT_REG_BLANK_CONTROL, 0x02, &ret);
jbt_reg_write_1   227 drivers/gpu/drm/panel/panel-tpo-td028ttec1.c 	jbt_reg_write_1(lcd, JBT_REG_CKV_ON_OFF, 0x01, &ret);
jbt_reg_write_1   232 drivers/gpu/drm/panel/panel-tpo-td028ttec1.c 	jbt_reg_write_1(lcd, JBT_REG_ASW_TIMING_2, 0x0e, &ret);
jbt_reg_write_1   268 drivers/gpu/drm/panel/panel-tpo-td028ttec1.c 	jbt_reg_write_1(lcd, JBT_REG_POWER_ON_OFF, 0x00, NULL);
jbt_reg_write_1   222 drivers/video/fbdev/omap2/omapfb/displays/panel-tpo-td028ttec1.c 	r |= jbt_reg_write_1(ddata, JBT_REG_POWER_ON_OFF, 0x17);
jbt_reg_write_1   225 drivers/video/fbdev/omap2/omapfb/displays/panel-tpo-td028ttec1.c 	r |= jbt_reg_write_1(ddata, JBT_REG_DISPLAY_MODE, 0x80);
jbt_reg_write_1   228 drivers/video/fbdev/omap2/omapfb/displays/panel-tpo-td028ttec1.c 	r |= jbt_reg_write_1(ddata, JBT_REG_QUAD_RATE, 0x00);
jbt_reg_write_1   231 drivers/video/fbdev/omap2/omapfb/displays/panel-tpo-td028ttec1.c 	r |= jbt_reg_write_1(ddata, JBT_REG_POWER_ON_OFF, 0x16);
jbt_reg_write_1   242 drivers/video/fbdev/omap2/omapfb/displays/panel-tpo-td028ttec1.c 	r |= jbt_reg_write_1(ddata, JBT_REG_DISPLAY_MODE1, 0x01);
jbt_reg_write_1   243 drivers/video/fbdev/omap2/omapfb/displays/panel-tpo-td028ttec1.c 	r |= jbt_reg_write_1(ddata, JBT_REG_DISPLAY_MODE2, 0x00);
jbt_reg_write_1   244 drivers/video/fbdev/omap2/omapfb/displays/panel-tpo-td028ttec1.c 	r |= jbt_reg_write_1(ddata, JBT_REG_RGB_FORMAT, 0x60);
jbt_reg_write_1   245 drivers/video/fbdev/omap2/omapfb/displays/panel-tpo-td028ttec1.c 	r |= jbt_reg_write_1(ddata, JBT_REG_DRIVE_SYSTEM, 0x10);
jbt_reg_write_1   246 drivers/video/fbdev/omap2/omapfb/displays/panel-tpo-td028ttec1.c 	r |= jbt_reg_write_1(ddata, JBT_REG_BOOSTER_OP, 0x56);
jbt_reg_write_1   247 drivers/video/fbdev/omap2/omapfb/displays/panel-tpo-td028ttec1.c 	r |= jbt_reg_write_1(ddata, JBT_REG_BOOSTER_MODE, 0x33);
jbt_reg_write_1   248 drivers/video/fbdev/omap2/omapfb/displays/panel-tpo-td028ttec1.c 	r |= jbt_reg_write_1(ddata, JBT_REG_BOOSTER_FREQ, 0x11);
jbt_reg_write_1   249 drivers/video/fbdev/omap2/omapfb/displays/panel-tpo-td028ttec1.c 	r |= jbt_reg_write_1(ddata, JBT_REG_BOOSTER_FREQ, 0x11);
jbt_reg_write_1   250 drivers/video/fbdev/omap2/omapfb/displays/panel-tpo-td028ttec1.c 	r |= jbt_reg_write_1(ddata, JBT_REG_OPAMP_SYSCLK, 0x02);
jbt_reg_write_1   251 drivers/video/fbdev/omap2/omapfb/displays/panel-tpo-td028ttec1.c 	r |= jbt_reg_write_1(ddata, JBT_REG_VSC_VOLTAGE, 0x2b);
jbt_reg_write_1   252 drivers/video/fbdev/omap2/omapfb/displays/panel-tpo-td028ttec1.c 	r |= jbt_reg_write_1(ddata, JBT_REG_VCOM_VOLTAGE, 0x40);
jbt_reg_write_1   253 drivers/video/fbdev/omap2/omapfb/displays/panel-tpo-td028ttec1.c 	r |= jbt_reg_write_1(ddata, JBT_REG_EXT_DISPL, 0x03);
jbt_reg_write_1   254 drivers/video/fbdev/omap2/omapfb/displays/panel-tpo-td028ttec1.c 	r |= jbt_reg_write_1(ddata, JBT_REG_DCCLK_DCEV, 0x04);
jbt_reg_write_1   259 drivers/video/fbdev/omap2/omapfb/displays/panel-tpo-td028ttec1.c 	r |= jbt_reg_write_1(ddata, JBT_REG_ASW_SLEW, 0x04);
jbt_reg_write_1   260 drivers/video/fbdev/omap2/omapfb/displays/panel-tpo-td028ttec1.c 	r |= jbt_reg_write_1(ddata, JBT_REG_DUMMY_DISPLAY, 0x00);
jbt_reg_write_1   262 drivers/video/fbdev/omap2/omapfb/displays/panel-tpo-td028ttec1.c 	r |= jbt_reg_write_1(ddata, JBT_REG_SLEEP_OUT_FR_A, 0x11);
jbt_reg_write_1   263 drivers/video/fbdev/omap2/omapfb/displays/panel-tpo-td028ttec1.c 	r |= jbt_reg_write_1(ddata, JBT_REG_SLEEP_OUT_FR_B, 0x11);
jbt_reg_write_1   264 drivers/video/fbdev/omap2/omapfb/displays/panel-tpo-td028ttec1.c 	r |= jbt_reg_write_1(ddata, JBT_REG_SLEEP_OUT_FR_C, 0x11);
jbt_reg_write_1   271 drivers/video/fbdev/omap2/omapfb/displays/panel-tpo-td028ttec1.c 	r |= jbt_reg_write_1(ddata, JBT_REG_GAMMA1_FINE_2, 0x00);
jbt_reg_write_1   272 drivers/video/fbdev/omap2/omapfb/displays/panel-tpo-td028ttec1.c 	r |= jbt_reg_write_1(ddata, JBT_REG_GAMMA1_INCLINATION, 0x00);
jbt_reg_write_1   273 drivers/video/fbdev/omap2/omapfb/displays/panel-tpo-td028ttec1.c 	r |= jbt_reg_write_1(ddata, JBT_REG_GAMMA1_BLUE_OFFSET, 0x00);
jbt_reg_write_1   276 drivers/video/fbdev/omap2/omapfb/displays/panel-tpo-td028ttec1.c 	r |= jbt_reg_write_1(ddata, JBT_REG_BLANK_CONTROL, 0x02);
jbt_reg_write_1   279 drivers/video/fbdev/omap2/omapfb/displays/panel-tpo-td028ttec1.c 	r |= jbt_reg_write_1(ddata, JBT_REG_CKV_ON_OFF, 0x01);
jbt_reg_write_1   284 drivers/video/fbdev/omap2/omapfb/displays/panel-tpo-td028ttec1.c 	r |= jbt_reg_write_1(ddata, JBT_REG_ASW_TIMING_2, 0x0e);
jbt_reg_write_1   308 drivers/video/fbdev/omap2/omapfb/displays/panel-tpo-td028ttec1.c 	jbt_reg_write_1(ddata, JBT_REG_POWER_ON_OFF, 0x00);