ixDIDT_SQ_EDC_CTRL 502 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__EDC_EN_MASK, DIDT_SQ_EDC_CTRL__EDC_EN__SHIFT, 0x0000 }, ixDIDT_SQ_EDC_CTRL 503 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__EDC_SW_RST_MASK, DIDT_SQ_EDC_CTRL__EDC_SW_RST__SHIFT, 0x0001 }, ixDIDT_SQ_EDC_CTRL 504 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__EDC_CLK_EN_OVERRIDE_MASK, DIDT_SQ_EDC_CTRL__EDC_CLK_EN_OVERRIDE__SHIFT, 0x0000 }, ixDIDT_SQ_EDC_CTRL 505 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__EDC_FORCE_STALL_MASK, DIDT_SQ_EDC_CTRL__EDC_FORCE_STALL__SHIFT, 0x0000 }, ixDIDT_SQ_EDC_CTRL 506 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__EDC_TRIGGER_THROTTLE_LOWBIT_MASK, DIDT_SQ_EDC_CTRL__EDC_TRIGGER_THROTTLE_LOWBIT__SHIFT, 0x0000 }, ixDIDT_SQ_EDC_CTRL 507 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__EDC_STALL_PATTERN_BIT_NUMS_MASK, DIDT_SQ_EDC_CTRL__EDC_STALL_PATTERN_BIT_NUMS__SHIFT, 0x0000 }, ixDIDT_SQ_EDC_CTRL 508 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__EDC_ALLOW_WRITE_PWRDELTA_MASK, DIDT_SQ_EDC_CTRL__EDC_ALLOW_WRITE_PWRDELTA__SHIFT, 0x0000 }, ixDIDT_SQ_EDC_CTRL 509 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__GC_EDC_EN_MASK, DIDT_SQ_EDC_CTRL__GC_EDC_EN__SHIFT, 0x0000 }, ixDIDT_SQ_EDC_CTRL 510 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__GC_EDC_STALL_POLICY_MASK, DIDT_SQ_EDC_CTRL__GC_EDC_STALL_POLICY__SHIFT, 0x0000 }, ixDIDT_SQ_EDC_CTRL 511 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__GC_EDC_LEVEL_COMB_EN_MASK, DIDT_SQ_EDC_CTRL__GC_EDC_LEVEL_COMB_EN__SHIFT, 0x0000 }, ixDIDT_SQ_EDC_CTRL 512 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__SE_EDC_LEVEL_COMB_EN_MASK, DIDT_SQ_EDC_CTRL__SE_EDC_LEVEL_COMB_EN__SHIFT, 0x0000 }, ixDIDT_SQ_EDC_CTRL 524 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__EDC_EN_MASK, DIDT_SQ_EDC_CTRL__EDC_EN__SHIFT, 0x0001 }, ixDIDT_SQ_EDC_CTRL 525 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__EDC_SW_RST_MASK, DIDT_SQ_EDC_CTRL__EDC_SW_RST__SHIFT, 0x0000 }, ixDIDT_SQ_EDC_CTRL 526 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__EDC_CLK_EN_OVERRIDE_MASK, DIDT_SQ_EDC_CTRL__EDC_CLK_EN_OVERRIDE__SHIFT, 0x0000 }, ixDIDT_SQ_EDC_CTRL 527 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__EDC_FORCE_STALL_MASK, DIDT_SQ_EDC_CTRL__EDC_FORCE_STALL__SHIFT, 0x0000 }, ixDIDT_SQ_EDC_CTRL 528 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__EDC_TRIGGER_THROTTLE_LOWBIT_MASK, DIDT_SQ_EDC_CTRL__EDC_TRIGGER_THROTTLE_LOWBIT__SHIFT, 0x0004 }, ixDIDT_SQ_EDC_CTRL 529 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__EDC_STALL_PATTERN_BIT_NUMS_MASK, DIDT_SQ_EDC_CTRL__EDC_STALL_PATTERN_BIT_NUMS__SHIFT, 0x0006 }, ixDIDT_SQ_EDC_CTRL 530 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__EDC_ALLOW_WRITE_PWRDELTA_MASK, DIDT_SQ_EDC_CTRL__EDC_ALLOW_WRITE_PWRDELTA__SHIFT, 0x0000 }, ixDIDT_SQ_EDC_CTRL 531 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__GC_EDC_EN_MASK, DIDT_SQ_EDC_CTRL__GC_EDC_EN__SHIFT, 0x0000 }, ixDIDT_SQ_EDC_CTRL 532 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__GC_EDC_STALL_POLICY_MASK, DIDT_SQ_EDC_CTRL__GC_EDC_STALL_POLICY__SHIFT, 0x0000 }, ixDIDT_SQ_EDC_CTRL 533 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__GC_EDC_LEVEL_COMB_EN_MASK, DIDT_SQ_EDC_CTRL__GC_EDC_LEVEL_COMB_EN__SHIFT, 0x0001 }, ixDIDT_SQ_EDC_CTRL 534 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__SE_EDC_LEVEL_COMB_EN_MASK, DIDT_SQ_EDC_CTRL__SE_EDC_LEVEL_COMB_EN__SHIFT, 0x0000 }, ixDIDT_SQ_EDC_CTRL 546 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__EDC_EN_MASK, DIDT_SQ_EDC_CTRL__EDC_EN__SHIFT, 0x0000 }, ixDIDT_SQ_EDC_CTRL 547 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__EDC_SW_RST_MASK, DIDT_SQ_EDC_CTRL__EDC_SW_RST__SHIFT, 0x0000 }, ixDIDT_SQ_EDC_CTRL 548 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__EDC_CLK_EN_OVERRIDE_MASK, DIDT_SQ_EDC_CTRL__EDC_CLK_EN_OVERRIDE__SHIFT, 0x0000 }, ixDIDT_SQ_EDC_CTRL 549 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__EDC_FORCE_STALL_MASK, DIDT_SQ_EDC_CTRL__EDC_FORCE_STALL__SHIFT, 0x0001 }, ixDIDT_SQ_EDC_CTRL 550 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__EDC_TRIGGER_THROTTLE_LOWBIT_MASK, DIDT_SQ_EDC_CTRL__EDC_TRIGGER_THROTTLE_LOWBIT__SHIFT, 0x0001 }, ixDIDT_SQ_EDC_CTRL 551 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__EDC_STALL_PATTERN_BIT_NUMS_MASK, DIDT_SQ_EDC_CTRL__EDC_STALL_PATTERN_BIT_NUMS__SHIFT, 0x000C }, ixDIDT_SQ_EDC_CTRL 552 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__EDC_ALLOW_WRITE_PWRDELTA_MASK, DIDT_SQ_EDC_CTRL__EDC_ALLOW_WRITE_PWRDELTA__SHIFT, 0x0000 }, ixDIDT_SQ_EDC_CTRL 553 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__GC_EDC_EN_MASK, DIDT_SQ_EDC_CTRL__GC_EDC_EN__SHIFT, 0x0000 }, ixDIDT_SQ_EDC_CTRL 554 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__GC_EDC_STALL_POLICY_MASK, DIDT_SQ_EDC_CTRL__GC_EDC_STALL_POLICY__SHIFT, 0x0000 }, ixDIDT_SQ_EDC_CTRL 555 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__GC_EDC_LEVEL_COMB_EN_MASK, DIDT_SQ_EDC_CTRL__GC_EDC_LEVEL_COMB_EN__SHIFT, 0x0000 }, ixDIDT_SQ_EDC_CTRL 556 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__SE_EDC_LEVEL_COMB_EN_MASK, DIDT_SQ_EDC_CTRL__SE_EDC_LEVEL_COMB_EN__SHIFT, 0x0001 }, ixDIDT_SQ_EDC_CTRL 673 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__EDC_EN_MASK, DIDT_SQ_EDC_CTRL__EDC_EN__SHIFT, 0x0000 }, ixDIDT_SQ_EDC_CTRL 674 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__EDC_SW_RST_MASK, DIDT_SQ_EDC_CTRL__EDC_SW_RST__SHIFT, 0x0001 }, ixDIDT_SQ_EDC_CTRL 675 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__EDC_CLK_EN_OVERRIDE_MASK, DIDT_SQ_EDC_CTRL__EDC_CLK_EN_OVERRIDE__SHIFT, 0x0000 }, ixDIDT_SQ_EDC_CTRL 676 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__EDC_FORCE_STALL_MASK, DIDT_SQ_EDC_CTRL__EDC_FORCE_STALL__SHIFT, 0x0000 }, ixDIDT_SQ_EDC_CTRL 677 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__EDC_TRIGGER_THROTTLE_LOWBIT_MASK, DIDT_SQ_EDC_CTRL__EDC_TRIGGER_THROTTLE_LOWBIT__SHIFT, 0x0000 }, ixDIDT_SQ_EDC_CTRL 678 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__EDC_STALL_PATTERN_BIT_NUMS_MASK, DIDT_SQ_EDC_CTRL__EDC_STALL_PATTERN_BIT_NUMS__SHIFT, 0x0000 }, ixDIDT_SQ_EDC_CTRL 679 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__EDC_ALLOW_WRITE_PWRDELTA_MASK, DIDT_SQ_EDC_CTRL__EDC_ALLOW_WRITE_PWRDELTA__SHIFT, 0x0000 }, ixDIDT_SQ_EDC_CTRL 680 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__GC_EDC_EN_MASK, DIDT_SQ_EDC_CTRL__GC_EDC_EN__SHIFT, 0x0000 }, ixDIDT_SQ_EDC_CTRL 681 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__GC_EDC_STALL_POLICY_MASK, DIDT_SQ_EDC_CTRL__GC_EDC_STALL_POLICY__SHIFT, 0x0000 }, ixDIDT_SQ_EDC_CTRL 682 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__GC_EDC_LEVEL_COMB_EN_MASK, DIDT_SQ_EDC_CTRL__GC_EDC_LEVEL_COMB_EN__SHIFT, 0x0000 }, ixDIDT_SQ_EDC_CTRL 683 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__SE_EDC_LEVEL_COMB_EN_MASK, DIDT_SQ_EDC_CTRL__SE_EDC_LEVEL_COMB_EN__SHIFT, 0x0000 }, ixDIDT_SQ_EDC_CTRL 695 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__EDC_EN_MASK, DIDT_SQ_EDC_CTRL__EDC_EN__SHIFT, 0x0001 }, ixDIDT_SQ_EDC_CTRL 696 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__EDC_SW_RST_MASK, DIDT_SQ_EDC_CTRL__EDC_SW_RST__SHIFT, 0x0000 }, ixDIDT_SQ_EDC_CTRL 697 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__EDC_CLK_EN_OVERRIDE_MASK, DIDT_SQ_EDC_CTRL__EDC_CLK_EN_OVERRIDE__SHIFT, 0x0000 }, ixDIDT_SQ_EDC_CTRL 698 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__EDC_FORCE_STALL_MASK, DIDT_SQ_EDC_CTRL__EDC_FORCE_STALL__SHIFT, 0x0000 }, ixDIDT_SQ_EDC_CTRL 699 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__EDC_TRIGGER_THROTTLE_LOWBIT_MASK, DIDT_SQ_EDC_CTRL__EDC_TRIGGER_THROTTLE_LOWBIT__SHIFT, 0x0000 }, ixDIDT_SQ_EDC_CTRL 700 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__EDC_STALL_PATTERN_BIT_NUMS_MASK, DIDT_SQ_EDC_CTRL__EDC_STALL_PATTERN_BIT_NUMS__SHIFT, 0x000E }, ixDIDT_SQ_EDC_CTRL 701 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__EDC_ALLOW_WRITE_PWRDELTA_MASK, DIDT_SQ_EDC_CTRL__EDC_ALLOW_WRITE_PWRDELTA__SHIFT, 0x0000 }, ixDIDT_SQ_EDC_CTRL 702 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__GC_EDC_EN_MASK, DIDT_SQ_EDC_CTRL__GC_EDC_EN__SHIFT, 0x0001 }, ixDIDT_SQ_EDC_CTRL 703 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__GC_EDC_STALL_POLICY_MASK, DIDT_SQ_EDC_CTRL__GC_EDC_STALL_POLICY__SHIFT, 0x0003 }, ixDIDT_SQ_EDC_CTRL 704 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__GC_EDC_LEVEL_COMB_EN_MASK, DIDT_SQ_EDC_CTRL__GC_EDC_LEVEL_COMB_EN__SHIFT, 0x0001 }, ixDIDT_SQ_EDC_CTRL 705 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c { ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__SE_EDC_LEVEL_COMB_EN_MASK, DIDT_SQ_EDC_CTRL__SE_EDC_LEVEL_COMB_EN__SHIFT, 0x0000 }, ixDIDT_SQ_EDC_CTRL 891 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c data = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__DIDT, ixDIDT_SQ_EDC_CTRL); ixDIDT_SQ_EDC_CTRL 894 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c cgs_write_ind_register(hwmgr->device, CGS_IND_REG__DIDT, ixDIDT_SQ_EDC_CTRL, data);