ipu_cm_read        49 drivers/gpu/ipu-v3/ipu-common.c 	val = ipu_cm_read(ipu, IPU_SRM_PRI2);
ipu_cm_read       345 drivers/gpu/ipu-v3/ipu-common.c 	reg = ipu_cm_read(ipu, IPU_CHA_DB_MODE_SEL(channel->num));
ipu_cm_read       442 drivers/gpu/ipu-v3/ipu-common.c 	val = ipu_cm_read(ipu, IPU_DISP_GEN);
ipu_cm_read       451 drivers/gpu/ipu-v3/ipu-common.c 	val = ipu_cm_read(ipu, IPU_CONF);
ipu_cm_read       468 drivers/gpu/ipu-v3/ipu-common.c 	val = ipu_cm_read(ipu, IPU_CONF);
ipu_cm_read       472 drivers/gpu/ipu-v3/ipu-common.c 	val = ipu_cm_read(ipu, IPU_DISP_GEN);
ipu_cm_read       492 drivers/gpu/ipu-v3/ipu-common.c 	return (ipu_cm_read(ipu, IPU_CHA_CUR_BUF(chno)) & idma_mask(chno)) ? 1 : 0;
ipu_cm_read       505 drivers/gpu/ipu-v3/ipu-common.c 		reg = ipu_cm_read(ipu, IPU_CHA_BUF0_RDY(channel->num));
ipu_cm_read       508 drivers/gpu/ipu-v3/ipu-common.c 		reg = ipu_cm_read(ipu, IPU_CHA_BUF1_RDY(channel->num));
ipu_cm_read       511 drivers/gpu/ipu-v3/ipu-common.c 		reg = ipu_cm_read(ipu, IPU_CHA_BUF2_RDY(channel->num));
ipu_cm_read       625 drivers/gpu/ipu-v3/ipu-common.c 	if (ipu_cm_read(ipu, IPU_CHA_BUF0_RDY(channel->num)) &
ipu_cm_read       631 drivers/gpu/ipu-v3/ipu-common.c 	if (ipu_cm_read(ipu, IPU_CHA_BUF1_RDY(channel->num)) &
ipu_cm_read       640 drivers/gpu/ipu-v3/ipu-common.c 	val = ipu_cm_read(ipu, IPU_CHA_DB_MODE_SEL(channel->num));
ipu_cm_read       682 drivers/gpu/ipu-v3/ipu-common.c 	while (ipu_cm_read(ipu, IPU_MEM_RST) & 0x80000000) {
ipu_cm_read       705 drivers/gpu/ipu-v3/ipu-common.c 	val = ipu_cm_read(ipu, IPU_CONF);
ipu_cm_read       726 drivers/gpu/ipu-v3/ipu-common.c 	val = ipu_cm_read(ipu, IPU_CONF);
ipu_cm_read       810 drivers/gpu/ipu-v3/ipu-common.c 		src_reg = ipu_cm_read(ipu, link->src.reg);
ipu_cm_read       817 drivers/gpu/ipu-v3/ipu-common.c 		sink_reg = ipu_cm_read(ipu, link->sink.reg);
ipu_cm_read       844 drivers/gpu/ipu-v3/ipu-common.c 		src_reg = ipu_cm_read(ipu, link->src.reg);
ipu_cm_read       850 drivers/gpu/ipu-v3/ipu-common.c 		sink_reg = ipu_cm_read(ipu, link->sink.reg);
ipu_cm_read      1075 drivers/gpu/ipu-v3/ipu-common.c 		status = ipu_cm_read(ipu, IPU_INT_STAT(regs[i]));
ipu_cm_read      1076 drivers/gpu/ipu-v3/ipu-common.c 		status &= ipu_cm_read(ipu, IPU_INT_CTRL(regs[i]));
ipu_cm_read      1340 drivers/gpu/ipu-v3/ipu-common.c 		ipu_cm_read(ipu, IPU_CONF));
ipu_cm_read      1356 drivers/gpu/ipu-v3/ipu-common.c 		ipu_cm_read(ipu, IPU_CHA_DB_MODE_SEL(0)));
ipu_cm_read      1358 drivers/gpu/ipu-v3/ipu-common.c 		ipu_cm_read(ipu, IPU_CHA_DB_MODE_SEL(32)));
ipu_cm_read      1360 drivers/gpu/ipu-v3/ipu-common.c 		ipu_cm_read(ipu, IPU_FS_PROC_FLOW1));
ipu_cm_read      1362 drivers/gpu/ipu-v3/ipu-common.c 		ipu_cm_read(ipu, IPU_FS_PROC_FLOW2));
ipu_cm_read      1364 drivers/gpu/ipu-v3/ipu-common.c 		ipu_cm_read(ipu, IPU_FS_PROC_FLOW3));
ipu_cm_read      1366 drivers/gpu/ipu-v3/ipu-common.c 		ipu_cm_read(ipu, IPU_FS_DISP_FLOW1));
ipu_cm_read      1369 drivers/gpu/ipu-v3/ipu-common.c 			ipu_cm_read(ipu, IPU_INT_CTRL(i)));