ipic 72 arch/powerpc/include/asm/ipic.h extern struct ipic * ipic_init(struct device_node *node, unsigned int flags); ipic 28 arch/powerpc/sysdev/ipic.c static struct ipic * primary_ipic; ipic 515 arch/powerpc/sysdev/ipic.c static inline struct ipic * ipic_from_irq(unsigned int virq) ipic 522 arch/powerpc/sysdev/ipic.c struct ipic *ipic = ipic_from_irq(d->irq); ipic 529 arch/powerpc/sysdev/ipic.c temp = ipic_read(ipic->regs, ipic_info[src].mask); ipic 531 arch/powerpc/sysdev/ipic.c ipic_write(ipic->regs, ipic_info[src].mask, temp); ipic 538 arch/powerpc/sysdev/ipic.c struct ipic *ipic = ipic_from_irq(d->irq); ipic 545 arch/powerpc/sysdev/ipic.c temp = ipic_read(ipic->regs, ipic_info[src].mask); ipic 547 arch/powerpc/sysdev/ipic.c ipic_write(ipic->regs, ipic_info[src].mask, temp); ipic 558 arch/powerpc/sysdev/ipic.c struct ipic *ipic = ipic_from_irq(d->irq); ipic 566 arch/powerpc/sysdev/ipic.c ipic_write(ipic->regs, ipic_info[src].ack, temp); ipic 577 arch/powerpc/sysdev/ipic.c struct ipic *ipic = ipic_from_irq(d->irq); ipic 584 arch/powerpc/sysdev/ipic.c temp = ipic_read(ipic->regs, ipic_info[src].mask); ipic 586 arch/powerpc/sysdev/ipic.c ipic_write(ipic->regs, ipic_info[src].mask, temp); ipic 589 arch/powerpc/sysdev/ipic.c ipic_write(ipic->regs, ipic_info[src].ack, temp); ipic 600 arch/powerpc/sysdev/ipic.c struct ipic *ipic = ipic_from_irq(d->irq); ipic 642 arch/powerpc/sysdev/ipic.c vold = ipic_read(ipic->regs, IPIC_SECNR); ipic 649 arch/powerpc/sysdev/ipic.c ipic_write(ipic->regs, IPIC_SECNR, vnew); ipic 682 arch/powerpc/sysdev/ipic.c struct ipic *ipic = h->host_data; ipic 684 arch/powerpc/sysdev/ipic.c irq_set_chip_data(virq, ipic); ipic 699 arch/powerpc/sysdev/ipic.c struct ipic * __init ipic_init(struct device_node *node, unsigned int flags) ipic 701 arch/powerpc/sysdev/ipic.c struct ipic *ipic; ipic 709 arch/powerpc/sysdev/ipic.c ipic = kzalloc(sizeof(*ipic), GFP_KERNEL); ipic 710 arch/powerpc/sysdev/ipic.c if (ipic == NULL) ipic 713 arch/powerpc/sysdev/ipic.c ipic->irqhost = irq_domain_add_linear(node, NR_IPIC_INTS, ipic 714 arch/powerpc/sysdev/ipic.c &ipic_host_ops, ipic); ipic 715 arch/powerpc/sysdev/ipic.c if (ipic->irqhost == NULL) { ipic 716 arch/powerpc/sysdev/ipic.c kfree(ipic); ipic 720 arch/powerpc/sysdev/ipic.c ipic->regs = ioremap(res.start, resource_size(&res)); ipic 723 arch/powerpc/sysdev/ipic.c ipic_write(ipic->regs, IPIC_SICNR, 0x0); ipic 740 arch/powerpc/sysdev/ipic.c ipic_write(ipic->regs, IPIC_SICFR, temp); ipic 746 arch/powerpc/sysdev/ipic.c ipic_write(ipic->regs, IPIC_SERCR, temp); ipic 749 arch/powerpc/sysdev/ipic.c temp = ipic_read(ipic->regs, IPIC_SEMSR); ipic 756 arch/powerpc/sysdev/ipic.c ipic_write(ipic->regs, IPIC_SEMSR, temp); ipic 758 arch/powerpc/sysdev/ipic.c primary_ipic = ipic; ipic 761 arch/powerpc/sysdev/ipic.c ipic_write(ipic->regs, IPIC_SIMSR_H, 0); ipic 762 arch/powerpc/sysdev/ipic.c ipic_write(ipic->regs, IPIC_SIMSR_L, 0); ipic 767 arch/powerpc/sysdev/ipic.c return ipic; ipic 821 arch/powerpc/sysdev/ipic.c struct ipic *ipic = primary_ipic; ipic 823 arch/powerpc/sysdev/ipic.c ipic_saved_state.sicfr = ipic_read(ipic->regs, IPIC_SICFR); ipic 824 arch/powerpc/sysdev/ipic.c ipic_saved_state.siprr[0] = ipic_read(ipic->regs, IPIC_SIPRR_A); ipic 825 arch/powerpc/sysdev/ipic.c ipic_saved_state.siprr[1] = ipic_read(ipic->regs, IPIC_SIPRR_D); ipic 826 arch/powerpc/sysdev/ipic.c ipic_saved_state.simsr[0] = ipic_read(ipic->regs, IPIC_SIMSR_H); ipic 827 arch/powerpc/sysdev/ipic.c ipic_saved_state.simsr[1] = ipic_read(ipic->regs, IPIC_SIMSR_L); ipic 828 arch/powerpc/sysdev/ipic.c ipic_saved_state.sicnr = ipic_read(ipic->regs, IPIC_SICNR); ipic 829 arch/powerpc/sysdev/ipic.c ipic_saved_state.smprr[0] = ipic_read(ipic->regs, IPIC_SMPRR_A); ipic 830 arch/powerpc/sysdev/ipic.c ipic_saved_state.smprr[1] = ipic_read(ipic->regs, IPIC_SMPRR_B); ipic 831 arch/powerpc/sysdev/ipic.c ipic_saved_state.semsr = ipic_read(ipic->regs, IPIC_SEMSR); ipic 832 arch/powerpc/sysdev/ipic.c ipic_saved_state.secnr = ipic_read(ipic->regs, IPIC_SECNR); ipic 833 arch/powerpc/sysdev/ipic.c ipic_saved_state.sermr = ipic_read(ipic->regs, IPIC_SERMR); ipic 834 arch/powerpc/sysdev/ipic.c ipic_saved_state.sercr = ipic_read(ipic->regs, IPIC_SERCR); ipic 841 arch/powerpc/sysdev/ipic.c ipic_write(ipic->regs, IPIC_SIMSR_H, 0); ipic 842 arch/powerpc/sysdev/ipic.c ipic_write(ipic->regs, IPIC_SIMSR_L, 0); ipic 843 arch/powerpc/sysdev/ipic.c ipic_write(ipic->regs, IPIC_SEMSR, 0); ipic 844 arch/powerpc/sysdev/ipic.c ipic_write(ipic->regs, IPIC_SERMR, 0); ipic 852 arch/powerpc/sysdev/ipic.c struct ipic *ipic = primary_ipic; ipic 854 arch/powerpc/sysdev/ipic.c ipic_write(ipic->regs, IPIC_SICFR, ipic_saved_state.sicfr); ipic 855 arch/powerpc/sysdev/ipic.c ipic_write(ipic->regs, IPIC_SIPRR_A, ipic_saved_state.siprr[0]); ipic 856 arch/powerpc/sysdev/ipic.c ipic_write(ipic->regs, IPIC_SIPRR_D, ipic_saved_state.siprr[1]); ipic 857 arch/powerpc/sysdev/ipic.c ipic_write(ipic->regs, IPIC_SIMSR_H, ipic_saved_state.simsr[0]); ipic 858 arch/powerpc/sysdev/ipic.c ipic_write(ipic->regs, IPIC_SIMSR_L, ipic_saved_state.simsr[1]); ipic 859 arch/powerpc/sysdev/ipic.c ipic_write(ipic->regs, IPIC_SICNR, ipic_saved_state.sicnr); ipic 860 arch/powerpc/sysdev/ipic.c ipic_write(ipic->regs, IPIC_SMPRR_A, ipic_saved_state.smprr[0]); ipic 861 arch/powerpc/sysdev/ipic.c ipic_write(ipic->regs, IPIC_SMPRR_B, ipic_saved_state.smprr[1]); ipic 862 arch/powerpc/sysdev/ipic.c ipic_write(ipic->regs, IPIC_SEMSR, ipic_saved_state.semsr); ipic 863 arch/powerpc/sysdev/ipic.c ipic_write(ipic->regs, IPIC_SECNR, ipic_saved_state.secnr); ipic 864 arch/powerpc/sysdev/ipic.c ipic_write(ipic->regs, IPIC_SERMR, ipic_saved_state.sermr); ipic 865 arch/powerpc/sysdev/ipic.c ipic_write(ipic->regs, IPIC_SERCR, ipic_saved_state.sercr);