ioread32_native   299 drivers/gpu/drm/nouveau/dispnv04/hw.c 					ioread32_native(iovram + i * 4);
ioread32_native    60 drivers/gpu/drm/nouveau/include/nvif/object.h #define nvif_rd32(a,b) ({ ((u32)nvif_rd((a), ioread32_native, 4, (b))); })
ioread32_native   261 drivers/gpu/drm/nouveau/include/nvkm/core/device.h #define nvkm_rd32(d,a) ioread32_native((d)->pri + (a))
ioread32_native   616 drivers/gpu/drm/nouveau/nouveau_bo.c 		return ioread32_native((void __force __iomem *)mem);
ioread32_native    35 drivers/gpu/drm/nouveau/nvkm/core/gpuobj.c 	return ioread32_native(gpuobj->map + offset);
ioread32_native  2930 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c 		if (ioread32_native(map + 0x000004) != 0x00000000) {
ioread32_native  2932 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c 		if (ioread32_native(map + 0x000004) == 0x00000000) {
ioread32_native  2935 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c 			ioread32_native(map);
ioread32_native  2939 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c 		boot0 = ioread32_native(map + 0x000000);
ioread32_native  2940 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c 		strap = ioread32_native(map + 0x101000);
ioread32_native   277 drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.c 	*data = ioread32_native(chan->user + addr);
ioread32_native    58 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c 	return ioread32_native(iobj->imem->iomem + iobj->node->offset + offset);
ioread32_native   149 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c 	return ioread32_native(nv40_instmem(base)->iomem + addr);
ioread32_native   110 drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c 	return ioread32_native(nv50_instobj(memory)->map + offset);
ioread32_native    53 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c 	sb->wpr_addr = ioread32_native(mc + MC_SECURITY_CARVEOUT2_BOM_0) |
ioread32_native    54 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c 	      ((u64)ioread32_native(mc + MC_SECURITY_CARVEOUT2_BOM_HI_0) << 32);
ioread32_native    55 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c 	sb->wpr_size = ioread32_native(mc + MC_SECURITY_CARVEOUT2_SIZE_128K)
ioread32_native    57 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c 	cfg = ioread32_native(mc + MC_SECURITY_CARVEOUT2_CFG0);