ior               131 arch/parisc/include/asm/asmregs.h ior:	.reg	%cr21
ior               286 arch/parisc/include/asm/elf.h 	dst[46] = pt->isr;   dst[47] = pt->ior; \
ior                39 arch/parisc/include/asm/kgdb.h 	unsigned long ior;
ior                38 arch/parisc/include/uapi/asm/ptrace.h 	unsigned long ior;	/* CR21 */
ior                59 arch/parisc/include/uapi/asm/ptrace.h 	unsigned long ior;	/* CR21 */
ior               137 arch/parisc/kernel/asm-offsets.c 	DEFINE(TASK_PT_IOR, offsetof(struct task_struct, thread.regs.ior));
ior               226 arch/parisc/kernel/asm-offsets.c 	DEFINE(PT_IOR, offsetof(struct pt_regs, ior));
ior                83 arch/parisc/kernel/kgdb.c 	gr->ior = regs->ior;
ior               114 arch/parisc/kernel/kgdb.c 	regs->ior = gr->ior;
ior               467 arch/parisc/kernel/ptrace.c 	case RI(ior):			return regs->ior;
ior               520 arch/parisc/kernel/ptrace.c 	case RI(ior):			return regs->ior;
ior               765 arch/parisc/kernel/ptrace.c 	REG_OFFSET_NAME(ior),
ior               144 arch/parisc/kernel/traps.c 	       level, regs->iir, regs->isr, regs->ior);
ior               371 arch/parisc/kernel/traps.c 	regs->ior  = pim_wide->cr[21];
ior               395 arch/parisc/kernel/traps.c 	regs->ior  = pim_narrow->cr[21];
ior               665 arch/parisc/kernel/traps.c 		fault_address = regs->ior;
ior               679 arch/parisc/kernel/traps.c 		fault_address = regs->ior;
ior               744 arch/parisc/kernel/traps.c 				((void __user *) regs->ior));
ior               759 arch/parisc/kernel/traps.c 					(void __user *)regs->ior);
ior               775 arch/parisc/kernel/traps.c 				(void __user *)regs->ior);
ior               123 arch/parisc/kernel/unaligned.c 	unsigned long saddr = regs->ior;
ior               128 arch/parisc/kernel/unaligned.c 		regs->isr, regs->ior, toreg);
ior               157 arch/parisc/kernel/unaligned.c 	unsigned long saddr = regs->ior;
ior               162 arch/parisc/kernel/unaligned.c 		regs->isr, regs->ior, toreg);
ior               196 arch/parisc/kernel/unaligned.c 	unsigned long saddr = regs->ior;
ior               201 arch/parisc/kernel/unaligned.c 		regs->isr, regs->ior, toreg);
ior               277 arch/parisc/kernel/unaligned.c 		val, regs->isr, regs->ior);
ior               293 arch/parisc/kernel/unaligned.c 	: "r" (val), "r" (regs->ior), "r" (regs->isr)
ior               312 arch/parisc/kernel/unaligned.c 		val, regs->isr, regs->ior);
ior               340 arch/parisc/kernel/unaligned.c 	: "r" (val), "r" (regs->ior), "r" (regs->isr)
ior               358 arch/parisc/kernel/unaligned.c 		val,  regs->isr, regs->ior);
ior               392 arch/parisc/kernel/unaligned.c 	: "r" (val), "r" (regs->ior), "r" (regs->isr)
ior               427 arch/parisc/kernel/unaligned.c 	: "r" (valh), "r" (vall), "r" (regs->ior), "r" (regs->isr)
ior               455 arch/parisc/kernel/unaligned.c 				current->comm, task_pid_nr(current), regs->ior, regs->iaoq[0]);
ior               679 arch/parisc/kernel/unaligned.c 					(void __user *)regs->ior);
ior               686 arch/parisc/kernel/unaligned.c 					(void __user *)regs->ior);
ior               742 arch/parisc/kernel/unaligned.c 	return (int)(regs->ior & align_mask);
ior                13 drivers/gpu/drm/nouveau/include/nvkm/engine/disp.h 	struct list_head ior;
ior               243 drivers/gpu/drm/nouveau/nvkm/engine/disp/base.c 	struct nvkm_ior *ior;
ior               262 drivers/gpu/drm/nouveau/nvkm/engine/disp/base.c 	list_for_each_entry(ior, &disp->ior, head) {
ior               263 drivers/gpu/drm/nouveau/nvkm/engine/disp/base.c 		ior->func->power(ior, true, true, true, true, true);
ior               278 drivers/gpu/drm/nouveau/nvkm/engine/disp/base.c 	struct nvkm_ior *ior;
ior               409 drivers/gpu/drm/nouveau/nvkm/engine/disp/base.c 			ior = nvkm_ior_find(disp, SOR, ffs(outp->info.or) - 1);
ior               410 drivers/gpu/drm/nouveau/nvkm/engine/disp/base.c 			if (!WARN_ON(!ior))
ior               411 drivers/gpu/drm/nouveau/nvkm/engine/disp/base.c 				ior->identity = true;
ior               449 drivers/gpu/drm/nouveau/nvkm/engine/disp/base.c 	while (!list_empty(&disp->ior)) {
ior               450 drivers/gpu/drm/nouveau/nvkm/engine/disp/base.c 		struct nvkm_ior *ior =
ior               451 drivers/gpu/drm/nouveau/nvkm/engine/disp/base.c 			list_first_entry(&disp->ior, typeof(*ior), head);
ior               452 drivers/gpu/drm/nouveau/nvkm/engine/disp/base.c 		nvkm_ior_del(&ior);
ior               480 drivers/gpu/drm/nouveau/nvkm/engine/disp/base.c 	INIT_LIST_HEAD(&disp->ior);
ior                77 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c 	struct nvkm_ior *ior = dp->outp.ior;
ior                78 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c 	struct nvkm_bios *bios = ior->disp->engine.subdev.device->bios;
ior                85 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c 	for (i = 0; i < ior->dp.nr; i++) {
ior               122 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c 		ior->func->dp.drive(ior, i, ocfg.pc, ocfg.dc,
ior               146 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c 	dp->outp.ior->func->dp.pattern(dp->outp.ior, pattern);
ior               172 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c 		for (i = 0; i < lt->dp->outp.ior->dp.nr && eq_done; i++) {
ior               200 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c 		for (i = 0; i < lt->dp->outp.ior->dp.nr; i++) {
ior               222 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c 	struct nvkm_ior *ior = dp->outp.ior;
ior               234 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c 		 ior->dp.nr, ior->dp.bw * 27);
ior               244 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c 			while ((ior->dp.bw * 2700) < nvbios_rd16(bios, lnkcmp))
ior               248 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c 			while (ior->dp.bw < nvbios_rd08(bios, lnkcmp))
ior               255 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c 			init.or   = ior->id;
ior               256 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c 			init.link = ior->asy.link;
ior               260 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c 	ret = ior->func->dp.links(ior, dp->aux);
ior               269 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c 	ior->func->dp.power(ior, ior->dp.nr);
ior               272 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c 	sink[0] = ior->dp.bw;
ior               273 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c 	sink[1] = ior->dp.nr;
ior               274 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c 	if (ior->dp.ef)
ior               296 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c 		init.or   = dp->outp.ior->id;
ior               297 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c 		init.link = dp->outp.ior->asy.link;
ior               308 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c 			init.or   = dp->outp.ior->id;
ior               309 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c 			init.link = dp->outp.ior->asy.link;
ior               314 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c 			init.or   = dp->outp.ior->id;
ior               315 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c 			init.link = dp->outp.ior->asy.link;
ior               322 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c 		init.or   = dp->outp.ior->id;
ior               323 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c 		init.link = dp->outp.ior->asy.link;
ior               347 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c 	struct nvkm_ior *ior = dp->outp.ior;
ior               405 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c 		ior->dp.mst = dp->lt.mst;
ior               406 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c 		ior->dp.ef = dp->dpcd[DPCD_RC02] & DPCD_RC02_ENHANCED_FRAME_CAP;
ior               407 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c 		ior->dp.bw = cfg->bw;
ior               408 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c 		ior->dp.nr = cfg->nr;
ior               423 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c nvkm_dp_disable(struct nvkm_outp *outp, struct nvkm_ior *ior)
ior               428 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c 	nvbios_init(&ior->disp->engine.subdev, dp->info.script[4],
ior               430 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c 		init.or   = ior->id;
ior               431 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c 		init.link = ior->arm.link;
ior               442 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c 	dp->outp.ior->dp.nr = 0;
ior               449 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c 	struct nvkm_ior *ior = dp->outp.ior;
ior               462 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c 		if (ior->asy.head & (1 << head->id)) {
ior               463 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c 			u32 khz = (head->asy.hz >> ior->asy.rgdiv) / 1000;
ior               468 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c 	linkKBps = ior->dp.bw * 27000 * ior->dp.nr;
ior               471 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c 		 dataKBps, linkKBps, ior->dp.mst, dp->lt.mst);
ior               472 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c 	if (linkKBps < dataKBps || ior->dp.mst != dp->lt.mst) {
ior               486 drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c 		for (i = 0; i < ior->dp.nr; i++) {
ior                27 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdagf119.c gf119_hda_eld(struct nvkm_ior *ior, u8 *data, u8 size)
ior                29 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdagf119.c 	struct nvkm_device *device = ior->disp->engine.subdev.device;
ior                30 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdagf119.c 	const u32 soff = 0x030 * ior->id;
ior                41 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdagf119.c gf119_hda_hpd(struct nvkm_ior *ior, int head, bool present)
ior                43 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdagf119.c 	struct nvkm_device *device = ior->disp->engine.subdev.device;
ior                53 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdagf119.c 	nvkm_mask(device, 0x10ec10 + ior->id * 0x030, mask, data);
ior                27 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdagt215.c gt215_hda_eld(struct nvkm_ior *ior, u8 *data, u8 size)
ior                29 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdagt215.c 	struct nvkm_device *device = ior->disp->engine.subdev.device;
ior                30 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdagt215.c 	const u32 soff = ior->id * 0x800;
ior                41 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdagt215.c gt215_hda_hpd(struct nvkm_ior *ior, int head, bool present)
ior                43 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdagt215.c 	struct nvkm_device *device = ior->disp->engine.subdev.device;
ior                50 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdagt215.c 	nvkm_mask(device, 0x61c448 + ior->id * 0x800, mask, data);
ior                27 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmig84.c g84_hdmi_ctrl(struct nvkm_ior *ior, int head, bool enable, u8 max_ac_packet,
ior                30 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmig84.c 	struct nvkm_device *device = ior->disp->engine.subdev.device;
ior                27 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigf119.c gf119_hdmi_ctrl(struct nvkm_ior *ior, int head, bool enable, u8 max_ac_packet,
ior                30 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigf119.c 	struct nvkm_device *device = ior->disp->engine.subdev.device;
ior                27 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigk104.c gk104_hdmi_ctrl(struct nvkm_ior *ior, int head, bool enable, u8 max_ac_packet,
ior                30 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigk104.c 	struct nvkm_device *device = ior->disp->engine.subdev.device;
ior                27 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigm200.c gm200_hdmi_scdc(struct nvkm_ior *ior, int head, u8 scdc)
ior                29 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigm200.c 	struct nvkm_device *device = ior->disp->engine.subdev.device;
ior                35 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigm200.c 	ior->tmds.high_speed = !!(scdc & 0x2);
ior                27 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigt215.c gt215_hdmi_ctrl(struct nvkm_ior *ior, int head, bool enable, u8 max_ac_packet,
ior                30 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigt215.c 	struct nvkm_device *device = ior->disp->engine.subdev.device;
ior                35 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigt215.c 	const u32 soff = nv50_ior_base(ior);
ior                25 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigv100.c gv100_hdmi_ctrl(struct nvkm_ior *ior, int head, bool enable, u8 max_ac_packet,
ior                28 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigv100.c 	struct nvkm_device *device = ior->disp->engine.subdev.device;
ior                36 drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.c 	struct nvkm_ior *ior;
ior                37 drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.c 	list_for_each_entry(ior, &disp->ior, head) {
ior                38 drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.c 		if (ior->type == type && (id < 0 || ior->id == id))
ior                39 drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.c 			return ior;
ior                47 drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.c 	struct nvkm_ior *ior = *pior;
ior                48 drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.c 	if (ior) {
ior                49 drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.c 		IOR_DBG(ior, "dtor");
ior                50 drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.c 		list_del(&ior->head);
ior                60 drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.c 	struct nvkm_ior *ior;
ior                61 drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.c 	if (!(ior = kzalloc(sizeof(*ior), GFP_KERNEL)))
ior                63 drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.c 	ior->func = func;
ior                64 drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.c 	ior->disp = disp;
ior                65 drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.c 	ior->type = type;
ior                66 drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.c 	ior->id = id;
ior                67 drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.c 	snprintf(ior->name, sizeof(ior->name), "%s-%d",
ior                68 drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.c 		 nvkm_ior_name[ior->type], ior->id);
ior                69 drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.c 	list_add_tail(&ior->head, &disp->ior);
ior                70 drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.c 	IOR_DBG(ior, "ctor");
ior               100 drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.h nv50_ior_base(struct nvkm_ior *ior)
ior               102 drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.h 	return ior->id * 0x800;
ior               111 drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.h nv50_sor_link(struct nvkm_ior *ior)
ior               113 drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.h 	return nv50_ior_base(ior) + ((ior->asy.link == 2) * 0x80);
ior               198 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 		       struct nvkm_ior *ior, int id, u32 khz)
ior               202 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	struct nvkm_outp *outp = ior->asy.outp;
ior               209 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 		IOR_DBG(ior, "nothing to attach");
ior               219 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	if (ior->type == SOR) {
ior               220 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 		if (ior->asy.proto == LVDS) {
ior               224 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 		if (ior->asy.link == 3)
ior               228 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	data = nvbios_ocfg_match(bios, data, ior->asy.proto_evo, flags,
ior               232 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 			 ior->asy.proto_evo, flags);
ior               240 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 			 id, ior->asy.proto_evo, flags, khz);
ior               246 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 		init.or   = ior->id;
ior               247 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 		init.link = ior->asy.link;
ior               253 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c nv50_disp_super_ied_off(struct nvkm_head *head, struct nvkm_ior *ior, int id)
ior               255 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	struct nvkm_outp *outp = ior->arm.outp;
ior               261 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 		IOR_DBG(ior, "nothing attached");
ior               271 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 		init.or   = ior->id;
ior               272 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 		init.link = ior->arm.link;
ior               280 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	struct nvkm_ior *ior;
ior               281 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	list_for_each_entry(ior, &head->disp->ior, head) {
ior               282 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 		if (ior->asy.head & (1 << head->id)) {
ior               283 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 			HEAD_DBG(head, "to %s", ior->name);
ior               284 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 			return ior;
ior               294 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	struct nvkm_ior *ior;
ior               295 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	list_for_each_entry(ior, &head->disp->ior, head) {
ior               296 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 		if (ior->arm.head & (1 << head->id)) {
ior               297 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 			HEAD_DBG(head, "on %s", ior->name);
ior               298 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 			return ior;
ior               308 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	struct nvkm_ior *ior;
ior               312 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	ior = nv50_disp_super_ior_asy(head);
ior               313 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	if (!ior)
ior               317 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	nv50_disp_super_ied_on(head, ior, 1, head->asy.hz / 1000);
ior               320 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	if (ior->func->war_3)
ior               321 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 		ior->func->war_3(ior);
ior               325 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c nv50_disp_super_2_2_dp(struct nvkm_head *head, struct nvkm_ior *ior)
ior               329 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	const u32 linkKBps = ior->dp.bw * 27000;
ior               341 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	h = h - (3 * ior->dp.ef) - (12 / ior->dp.nr);
ior               347 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	v = v - ((36 / ior->dp.nr) + 3) - 1;
ior               349 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	ior->func->dp.audio_sym(ior, head->id, h, v);
ior               352 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	link_data_rate = (khz * head->asy.or.depth / 8) / ior->dp.nr;
ior               358 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	for (TU = 64; ior->func->dp.activesym && TU >= 32; TU--) {
ior               409 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	if (ior->func->dp.activesym) {
ior               414 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 		ior->func->dp.activesym(ior, head->id, bestTU,
ior               427 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	ior->func->dp.watermark(ior, head->id, unk);
ior               435 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	struct nvkm_ior *ior;
ior               439 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	ior = nv50_disp_super_ior_asy(head);
ior               440 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	if (!ior)
ior               452 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	if (ior->type == SOR && ior->asy.proto == LVDS) {
ior               454 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 		ior->asy.link      = (disp->sor.lvdsconf & 0x0100) ? 3  : 1;
ior               458 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	if ((outp = ior->asy.outp) && outp->func->acquire)
ior               462 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	nv50_disp_super_ied_on(head, ior, 0, khz);
ior               465 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	head->func->rgclk(head, ior->asy.rgdiv);
ior               468 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	if (ior->type == SOR && ior->asy.proto == DP)
ior               469 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 		nv50_disp_super_2_2_dp(head, ior);
ior               472 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	ior->func->clock(ior);
ior               473 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	if (ior->func->war_2)
ior               474 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 		ior->func->war_2(ior);
ior               491 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	struct nvkm_ior *ior;
ior               495 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	ior = nv50_disp_super_ior_arm(head);
ior               496 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	if (!ior)
ior               500 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	nv50_disp_super_ied_off(head, ior, 2);
ior               505 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	if (ior->arm.head == (1 << head->id)) {
ior               506 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 		if ((outp = ior->arm.outp) && outp->func->disable)
ior               507 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 			outp->func->disable(outp, ior);
ior               514 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	struct nvkm_ior *ior;
ior               518 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	ior = nv50_disp_super_ior_arm(head);
ior               519 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	if (!ior)
ior               523 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	nv50_disp_super_ied_off(head, ior, 1);
ior               530 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	struct nvkm_ior *ior;
ior               537 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 	list_for_each_entry(ior, &disp->base.ior, head) {
ior               538 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 		ior->func->state(ior, &ior->arm);
ior               539 drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c 		ior->func->state(ior, &ior->asy);
ior                35 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 	struct nvkm_ior *ior;
ior                37 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 	list_for_each_entry(ior, &disp->ior, head) {
ior                38 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 		if ((outp = ior->arm.outp) && ior->arm.outp != ior->asy.outp) {
ior                39 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 			OUTP_DBG(outp, "release %s", ior->name);
ior                40 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 			if (ior->func->route.set)
ior                41 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 				ior->func->route.set(outp, NULL);
ior                42 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 			ior->arm.outp = NULL;
ior                46 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 	list_for_each_entry(ior, &disp->ior, head) {
ior                47 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 		if ((outp = ior->asy.outp)) {
ior                48 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 			OUTP_DBG(outp, "acquire %s", ior->name);
ior                49 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 			if (ior->asy.outp != ior->arm.outp) {
ior                50 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 				if (ior->func->route.set)
ior                51 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 					ior->func->route.set(outp, ior);
ior                52 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 				ior->arm.outp = ior->asy.outp;
ior                91 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 	struct nvkm_ior *ior = outp->ior;
ior                92 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 	OUTP_TRACE(outp, "release %02x &= %02x %p", outp->acquired, ~user, ior);
ior                93 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 	if (ior) {
ior                96 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 			if (outp->func->release && outp->ior)
ior                98 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 			outp->ior->asy.outp = NULL;
ior                99 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 			outp->ior = NULL;
ior               105 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c nvkm_outp_acquire_ior(struct nvkm_outp *outp, u8 user, struct nvkm_ior *ior)
ior               107 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 	outp->ior = ior;
ior               108 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 	outp->ior->asy.outp = outp;
ior               109 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 	outp->ior->asy.link = outp->info.sorconf.link;
ior               117 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 	struct nvkm_ior *ior = outp->ior;
ior               121 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 	OUTP_TRACE(outp, "acquire %02x |= %02x %p", outp->acquired, user, ior);
ior               122 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 	if (ior) {
ior               134 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 		ior = nvkm_ior_find(outp->disp, SOR, ffs(outp->info.or) - 1);
ior               135 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 		if (WARN_ON(!ior))
ior               137 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 		return nvkm_outp_acquire_ior(outp, user, ior);
ior               143 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 	list_for_each_entry(ior, &outp->disp->ior, head) {
ior               144 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 		if (!ior->identity && !ior->asy.outp && ior->arm.outp == outp)
ior               145 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 			return nvkm_outp_acquire_ior(outp, user, ior);
ior               149 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 	list_for_each_entry(ior, &outp->disp->ior, head) {
ior               150 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 		if (!ior->identity &&
ior               151 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 		    !ior->asy.outp && ior->type == type && !ior->arm.outp &&
ior               152 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 		    (ior->func->route.set || ior->id == __ffs(outp->info.or)))
ior               153 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 			return nvkm_outp_acquire_ior(outp, user, ior);
ior               159 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 	list_for_each_entry(ior, &outp->disp->ior, head) {
ior               160 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 		if (!ior->identity && !ior->asy.outp && ior->type == type &&
ior               161 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 		    (ior->func->route.set || ior->id == __ffs(outp->info.or)))
ior               162 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 			return nvkm_outp_acquire_ior(outp, user, ior);
ior               181 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 	struct nvkm_ior *ior;
ior               189 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 	ior = nvkm_ior_find(disp, type, -1);
ior               190 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 	if (!ior) {
ior               196 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 	if (ior->func->route.get) {
ior               197 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 		id = ior->func->route.get(outp, &link);
ior               205 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 		link = (ior->type == SOR) ? outp->info.sorconf.link : 0;
ior               208 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 	ior = nvkm_ior_find(disp, type, id);
ior               209 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 	if (!ior) {
ior               215 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 	ior->func->state(ior, &ior->arm);
ior               216 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 	if (!ior->arm.head || ior->arm.proto != proto) {
ior               217 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 		OUTP_DBG(outp, "no heads (%x %d %d)", ior->arm.head,
ior               218 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 			 ior->arm.proto, proto);
ior               222 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 	OUTP_DBG(outp, "on %s link %x", ior->name, ior->arm.link);
ior               223 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c 	ior->arm.outp = outp;
ior                25 drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.h 	struct nvkm_ior *ior;
ior                73 drivers/gpu/drm/nouveau/nvkm/engine/disp/piornv50.c nv50_pior_depth(struct nvkm_ior *ior, struct nvkm_ior_state *state, u32 ctrl)
ior                78 drivers/gpu/drm/nouveau/nvkm/engine/disp/piornv50.c 	if (state->head && state == &ior->asy) {
ior                80 drivers/gpu/drm/nouveau/nvkm/engine/disp/piornv50.c 			nvkm_head_find(ior->disp, __ffs(state->head));
ior               104 drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c 				args->v0.or = outp->ior->id;
ior               105 drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c 				args->v0.link = outp->ior->asy.link;
ior               125 drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c 			ret = outp->ior->func->sense(outp->ior, args->v0.data);
ior               139 drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c 		struct nvkm_ior *ior = outp->ior;
ior               151 drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c 		if (!ior->func->hda.hpd)
ior               156 drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c 				ior->func->dp.audio(ior, hidx, true);
ior               157 drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c 			ior->func->hda.hpd(ior, hidx, true);
ior               158 drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c 			ior->func->hda.eld(ior, data, size);
ior               161 drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c 				ior->func->dp.audio(ior, hidx, false);
ior               162 drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c 			ior->func->hda.hpd(ior, hidx, false);
ior               199 drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c 		if (!outp->ior->func->hdmi.ctrl)
ior               202 drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c 		outp->ior->func->hdmi.ctrl(outp->ior, hidx, args->v0.state,
ior               207 drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c 		if (outp->ior->func->hdmi.scdc)
ior               208 drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c 			outp->ior->func->hdmi.scdc(
ior               209 drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c 					outp->ior, hidx, args->v0.scdc);
ior               258 drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c 			if (!outp->ior->func->dp.vcpi)
ior               260 drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c 			outp->ior->func->dp.vcpi(outp->ior, hidx,
ior               143 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c 	struct nvkm_ior *ior;
ior               147 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c 	list_for_each_entry(ior, &disp->ior, head) {
ior               148 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c 		if (ior->type != SOR)
ior               151 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c 		clksor = nvkm_rd32(device, 0x614300 + nv50_ior_base(ior));
ior                49 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm200.c gm200_sor_route_set(struct nvkm_outp *outp, struct nvkm_ior *ior)
ior                53 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm200.c 	const u32  sor = ior ? ior->id + 1 : 0;
ior                54 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm200.c 	u32 link = ior ? (ior->asy.link == 2) : 0;
ior               186 drivers/net/ethernet/davicom/dm9000.c 	if (ior(db, DM9000_NCR) & 1)
ior               192 drivers/net/ethernet/davicom/dm9000.c 	if (ior(db, DM9000_NCR) & 1)
ior               309 drivers/net/ethernet/davicom/dm9000.c 	ret = (ior(db, DM9000_EPDRH) << 8) | ior(db, DM9000_EPDRL);
ior               428 drivers/net/ethernet/davicom/dm9000.c 	ret = ior(db, reg);
ior               499 drivers/net/ethernet/davicom/dm9000.c 	to[0] = ior(db, DM9000_EPDRL);
ior               500 drivers/net/ethernet/davicom/dm9000.c 	to[1] = ior(db, DM9000_EPDRH);
ior               914 drivers/net/ethernet/davicom/dm9000.c 	db->io_mode = ior(db, DM9000_ISR) >> 6;	/* ISR bit7:6 keeps I/O mode */
ior              1063 drivers/net/ethernet/davicom/dm9000.c 	int tx_status = ior(db, DM9000_NSR);	/* Got TX status */
ior              1102 drivers/net/ethernet/davicom/dm9000.c 		ior(db, DM9000_MRCMDX);	/* Dummy read */
ior              1212 drivers/net/ethernet/davicom/dm9000.c 	int_status = ior(db, DM9000_ISR);	/* Got ISR */
ior              1251 drivers/net/ethernet/davicom/dm9000.c 	nsr = ior(db, DM9000_NSR);
ior              1252 drivers/net/ethernet/davicom/dm9000.c 	wcr = ior(db, DM9000_WCR);
ior              1611 drivers/net/ethernet/davicom/dm9000.c 		id_val  = ior(db, DM9000_VIDL);
ior              1612 drivers/net/ethernet/davicom/dm9000.c 		id_val |= (u32)ior(db, DM9000_VIDH) << 8;
ior              1613 drivers/net/ethernet/davicom/dm9000.c 		id_val |= (u32)ior(db, DM9000_PIDL) << 16;
ior              1614 drivers/net/ethernet/davicom/dm9000.c 		id_val |= (u32)ior(db, DM9000_PIDH) << 24;
ior              1629 drivers/net/ethernet/davicom/dm9000.c 	id_val = ior(db, DM9000_CHIPR);
ior              1681 drivers/net/ethernet/davicom/dm9000.c 			ndev->dev_addr[i] = ior(db, i+DM9000_PAR);
ior              1550 drivers/pinctrl/tegra/pinctrl-tegra114.c #define PINGROUP(pg_name, f0, f1, f2, f3, r, od, ior, rcv_sel)		\
ior              1573 drivers/pinctrl/tegra/pinctrl-tegra114.c 		.ioreset_bit = PINGROUP_BIT_##ior(8),			\
ior              1719 drivers/pinctrl/tegra/pinctrl-tegra124.c #define PINGROUP(pg_name, f0, f1, f2, f3, r, od, ior, rcv_sel)		\
ior              1742 drivers/pinctrl/tegra/pinctrl-tegra124.c 		.ioreset_bit = PINGROUP_BIT_##ior(8),			\
ior              2111 drivers/pinctrl/tegra/pinctrl-tegra30.c #define PINGROUP(pg_name, f0, f1, f2, f3, r, od, ior)			\
ior              2134 drivers/pinctrl/tegra/pinctrl-tegra30.c 		.ioreset_bit = PINGROUP_BIT_##ior(8),			\