CLOCK_SOURCE_ID_PLL0 1364 drivers/gpu/drm/amd/display/dc/bios/command_table.c 	case CLOCK_SOURCE_ID_PLL0:
CLOCK_SOURCE_ID_PLL0  103 drivers/gpu/drm/amd/display/dc/bios/dce110/command_table_helper_dce110.c 	case CLOCK_SOURCE_ID_PLL0:
CLOCK_SOURCE_ID_PLL0  172 drivers/gpu/drm/amd/display/dc/bios/dce110/command_table_helper_dce110.c 		case CLOCK_SOURCE_ID_PLL0:
CLOCK_SOURCE_ID_PLL0  100 drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper2_dce112.c 	case CLOCK_SOURCE_ID_PLL0:
CLOCK_SOURCE_ID_PLL0  100 drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper_dce112.c 	case CLOCK_SOURCE_ID_PLL0:
CLOCK_SOURCE_ID_PLL0  114 drivers/gpu/drm/amd/display/dc/bios/dce80/command_table_helper_dce80.c 		case CLOCK_SOURCE_ID_PLL0:
CLOCK_SOURCE_ID_PLL0  158 drivers/gpu/drm/amd/display/dc/bios/dce80/command_table_helper_dce80.c 	case CLOCK_SOURCE_ID_PLL0:
CLOCK_SOURCE_ID_PLL0  185 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.c 		uint32_t rate_source = clk_src->id - CLOCK_SOURCE_ID_PLL0;
CLOCK_SOURCE_ID_PLL0  929 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c 				dce100_clock_source_create(ctx, bp, CLOCK_SOURCE_ID_PLL0, &clk_src_regs[0], false);
CLOCK_SOURCE_ID_PLL0  938 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c 				dce100_clock_source_create(ctx, bp, CLOCK_SOURCE_ID_PLL0, &clk_src_regs[0], true);
CLOCK_SOURCE_ID_PLL0 1308 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c 				dce110_clock_source_create(ctx, bp, CLOCK_SOURCE_ID_PLL0,
CLOCK_SOURCE_ID_PLL0  910 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c 				dce80_clock_source_create(ctx, bp, CLOCK_SOURCE_ID_PLL0, &clk_src_regs[0], false);
CLOCK_SOURCE_ID_PLL0  919 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c 				dce80_clock_source_create(ctx, bp, CLOCK_SOURCE_ID_PLL0, &clk_src_regs[0], true);
CLOCK_SOURCE_ID_PLL0 1107 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c 				dce80_clock_source_create(ctx, bp, CLOCK_SOURCE_ID_PLL0, &clk_src_regs[0], false);
CLOCK_SOURCE_ID_PLL0 1116 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c 				dce80_clock_source_create(ctx, bp, CLOCK_SOURCE_ID_PLL0, &clk_src_regs[0], true);