intel_set_pch_fifo_underrun_reporting  235 drivers/gpu/drm/i915/display/intel_crt.c 	intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
intel_set_pch_fifo_underrun_reporting  255 drivers/gpu/drm/i915/display/intel_crt.c 	intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
intel_set_pch_fifo_underrun_reporting  266 drivers/gpu/drm/i915/display/intel_crt.c 	intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
intel_set_pch_fifo_underrun_reporting  301 drivers/gpu/drm/i915/display/intel_crt.c 	intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
intel_set_pch_fifo_underrun_reporting 6328 drivers/gpu/drm/i915/display/intel_display.c 	intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, false);
intel_set_pch_fifo_underrun_reporting 6397 drivers/gpu/drm/i915/display/intel_display.c 	intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, true);
intel_set_pch_fifo_underrun_reporting 6579 drivers/gpu/drm/i915/display/intel_display.c 	intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, false);
intel_set_pch_fifo_underrun_reporting 6620 drivers/gpu/drm/i915/display/intel_display.c 	intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, true);
intel_set_pch_fifo_underrun_reporting 14578 drivers/gpu/drm/i915/display/intel_display.c 		intel_set_pch_fifo_underrun_reporting(dev_priv, pch_transcoder, true);
intel_set_pch_fifo_underrun_reporting 4103 drivers/gpu/drm/i915/display/intel_dp.c 		intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
intel_set_pch_fifo_underrun_reporting 4118 drivers/gpu/drm/i915/display/intel_dp.c 		intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
intel_set_pch_fifo_underrun_reporting 4841 drivers/gpu/drm/i915/display/intel_dp.c 		intel_set_pch_fifo_underrun_reporting(dev_priv,
intel_set_pch_fifo_underrun_reporting 4852 drivers/gpu/drm/i915/display/intel_dp.c 		intel_set_pch_fifo_underrun_reporting(dev_priv,
intel_set_pch_fifo_underrun_reporting  400 drivers/gpu/drm/i915/display/intel_fifo_underrun.c 	if (intel_set_pch_fifo_underrun_reporting(dev_priv, pch_transcoder,
intel_set_pch_fifo_underrun_reporting   17 drivers/gpu/drm/i915/display/intel_fifo_underrun.h bool intel_set_pch_fifo_underrun_reporting(struct drm_i915_private *dev_priv,
intel_set_pch_fifo_underrun_reporting 2017 drivers/gpu/drm/i915/display/intel_hdmi.c 		intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
intel_set_pch_fifo_underrun_reporting 2036 drivers/gpu/drm/i915/display/intel_hdmi.c 		intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
intel_set_pch_fifo_underrun_reporting 1753 drivers/gpu/drm/i915/display/intel_sdvo.c 		intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
intel_set_pch_fifo_underrun_reporting 1764 drivers/gpu/drm/i915/display/intel_sdvo.c 		intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);