intel_rc6_residency_ns  434 drivers/gpu/drm/i915/i915_pmu.c 	val = intel_rc6_residency_ns(i915,
intel_rc6_residency_ns  440 drivers/gpu/drm/i915/i915_pmu.c 		val += intel_rc6_residency_ns(i915, GEN6_GT_GFX_RC6p);
intel_rc6_residency_ns  443 drivers/gpu/drm/i915/i915_pmu.c 		val += intel_rc6_residency_ns(i915, GEN6_GT_GFX_RC6pp);
intel_rc6_residency_ns 10054 drivers/gpu/drm/i915/intel_pm.c 	return DIV_ROUND_UP_ULL(intel_rc6_residency_ns(dev_priv, reg), 1000);
intel_rc6_residency_ns   78 drivers/gpu/drm/i915/intel_pm.h u64 intel_rc6_residency_ns(struct drm_i915_private *dev_priv, i915_reg_t reg);