CLOCKBASE 63 arch/m68k/hp300/time.c in_8(CLOCKBASE + CLKSR); CLOCKBASE 64 arch/m68k/hp300/time.c asm volatile ("movpw %1@(5),%0" : "=d" (tmp) : "a" (CLOCKBASE)); CLOCKBASE 83 arch/m68k/hp300/time.c msb = in_8(CLOCKBASE + CLKMSB1); CLOCKBASE 85 arch/m68k/hp300/time.c if ((in_8(CLOCKBASE + CLKSR) & CLKSR_INT1) && msb > 0) CLOCKBASE 87 arch/m68k/hp300/time.c lsb = in_8(CLOCKBASE + CLKLSB1); CLOCKBASE 88 arch/m68k/hp300/time.c msb_new = in_8(CLOCKBASE + CLKMSB1); CLOCKBASE 103 arch/m68k/hp300/time.c out_8(CLOCKBASE + CLKCR2, 0x1); /* select CR1 */ CLOCKBASE 104 arch/m68k/hp300/time.c out_8(CLOCKBASE + CLKCR1, 0x1); /* reset */ CLOCKBASE 106 arch/m68k/hp300/time.c asm volatile(" movpw %0,%1@(5)" : : "d" (INTVAL), "a" (CLOCKBASE)); CLOCKBASE 111 arch/m68k/hp300/time.c out_8(CLOCKBASE + CLKCR2, 0x1); /* select CR1 */ CLOCKBASE 112 arch/m68k/hp300/time.c out_8(CLOCKBASE + CLKCR1, 0x40); /* enable irq */