intel_dp 326 drivers/gpu/drm/gma500/cdv_intel_dp.c struct cdv_intel_dp *intel_dp = encoder->dev_priv; intel_dp 329 drivers/gpu/drm/gma500/cdv_intel_dp.c if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11) { intel_dp 330 drivers/gpu/drm/gma500/cdv_intel_dp.c max_lane_count = intel_dp->dpcd[DP_MAX_LANE_COUNT] & 0x1f; intel_dp 344 drivers/gpu/drm/gma500/cdv_intel_dp.c struct cdv_intel_dp *intel_dp = encoder->dev_priv; intel_dp 345 drivers/gpu/drm/gma500/cdv_intel_dp.c int max_link_bw = intel_dp->dpcd[DP_MAX_LINK_RATE]; intel_dp 382 drivers/gpu/drm/gma500/cdv_intel_dp.c struct cdv_intel_dp *intel_dp = intel_encoder->dev_priv; intel_dp 385 drivers/gpu/drm/gma500/cdv_intel_dp.c if (intel_dp->panel_on) { intel_dp 396 drivers/gpu/drm/gma500/cdv_intel_dp.c msleep(intel_dp->panel_power_up_delay); intel_dp 417 drivers/gpu/drm/gma500/cdv_intel_dp.c struct cdv_intel_dp *intel_dp = intel_encoder->dev_priv; intel_dp 420 drivers/gpu/drm/gma500/cdv_intel_dp.c if (intel_dp->panel_on) intel_dp 433 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->panel_on = false; intel_dp 435 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->panel_on = true; intel_dp 436 drivers/gpu/drm/gma500/cdv_intel_dp.c msleep(intel_dp->panel_power_up_delay); intel_dp 445 drivers/gpu/drm/gma500/cdv_intel_dp.c struct cdv_intel_dp *intel_dp = intel_encoder->dev_priv; intel_dp 454 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->panel_on = false; intel_dp 469 drivers/gpu/drm/gma500/cdv_intel_dp.c msleep(intel_dp->panel_power_cycle_delay); intel_dp 496 drivers/gpu/drm/gma500/cdv_intel_dp.c struct cdv_intel_dp *intel_dp = intel_encoder->dev_priv; intel_dp 506 drivers/gpu/drm/gma500/cdv_intel_dp.c msleep(intel_dp->backlight_off_delay); intel_dp 514 drivers/gpu/drm/gma500/cdv_intel_dp.c struct cdv_intel_dp *intel_dp = encoder->dev_priv; intel_dp 519 drivers/gpu/drm/gma500/cdv_intel_dp.c if (is_edp(encoder) && intel_dp->panel_fixed_mode) { intel_dp 520 drivers/gpu/drm/gma500/cdv_intel_dp.c if (mode->hdisplay > intel_dp->panel_fixed_mode->hdisplay) intel_dp 522 drivers/gpu/drm/gma500/cdv_intel_dp.c if (mode->vdisplay > intel_dp->panel_fixed_mode->vdisplay) intel_dp 573 drivers/gpu/drm/gma500/cdv_intel_dp.c struct cdv_intel_dp *intel_dp = encoder->dev_priv; intel_dp 574 drivers/gpu/drm/gma500/cdv_intel_dp.c uint32_t output_reg = intel_dp->output_reg; intel_dp 754 drivers/gpu/drm/gma500/cdv_intel_dp.c struct cdv_intel_dp *intel_dp = container_of(adapter, intel_dp 757 drivers/gpu/drm/gma500/cdv_intel_dp.c struct gma_encoder *encoder = intel_dp->encoder; intel_dp 850 drivers/gpu/drm/gma500/cdv_intel_dp.c struct cdv_intel_dp *intel_dp = encoder->dev_priv; intel_dp 855 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->algo.running = false; intel_dp 856 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->algo.address = 0; intel_dp 857 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->algo.aux_ch = cdv_intel_dp_i2c_aux_ch; intel_dp 859 drivers/gpu/drm/gma500/cdv_intel_dp.c memset(&intel_dp->adapter, '\0', sizeof (intel_dp->adapter)); intel_dp 860 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->adapter.owner = THIS_MODULE; intel_dp 861 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->adapter.class = I2C_CLASS_DDC; intel_dp 862 drivers/gpu/drm/gma500/cdv_intel_dp.c strncpy (intel_dp->adapter.name, name, sizeof(intel_dp->adapter.name) - 1); intel_dp 863 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->adapter.name[sizeof(intel_dp->adapter.name) - 1] = '\0'; intel_dp 864 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->adapter.algo_data = &intel_dp->algo; intel_dp 865 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->adapter.dev.parent = connector->base.kdev; intel_dp 869 drivers/gpu/drm/gma500/cdv_intel_dp.c ret = i2c_dp_aux_add_bus(&intel_dp->adapter); intel_dp 900 drivers/gpu/drm/gma500/cdv_intel_dp.c struct cdv_intel_dp *intel_dp = intel_encoder->dev_priv; intel_dp 908 drivers/gpu/drm/gma500/cdv_intel_dp.c if (is_edp(intel_encoder) && intel_dp->panel_fixed_mode) { intel_dp 909 drivers/gpu/drm/gma500/cdv_intel_dp.c cdv_intel_fixed_panel_mode(intel_dp->panel_fixed_mode, adjusted_mode); intel_dp 910 drivers/gpu/drm/gma500/cdv_intel_dp.c refclock = intel_dp->panel_fixed_mode->clock; intel_dp 919 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->link_bw = bws[clock]; intel_dp 920 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->lane_count = lane_count; intel_dp 921 drivers/gpu/drm/gma500/cdv_intel_dp.c adjusted_mode->clock = cdv_intel_dp_link_clock(intel_dp->link_bw); intel_dp 924 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->link_bw, intel_dp->lane_count, intel_dp 932 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->lane_count = max_lane_count; intel_dp 933 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->link_bw = bws[max_clock]; intel_dp 934 drivers/gpu/drm/gma500/cdv_intel_dp.c adjusted_mode->clock = cdv_intel_dp_link_clock(intel_dp->link_bw); intel_dp 937 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->link_bw, intel_dp->lane_count, intel_dp 1003 drivers/gpu/drm/gma500/cdv_intel_dp.c struct cdv_intel_dp *intel_dp; intel_dp 1009 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp = intel_encoder->dev_priv; intel_dp 1011 drivers/gpu/drm/gma500/cdv_intel_dp.c lane_count = intel_dp->lane_count; intel_dp 1014 drivers/gpu/drm/gma500/cdv_intel_dp.c lane_count = intel_dp->lane_count; intel_dp 1045 drivers/gpu/drm/gma500/cdv_intel_dp.c struct cdv_intel_dp *intel_dp = intel_encoder->dev_priv; intel_dp 1048 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->DP = DP_VOLTAGE_0_4 | DP_PRE_EMPHASIS_0; intel_dp 1049 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->DP |= intel_dp->color_range; intel_dp 1052 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->DP |= DP_SYNC_HS_HIGH; intel_dp 1054 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->DP |= DP_SYNC_VS_HIGH; intel_dp 1056 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->DP |= DP_LINK_TRAIN_OFF; intel_dp 1058 drivers/gpu/drm/gma500/cdv_intel_dp.c switch (intel_dp->lane_count) { intel_dp 1060 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->DP |= DP_PORT_WIDTH_1; intel_dp 1063 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->DP |= DP_PORT_WIDTH_2; intel_dp 1066 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->DP |= DP_PORT_WIDTH_4; intel_dp 1069 drivers/gpu/drm/gma500/cdv_intel_dp.c if (intel_dp->has_audio) intel_dp 1070 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->DP |= DP_AUDIO_OUTPUT_ENABLE; intel_dp 1072 drivers/gpu/drm/gma500/cdv_intel_dp.c memset(intel_dp->link_configuration, 0, DP_LINK_CONFIGURATION_SIZE); intel_dp 1073 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->link_configuration[0] = intel_dp->link_bw; intel_dp 1074 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->link_configuration[1] = intel_dp->lane_count; intel_dp 1079 drivers/gpu/drm/gma500/cdv_intel_dp.c if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11 && intel_dp 1080 drivers/gpu/drm/gma500/cdv_intel_dp.c (intel_dp->dpcd[DP_MAX_LANE_COUNT] & DP_ENHANCED_FRAME_CAP)) { intel_dp 1081 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->link_configuration[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN; intel_dp 1082 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->DP |= DP_ENHANCED_FRAMING; intel_dp 1087 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->DP |= DP_PIPEB_SELECT; intel_dp 1089 drivers/gpu/drm/gma500/cdv_intel_dp.c REG_WRITE(intel_dp->output_reg, (intel_dp->DP | DP_PORT_EN)); intel_dp 1090 drivers/gpu/drm/gma500/cdv_intel_dp.c DRM_DEBUG_KMS("DP expected reg is %x\n", intel_dp->DP); intel_dp 1111 drivers/gpu/drm/gma500/cdv_intel_dp.c struct cdv_intel_dp *intel_dp = encoder->dev_priv; intel_dp 1115 drivers/gpu/drm/gma500/cdv_intel_dp.c if (intel_dp->dpcd[DP_DPCD_REV] < 0x11) intel_dp 1173 drivers/gpu/drm/gma500/cdv_intel_dp.c struct cdv_intel_dp *intel_dp = intel_encoder->dev_priv; intel_dp 1175 drivers/gpu/drm/gma500/cdv_intel_dp.c uint32_t dp_reg = REG_READ(intel_dp->output_reg); intel_dp 1234 drivers/gpu/drm/gma500/cdv_intel_dp.c struct cdv_intel_dp *intel_dp = encoder->dev_priv; intel_dp 1237 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->link_status, intel_dp 1308 drivers/gpu/drm/gma500/cdv_intel_dp.c struct cdv_intel_dp *intel_dp = encoder->dev_priv; intel_dp 1313 drivers/gpu/drm/gma500/cdv_intel_dp.c for (lane = 0; lane < intel_dp->lane_count; lane++) { intel_dp 1314 drivers/gpu/drm/gma500/cdv_intel_dp.c uint8_t this_v = cdv_intel_get_adjust_request_voltage(intel_dp->link_status, lane); intel_dp 1315 drivers/gpu/drm/gma500/cdv_intel_dp.c uint8_t this_p = cdv_intel_get_adjust_request_pre_emphasis(intel_dp->link_status, lane); intel_dp 1330 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->train_set[lane] = v | p; intel_dp 1367 drivers/gpu/drm/gma500/cdv_intel_dp.c struct cdv_intel_dp *intel_dp = encoder->dev_priv; intel_dp 1372 drivers/gpu/drm/gma500/cdv_intel_dp.c lane_align = cdv_intel_dp_link_status(intel_dp->link_status, intel_dp 1376 drivers/gpu/drm/gma500/cdv_intel_dp.c for (lane = 0; lane < intel_dp->lane_count; lane++) { intel_dp 1377 drivers/gpu/drm/gma500/cdv_intel_dp.c lane_status = cdv_intel_get_lane_status(intel_dp->link_status, lane); intel_dp 1392 drivers/gpu/drm/gma500/cdv_intel_dp.c struct cdv_intel_dp *intel_dp = encoder->dev_priv; intel_dp 1394 drivers/gpu/drm/gma500/cdv_intel_dp.c REG_WRITE(intel_dp->output_reg, dp_reg_value); intel_dp 1395 drivers/gpu/drm/gma500/cdv_intel_dp.c REG_READ(intel_dp->output_reg); intel_dp 1417 drivers/gpu/drm/gma500/cdv_intel_dp.c struct cdv_intel_dp *intel_dp = encoder->dev_priv; intel_dp 1421 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->train_set, intel_dp 1422 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->lane_count); intel_dp 1424 drivers/gpu/drm/gma500/cdv_intel_dp.c if (ret != intel_dp->lane_count) { intel_dp 1426 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->train_set[0], intel_dp->lane_count); intel_dp 1436 drivers/gpu/drm/gma500/cdv_intel_dp.c struct cdv_intel_dp *intel_dp = encoder->dev_priv; intel_dp 1440 drivers/gpu/drm/gma500/cdv_intel_dp.c if (intel_dp->output_reg == DP_B) intel_dp 1502 drivers/gpu/drm/gma500/cdv_intel_dp.c struct cdv_intel_dp *intel_dp = encoder->dev_priv; intel_dp 1508 drivers/gpu/drm/gma500/cdv_intel_dp.c uint32_t DP = intel_dp->DP; intel_dp 1516 drivers/gpu/drm/gma500/cdv_intel_dp.c REG_WRITE(intel_dp->output_reg, reg); intel_dp 1517 drivers/gpu/drm/gma500/cdv_intel_dp.c REG_READ(intel_dp->output_reg); intel_dp 1523 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->link_configuration, intel_dp 1526 drivers/gpu/drm/gma500/cdv_intel_dp.c memset(intel_dp->train_set, 0, 4); intel_dp 1538 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->train_set[0], intel_dp 1539 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->link_configuration[0], intel_dp 1540 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->link_configuration[1]); intel_dp 1545 drivers/gpu/drm/gma500/cdv_intel_dp.c cdv_intel_dp_set_vswing_premph(encoder, intel_dp->train_set[0]); intel_dp 1555 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->link_status[0], intel_dp->link_status[1], intel_dp->link_status[2], intel_dp 1556 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->link_status[3], intel_dp->link_status[4], intel_dp->link_status[5]); intel_dp 1558 drivers/gpu/drm/gma500/cdv_intel_dp.c if (cdv_intel_clock_recovery_ok(intel_dp->link_status, intel_dp->lane_count)) { intel_dp 1565 drivers/gpu/drm/gma500/cdv_intel_dp.c for (i = 0; i < intel_dp->lane_count; i++) intel_dp 1566 drivers/gpu/drm/gma500/cdv_intel_dp.c if ((intel_dp->train_set[i] & DP_TRAIN_MAX_SWING_REACHED) == 0) intel_dp 1568 drivers/gpu/drm/gma500/cdv_intel_dp.c if (i == intel_dp->lane_count) intel_dp 1572 drivers/gpu/drm/gma500/cdv_intel_dp.c if ((intel_dp->train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK) == voltage) { intel_dp 1578 drivers/gpu/drm/gma500/cdv_intel_dp.c voltage = intel_dp->train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK; intel_dp 1586 drivers/gpu/drm/gma500/cdv_intel_dp.c DRM_DEBUG_KMS("failure in DP patter 1 training, train set %x\n", intel_dp->train_set[0]); intel_dp 1589 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->DP = DP; intel_dp 1596 drivers/gpu/drm/gma500/cdv_intel_dp.c struct cdv_intel_dp *intel_dp = encoder->dev_priv; intel_dp 1600 drivers/gpu/drm/gma500/cdv_intel_dp.c uint32_t DP = intel_dp->DP; intel_dp 1613 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->train_set[0], intel_dp 1614 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->link_configuration[0], intel_dp 1615 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->link_configuration[1]); intel_dp 1630 drivers/gpu/drm/gma500/cdv_intel_dp.c cdv_intel_dp_set_vswing_premph(encoder, intel_dp->train_set[0]); intel_dp 1639 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->link_status[0], intel_dp->link_status[1], intel_dp->link_status[2], intel_dp 1640 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->link_status[3], intel_dp->link_status[4], intel_dp->link_status[5]); intel_dp 1643 drivers/gpu/drm/gma500/cdv_intel_dp.c if (!cdv_intel_clock_recovery_ok(intel_dp->link_status, intel_dp->lane_count)) { intel_dp 1672 drivers/gpu/drm/gma500/cdv_intel_dp.c REG_WRITE(intel_dp->output_reg, reg); intel_dp 1673 drivers/gpu/drm/gma500/cdv_intel_dp.c REG_READ(intel_dp->output_reg); intel_dp 1682 drivers/gpu/drm/gma500/cdv_intel_dp.c struct cdv_intel_dp *intel_dp = encoder->dev_priv; intel_dp 1683 drivers/gpu/drm/gma500/cdv_intel_dp.c uint32_t DP = intel_dp->DP; intel_dp 1685 drivers/gpu/drm/gma500/cdv_intel_dp.c if ((REG_READ(intel_dp->output_reg) & DP_PORT_EN) == 0) intel_dp 1693 drivers/gpu/drm/gma500/cdv_intel_dp.c REG_WRITE(intel_dp->output_reg, DP | DP_LINK_TRAIN_PAT_IDLE); intel_dp 1695 drivers/gpu/drm/gma500/cdv_intel_dp.c REG_READ(intel_dp->output_reg); intel_dp 1699 drivers/gpu/drm/gma500/cdv_intel_dp.c REG_WRITE(intel_dp->output_reg, DP & ~DP_PORT_EN); intel_dp 1700 drivers/gpu/drm/gma500/cdv_intel_dp.c REG_READ(intel_dp->output_reg); intel_dp 1705 drivers/gpu/drm/gma500/cdv_intel_dp.c struct cdv_intel_dp *intel_dp = encoder->dev_priv; intel_dp 1709 drivers/gpu/drm/gma500/cdv_intel_dp.c if (cdv_intel_dp_aux_native_read(encoder, 0x000, intel_dp->dpcd, intel_dp 1710 drivers/gpu/drm/gma500/cdv_intel_dp.c sizeof (intel_dp->dpcd)) == sizeof (intel_dp->dpcd)) intel_dp 1712 drivers/gpu/drm/gma500/cdv_intel_dp.c if (intel_dp->dpcd[DP_DPCD_REV] != 0) intel_dp 1717 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->dpcd[0], intel_dp->dpcd[1], intel_dp 1718 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->dpcd[2], intel_dp->dpcd[3]); intel_dp 1732 drivers/gpu/drm/gma500/cdv_intel_dp.c struct cdv_intel_dp *intel_dp = encoder->dev_priv; intel_dp 1737 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->has_audio = false; intel_dp 1748 drivers/gpu/drm/gma500/cdv_intel_dp.c if (intel_dp->force_audio) { intel_dp 1749 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->has_audio = intel_dp->force_audio > 0; intel_dp 1751 drivers/gpu/drm/gma500/cdv_intel_dp.c edid = drm_get_edid(connector, &intel_dp->adapter); intel_dp 1753 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->has_audio = drm_detect_monitor_audio(edid); intel_dp 1766 drivers/gpu/drm/gma500/cdv_intel_dp.c struct cdv_intel_dp *intel_dp = intel_encoder->dev_priv; intel_dp 1772 drivers/gpu/drm/gma500/cdv_intel_dp.c edid = drm_get_edid(connector, &intel_dp->adapter); intel_dp 1785 drivers/gpu/drm/gma500/cdv_intel_dp.c if (edp && !intel_dp->panel_fixed_mode) { intel_dp 1790 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->panel_fixed_mode = intel_dp 1799 drivers/gpu/drm/gma500/cdv_intel_dp.c if (!intel_dp->panel_fixed_mode && dev_priv->lfp_lvds_vbt_mode) { intel_dp 1800 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->panel_fixed_mode = intel_dp 1802 drivers/gpu/drm/gma500/cdv_intel_dp.c if (intel_dp->panel_fixed_mode) { intel_dp 1803 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->panel_fixed_mode->type |= intel_dp 1807 drivers/gpu/drm/gma500/cdv_intel_dp.c if (intel_dp->panel_fixed_mode != NULL) { intel_dp 1809 drivers/gpu/drm/gma500/cdv_intel_dp.c mode = drm_mode_duplicate(dev, intel_dp->panel_fixed_mode); intel_dp 1822 drivers/gpu/drm/gma500/cdv_intel_dp.c struct cdv_intel_dp *intel_dp = encoder->dev_priv; intel_dp 1830 drivers/gpu/drm/gma500/cdv_intel_dp.c edid = drm_get_edid(connector, &intel_dp->adapter); intel_dp 1848 drivers/gpu/drm/gma500/cdv_intel_dp.c struct cdv_intel_dp *intel_dp = encoder->dev_priv; intel_dp 1859 drivers/gpu/drm/gma500/cdv_intel_dp.c if (i == intel_dp->force_audio) intel_dp 1862 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->force_audio = i; intel_dp 1869 drivers/gpu/drm/gma500/cdv_intel_dp.c if (has_audio == intel_dp->has_audio) intel_dp 1872 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->has_audio = has_audio; intel_dp 1877 drivers/gpu/drm/gma500/cdv_intel_dp.c if (val == !!intel_dp->color_range) intel_dp 1880 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->color_range = val ? DP_COLOR_RANGE_16_235 : 0; intel_dp 1901 drivers/gpu/drm/gma500/cdv_intel_dp.c struct cdv_intel_dp *intel_dp = gma_encoder->dev_priv; intel_dp 1905 drivers/gpu/drm/gma500/cdv_intel_dp.c kfree(intel_dp->panel_fixed_mode); intel_dp 1906 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->panel_fixed_mode = NULL; intel_dp 1908 drivers/gpu/drm/gma500/cdv_intel_dp.c i2c_del_adapter(&intel_dp->adapter); intel_dp 2001 drivers/gpu/drm/gma500/cdv_intel_dp.c struct cdv_intel_dp *intel_dp; intel_dp 2011 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp = kzalloc(sizeof(struct cdv_intel_dp), GFP_KERNEL); intel_dp 2012 drivers/gpu/drm/gma500/cdv_intel_dp.c if (!intel_dp) intel_dp 2033 drivers/gpu/drm/gma500/cdv_intel_dp.c gma_encoder->dev_priv=intel_dp; intel_dp 2034 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->encoder = gma_encoder; intel_dp 2035 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->output_reg = output_reg; intel_dp 2104 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->panel_power_up_delay = cur.t1_t3 / 10; intel_dp 2105 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->backlight_on_delay = cur.t8 / 10; intel_dp 2106 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->backlight_off_delay = cur.t9 / 10; intel_dp 2107 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->panel_power_down_delay = cur.t10 / 10; intel_dp 2108 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->panel_power_cycle_delay = (cur.t11_t12 - 1) * 100; intel_dp 2111 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->panel_power_up_delay, intel_dp->panel_power_down_delay, intel_dp 2112 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->panel_power_cycle_delay); intel_dp 2115 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->backlight_on_delay, intel_dp->backlight_off_delay); intel_dp 2120 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->dpcd, intel_dp 2121 drivers/gpu/drm/gma500/cdv_intel_dp.c sizeof(intel_dp->dpcd)); intel_dp 2131 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->dpcd[0], intel_dp->dpcd[1], intel_dp 2132 drivers/gpu/drm/gma500/cdv_intel_dp.c intel_dp->dpcd[2], intel_dp->dpcd[3]); intel_dp 1199 drivers/gpu/drm/i915/display/intel_ddi.c struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); intel_dp 1203 drivers/gpu/drm/i915/display/intel_ddi.c intel_dp->DP = intel_dig_port->saved_port_bits | intel_dp 1205 drivers/gpu/drm/i915/display/intel_ddi.c intel_dp->DP |= DDI_PORT_WIDTH(intel_dp->lane_count); intel_dp 2271 drivers/gpu/drm/i915/display/intel_ddi.c struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); intel_dp 2279 drivers/gpu/drm/i915/display/intel_ddi.c intel_dp->link_rate, &n_entries); intel_dp 2404 drivers/gpu/drm/i915/display/intel_ddi.c struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); intel_dp 2406 drivers/gpu/drm/i915/display/intel_ddi.c width = intel_dp->lane_count; intel_dp 2407 drivers/gpu/drm/i915/display/intel_ddi.c rate = intel_dp->link_rate; intel_dp 2530 drivers/gpu/drm/i915/display/intel_ddi.c struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); intel_dp 2532 drivers/gpu/drm/i915/display/intel_ddi.c width = intel_dp->lane_count; intel_dp 2533 drivers/gpu/drm/i915/display/intel_ddi.c rate = intel_dp->link_rate; intel_dp 2733 drivers/gpu/drm/i915/display/intel_ddi.c static u32 intel_ddi_dp_level(struct intel_dp *intel_dp) intel_dp 2735 drivers/gpu/drm/i915/display/intel_ddi.c u8 train_set = intel_dp->train_set[0]; intel_dp 2742 drivers/gpu/drm/i915/display/intel_ddi.c u32 bxt_signal_levels(struct intel_dp *intel_dp) intel_dp 2744 drivers/gpu/drm/i915/display/intel_ddi.c struct intel_digital_port *dport = dp_to_dig_port(intel_dp); intel_dp 2747 drivers/gpu/drm/i915/display/intel_ddi.c int level = intel_ddi_dp_level(intel_dp); intel_dp 2750 drivers/gpu/drm/i915/display/intel_ddi.c icl_ddi_vswing_sequence(encoder, intel_dp->link_rate, intel_dp 2760 drivers/gpu/drm/i915/display/intel_ddi.c u32 ddi_signal_levels(struct intel_dp *intel_dp) intel_dp 2762 drivers/gpu/drm/i915/display/intel_ddi.c struct intel_digital_port *dport = dp_to_dig_port(intel_dp); intel_dp 2765 drivers/gpu/drm/i915/display/intel_ddi.c int level = intel_ddi_dp_level(intel_dp); intel_dp 3122 drivers/gpu/drm/i915/display/intel_ddi.c static void intel_dp_sink_set_fec_ready(struct intel_dp *intel_dp, intel_dp 3128 drivers/gpu/drm/i915/display/intel_ddi.c if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_FEC_CONFIGURATION, DP_FEC_READY) <= 0) intel_dp 3171 drivers/gpu/drm/i915/display/intel_ddi.c struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); intel_dp 3177 drivers/gpu/drm/i915/display/intel_ddi.c int level = intel_ddi_dp_level(intel_dp); intel_dp 3181 drivers/gpu/drm/i915/display/intel_ddi.c intel_dp_set_link_params(intel_dp, crtc_state->port_clock, intel_dp 3184 drivers/gpu/drm/i915/display/intel_ddi.c intel_edp_panel_on(intel_dp); intel_dp 3217 drivers/gpu/drm/i915/display/intel_ddi.c intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON); intel_dp 3218 drivers/gpu/drm/i915/display/intel_ddi.c intel_dp_sink_set_decompression_state(intel_dp, crtc_state, intel_dp 3220 drivers/gpu/drm/i915/display/intel_ddi.c intel_dp_sink_set_fec_ready(intel_dp, crtc_state); intel_dp 3221 drivers/gpu/drm/i915/display/intel_ddi.c intel_dp_start_link_train(intel_dp); intel_dp 3223 drivers/gpu/drm/i915/display/intel_ddi.c intel_dp_stop_link_train(intel_dp); intel_dp 3355 drivers/gpu/drm/i915/display/intel_ddi.c struct intel_dp *intel_dp = &dig_port->dp; intel_dp 3366 drivers/gpu/drm/i915/display/intel_ddi.c intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF); intel_dp 3371 drivers/gpu/drm/i915/display/intel_ddi.c intel_edp_panel_vdd_on(intel_dp); intel_dp 3372 drivers/gpu/drm/i915/display/intel_ddi.c intel_edp_panel_off(intel_dp); intel_dp 3474 drivers/gpu/drm/i915/display/intel_ddi.c struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); intel_dp 3478 drivers/gpu/drm/i915/display/intel_ddi.c intel_dp_stop_link_train(intel_dp); intel_dp 3481 drivers/gpu/drm/i915/display/intel_ddi.c intel_psr_enable(intel_dp, crtc_state); intel_dp 3482 drivers/gpu/drm/i915/display/intel_ddi.c intel_dp_ycbcr_420_enable(intel_dp, crtc_state); intel_dp 3483 drivers/gpu/drm/i915/display/intel_ddi.c intel_edp_drrs_enable(intel_dp, crtc_state); intel_dp 3590 drivers/gpu/drm/i915/display/intel_ddi.c struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); intel_dp 3592 drivers/gpu/drm/i915/display/intel_ddi.c intel_dp->link_trained = false; intel_dp 3598 drivers/gpu/drm/i915/display/intel_ddi.c intel_edp_drrs_disable(intel_dp, old_crtc_state); intel_dp 3599 drivers/gpu/drm/i915/display/intel_ddi.c intel_psr_disable(intel_dp, old_crtc_state); intel_dp 3602 drivers/gpu/drm/i915/display/intel_ddi.c intel_dp_sink_set_decompression_state(intel_dp, old_crtc_state, intel_dp 3638 drivers/gpu/drm/i915/display/intel_ddi.c struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); intel_dp 3642 drivers/gpu/drm/i915/display/intel_ddi.c intel_psr_update(intel_dp, crtc_state); intel_dp 3643 drivers/gpu/drm/i915/display/intel_ddi.c intel_edp_drrs_enable(intel_dp, crtc_state); intel_dp 3759 drivers/gpu/drm/i915/display/intel_ddi.c static void intel_ddi_prepare_link_retrain(struct intel_dp *intel_dp) intel_dp 3761 drivers/gpu/drm/i915/display/intel_ddi.c struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); intel_dp 3788 drivers/gpu/drm/i915/display/intel_ddi.c if (intel_dp->link_mst) intel_dp 3792 drivers/gpu/drm/i915/display/intel_ddi.c if (drm_dp_enhanced_frame_cap(intel_dp->dpcd)) intel_dp 3798 drivers/gpu/drm/i915/display/intel_ddi.c intel_dp->DP |= DDI_BUF_CTL_ENABLE; intel_dp 3799 drivers/gpu/drm/i915/display/intel_ddi.c I915_WRITE(DDI_BUF_CTL(port), intel_dp->DP); intel_dp 18 drivers/gpu/drm/i915/display/intel_ddi.h struct intel_dp; intel_dp 41 drivers/gpu/drm/i915/display/intel_ddi.h u32 bxt_signal_levels(struct intel_dp *intel_dp); intel_dp 42 drivers/gpu/drm/i915/display/intel_ddi.h u32 ddi_signal_levels(struct intel_dp *intel_dp); intel_dp 48 drivers/gpu/drm/i915/display/intel_display.h struct intel_dp; intel_dp 502 drivers/gpu/drm/i915/display/intel_display.h void intel_dp_ycbcr_420_enable(struct intel_dp *intel_dp, intel_dp 420 drivers/gpu/drm/i915/display/intel_display_types.h struct intel_dp *mst_port; intel_dp 1222 drivers/gpu/drm/i915/display/intel_display_types.h u32 (*get_aux_clock_divider)(struct intel_dp *dp, int index); intel_dp 1227 drivers/gpu/drm/i915/display/intel_display_types.h u32 (*get_aux_send_ctl)(struct intel_dp *dp, int send_bytes, intel_dp 1230 drivers/gpu/drm/i915/display/intel_display_types.h i915_reg_t (*aux_ch_ctl_reg)(struct intel_dp *dp); intel_dp 1231 drivers/gpu/drm/i915/display/intel_display_types.h i915_reg_t (*aux_ch_data_reg)(struct intel_dp *dp, int index); intel_dp 1234 drivers/gpu/drm/i915/display/intel_display_types.h void (*prepare_link_retrain)(struct intel_dp *intel_dp); intel_dp 1257 drivers/gpu/drm/i915/display/intel_display_types.h struct intel_dp dp; intel_dp 1398 drivers/gpu/drm/i915/display/intel_display_types.h static inline struct intel_dp *enc_to_intel_dp(struct drm_encoder *encoder) intel_dp 1424 drivers/gpu/drm/i915/display/intel_display_types.h dp_to_dig_port(struct intel_dp *intel_dp) intel_dp 1426 drivers/gpu/drm/i915/display/intel_display_types.h return container_of(intel_dp, struct intel_digital_port, dp); intel_dp 1430 drivers/gpu/drm/i915/display/intel_display_types.h dp_to_lspcon(struct intel_dp *intel_dp) intel_dp 1432 drivers/gpu/drm/i915/display/intel_display_types.h return &dp_to_dig_port(intel_dp)->lspcon; intel_dp 1436 drivers/gpu/drm/i915/display/intel_display_types.h dp_to_i915(struct intel_dp *intel_dp) intel_dp 1438 drivers/gpu/drm/i915/display/intel_display_types.h return to_i915(dp_to_dig_port(intel_dp)->base.base.dev); intel_dp 147 drivers/gpu/drm/i915/display/intel_dp.c bool intel_dp_is_edp(struct intel_dp *intel_dp) intel_dp 149 drivers/gpu/drm/i915/display/intel_dp.c struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); intel_dp 154 drivers/gpu/drm/i915/display/intel_dp.c static struct intel_dp *intel_attached_dp(struct drm_connector *connector) intel_dp 161 drivers/gpu/drm/i915/display/intel_dp.c static bool edp_panel_vdd_on(struct intel_dp *intel_dp); intel_dp 162 drivers/gpu/drm/i915/display/intel_dp.c static void edp_panel_vdd_off(struct intel_dp *intel_dp, bool sync); intel_dp 167 drivers/gpu/drm/i915/display/intel_dp.c static void intel_dp_unset_edid(struct intel_dp *intel_dp); intel_dp 170 drivers/gpu/drm/i915/display/intel_dp.c static void intel_dp_set_sink_rates(struct intel_dp *intel_dp) intel_dp 177 drivers/gpu/drm/i915/display/intel_dp.c max_rate = drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]); intel_dp 182 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->sink_rates[i] = dp_rates[i]; intel_dp 185 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->num_sink_rates = i; intel_dp 203 drivers/gpu/drm/i915/display/intel_dp.c static int intel_dp_common_len_rate_limit(const struct intel_dp *intel_dp, intel_dp 206 drivers/gpu/drm/i915/display/intel_dp.c return intel_dp_rate_limit_len(intel_dp->common_rates, intel_dp 207 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->num_common_rates, max_rate); intel_dp 211 drivers/gpu/drm/i915/display/intel_dp.c static int intel_dp_max_common_rate(struct intel_dp *intel_dp) intel_dp 213 drivers/gpu/drm/i915/display/intel_dp.c return intel_dp->common_rates[intel_dp->num_common_rates - 1]; intel_dp 217 drivers/gpu/drm/i915/display/intel_dp.c static int intel_dp_max_common_lane_count(struct intel_dp *intel_dp) intel_dp 219 drivers/gpu/drm/i915/display/intel_dp.c struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); intel_dp 221 drivers/gpu/drm/i915/display/intel_dp.c int sink_max = drm_dp_max_lane_count(intel_dp->dpcd); intel_dp 227 drivers/gpu/drm/i915/display/intel_dp.c int intel_dp_max_lane_count(struct intel_dp *intel_dp) intel_dp 229 drivers/gpu/drm/i915/display/intel_dp.c return intel_dp->max_link_lane_count; intel_dp 252 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_downstream_max_dotclock(struct intel_dp *intel_dp) intel_dp 254 drivers/gpu/drm/i915/display/intel_dp.c struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); intel_dp 260 drivers/gpu/drm/i915/display/intel_dp.c int type = intel_dp->downstream_ports[0] & DP_DS_PORT_TYPE_MASK; intel_dp 265 drivers/gpu/drm/i915/display/intel_dp.c ds_max_dotclk = drm_dp_downstream_max_clock(intel_dp->dpcd, intel_dp 266 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->downstream_ports); intel_dp 274 drivers/gpu/drm/i915/display/intel_dp.c static int cnl_max_source_rate(struct intel_dp *intel_dp) intel_dp 276 drivers/gpu/drm/i915/display/intel_dp.c struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); intel_dp 297 drivers/gpu/drm/i915/display/intel_dp.c static int icl_max_source_rate(struct intel_dp *intel_dp) intel_dp 299 drivers/gpu/drm/i915/display/intel_dp.c struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); intel_dp 305 drivers/gpu/drm/i915/display/intel_dp.c !intel_dp_is_edp(intel_dp)) intel_dp 312 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_set_source_rates(struct intel_dp *intel_dp) intel_dp 330 drivers/gpu/drm/i915/display/intel_dp.c struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); intel_dp 338 drivers/gpu/drm/i915/display/intel_dp.c WARN_ON(intel_dp->source_rates || intel_dp->num_source_rates); intel_dp 344 drivers/gpu/drm/i915/display/intel_dp.c max_rate = cnl_max_source_rate(intel_dp); intel_dp 346 drivers/gpu/drm/i915/display/intel_dp.c max_rate = icl_max_source_rate(intel_dp); intel_dp 370 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->source_rates = source_rates; intel_dp 371 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->num_source_rates = size; intel_dp 409 drivers/gpu/drm/i915/display/intel_dp.c static void intel_dp_set_common_rates(struct intel_dp *intel_dp) intel_dp 411 drivers/gpu/drm/i915/display/intel_dp.c WARN_ON(!intel_dp->num_source_rates || !intel_dp->num_sink_rates); intel_dp 413 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->num_common_rates = intersect_rates(intel_dp->source_rates, intel_dp 414 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->num_source_rates, intel_dp 415 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->sink_rates, intel_dp 416 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->num_sink_rates, intel_dp 417 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->common_rates); intel_dp 420 drivers/gpu/drm/i915/display/intel_dp.c if (WARN_ON(intel_dp->num_common_rates == 0)) { intel_dp 421 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->common_rates[0] = 162000; intel_dp 422 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->num_common_rates = 1; intel_dp 426 drivers/gpu/drm/i915/display/intel_dp.c static bool intel_dp_link_params_valid(struct intel_dp *intel_dp, int link_rate, intel_dp 435 drivers/gpu/drm/i915/display/intel_dp.c link_rate > intel_dp->max_link_rate) intel_dp 439 drivers/gpu/drm/i915/display/intel_dp.c lane_count > intel_dp_max_lane_count(intel_dp)) intel_dp 445 drivers/gpu/drm/i915/display/intel_dp.c static bool intel_dp_can_link_train_fallback_for_edp(struct intel_dp *intel_dp, intel_dp 450 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->attached_connector->panel.fixed_mode; intel_dp 461 drivers/gpu/drm/i915/display/intel_dp.c int intel_dp_get_link_train_fallback_values(struct intel_dp *intel_dp, intel_dp 466 drivers/gpu/drm/i915/display/intel_dp.c index = intel_dp_rate_index(intel_dp->common_rates, intel_dp 467 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->num_common_rates, intel_dp 470 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp_is_edp(intel_dp) && intel_dp 471 drivers/gpu/drm/i915/display/intel_dp.c !intel_dp_can_link_train_fallback_for_edp(intel_dp, intel_dp 472 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->common_rates[index - 1], intel_dp 477 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->max_link_rate = intel_dp->common_rates[index - 1]; intel_dp 478 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->max_link_lane_count = lane_count; intel_dp 480 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp_is_edp(intel_dp) && intel_dp 481 drivers/gpu/drm/i915/display/intel_dp.c !intel_dp_can_link_train_fallback_for_edp(intel_dp, intel_dp 482 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_max_common_rate(intel_dp), intel_dp 487 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->max_link_rate = intel_dp_max_common_rate(intel_dp); intel_dp 488 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->max_link_lane_count = lane_count >> 1; intel_dp 550 drivers/gpu/drm/i915/display/intel_dp.c static u8 intel_dp_dsc_get_slice_count(struct intel_dp *intel_dp, intel_dp 563 drivers/gpu/drm/i915/display/intel_dp.c max_slice_width = drm_dp_dsc_sink_max_slice_width(intel_dp->dsc_dpcd); intel_dp 577 drivers/gpu/drm/i915/display/intel_dp.c drm_dp_dsc_sink_max_slice_count(intel_dp->dsc_dpcd, intel_dp 592 drivers/gpu/drm/i915/display/intel_dp.c struct intel_dp *intel_dp = intel_attached_dp(connector); intel_dp 605 drivers/gpu/drm/i915/display/intel_dp.c max_dotclk = intel_dp_downstream_max_dotclock(intel_dp); intel_dp 607 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp_is_edp(intel_dp) && fixed_mode) { intel_dp 617 drivers/gpu/drm/i915/display/intel_dp.c max_link_clock = intel_dp_max_link_rate(intel_dp); intel_dp 618 drivers/gpu/drm/i915/display/intel_dp.c max_lanes = intel_dp_max_lane_count(intel_dp); intel_dp 628 drivers/gpu/drm/i915/display/intel_dp.c drm_dp_sink_supports_dsc(intel_dp->dsc_dpcd)) { intel_dp 629 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp_is_edp(intel_dp)) { intel_dp 631 drivers/gpu/drm/i915/display/intel_dp.c drm_edp_dsc_sink_output_bpp(intel_dp->dsc_dpcd) >> 4; intel_dp 633 drivers/gpu/drm/i915/display/intel_dp.c drm_dp_dsc_sink_max_slice_count(intel_dp->dsc_dpcd, intel_dp 635 drivers/gpu/drm/i915/display/intel_dp.c } else if (drm_dp_sink_supports_fec(intel_dp->fec_capable)) { intel_dp 642 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_dsc_get_slice_count(intel_dp, intel_dp 683 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_init_panel_power_sequencer(struct intel_dp *intel_dp); intel_dp 685 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_init_panel_power_sequencer_registers(struct intel_dp *intel_dp, intel_dp 688 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_pps_init(struct intel_dp *intel_dp); intel_dp 691 drivers/gpu/drm/i915/display/intel_dp.c pps_lock(struct intel_dp *intel_dp) intel_dp 693 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 701 drivers/gpu/drm/i915/display/intel_dp.c intel_aux_power_domain(dp_to_dig_port(intel_dp))); intel_dp 709 drivers/gpu/drm/i915/display/intel_dp.c pps_unlock(struct intel_dp *intel_dp, intel_wakeref_t wakeref) intel_dp 711 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 715 drivers/gpu/drm/i915/display/intel_dp.c intel_aux_power_domain(dp_to_dig_port(intel_dp)), intel_dp 724 drivers/gpu/drm/i915/display/intel_dp.c vlv_power_sequencer_kick(struct intel_dp *intel_dp) intel_dp 726 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 727 drivers/gpu/drm/i915/display/intel_dp.c struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); intel_dp 728 drivers/gpu/drm/i915/display/intel_dp.c enum pipe pipe = intel_dp->pps_pipe; intel_dp 734 drivers/gpu/drm/i915/display/intel_dp.c if (WARN(I915_READ(intel_dp->output_reg) & DP_PORT_EN, intel_dp 745 drivers/gpu/drm/i915/display/intel_dp.c DP = I915_READ(intel_dp->output_reg) & DP_DETECTED; intel_dp 779 drivers/gpu/drm/i915/display/intel_dp.c I915_WRITE(intel_dp->output_reg, DP); intel_dp 780 drivers/gpu/drm/i915/display/intel_dp.c POSTING_READ(intel_dp->output_reg); intel_dp 782 drivers/gpu/drm/i915/display/intel_dp.c I915_WRITE(intel_dp->output_reg, DP | DP_PORT_EN); intel_dp 783 drivers/gpu/drm/i915/display/intel_dp.c POSTING_READ(intel_dp->output_reg); intel_dp 785 drivers/gpu/drm/i915/display/intel_dp.c I915_WRITE(intel_dp->output_reg, DP & ~DP_PORT_EN); intel_dp 786 drivers/gpu/drm/i915/display/intel_dp.c POSTING_READ(intel_dp->output_reg); intel_dp 806 drivers/gpu/drm/i915/display/intel_dp.c struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); intel_dp 809 drivers/gpu/drm/i915/display/intel_dp.c WARN_ON(intel_dp->active_pipe != INVALID_PIPE && intel_dp 810 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->active_pipe != intel_dp->pps_pipe); intel_dp 812 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp->pps_pipe != INVALID_PIPE) intel_dp 813 drivers/gpu/drm/i915/display/intel_dp.c pipes &= ~(1 << intel_dp->pps_pipe); intel_dp 815 drivers/gpu/drm/i915/display/intel_dp.c WARN_ON(intel_dp->pps_pipe != INVALID_PIPE); intel_dp 817 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp->active_pipe != INVALID_PIPE) intel_dp 818 drivers/gpu/drm/i915/display/intel_dp.c pipes &= ~(1 << intel_dp->active_pipe); intel_dp 829 drivers/gpu/drm/i915/display/intel_dp.c vlv_power_sequencer_pipe(struct intel_dp *intel_dp) intel_dp 831 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 832 drivers/gpu/drm/i915/display/intel_dp.c struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); intel_dp 838 drivers/gpu/drm/i915/display/intel_dp.c WARN_ON(!intel_dp_is_edp(intel_dp)); intel_dp 840 drivers/gpu/drm/i915/display/intel_dp.c WARN_ON(intel_dp->active_pipe != INVALID_PIPE && intel_dp 841 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->active_pipe != intel_dp->pps_pipe); intel_dp 843 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp->pps_pipe != INVALID_PIPE) intel_dp 844 drivers/gpu/drm/i915/display/intel_dp.c return intel_dp->pps_pipe; intel_dp 856 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->pps_pipe = pipe; intel_dp 859 drivers/gpu/drm/i915/display/intel_dp.c pipe_name(intel_dp->pps_pipe), intel_dp 863 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_init_panel_power_sequencer(intel_dp); intel_dp 864 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_init_panel_power_sequencer_registers(intel_dp, true); intel_dp 870 drivers/gpu/drm/i915/display/intel_dp.c vlv_power_sequencer_kick(intel_dp); intel_dp 872 drivers/gpu/drm/i915/display/intel_dp.c return intel_dp->pps_pipe; intel_dp 876 drivers/gpu/drm/i915/display/intel_dp.c bxt_power_sequencer_idx(struct intel_dp *intel_dp) intel_dp 878 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 884 drivers/gpu/drm/i915/display/intel_dp.c WARN_ON(!intel_dp_is_edp(intel_dp)); intel_dp 886 drivers/gpu/drm/i915/display/intel_dp.c if (!intel_dp->pps_reset) intel_dp 889 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->pps_reset = false; intel_dp 895 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_init_panel_power_sequencer_registers(intel_dp, false); intel_dp 945 drivers/gpu/drm/i915/display/intel_dp.c vlv_initial_power_sequencer_setup(struct intel_dp *intel_dp) intel_dp 947 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 948 drivers/gpu/drm/i915/display/intel_dp.c struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); intel_dp 955 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->pps_pipe = vlv_initial_pps_pipe(dev_priv, port, intel_dp 958 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp->pps_pipe == INVALID_PIPE) intel_dp 959 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->pps_pipe = vlv_initial_pps_pipe(dev_priv, port, intel_dp 962 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp->pps_pipe == INVALID_PIPE) intel_dp 963 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->pps_pipe = vlv_initial_pps_pipe(dev_priv, port, intel_dp 967 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp->pps_pipe == INVALID_PIPE) { intel_dp 974 drivers/gpu/drm/i915/display/intel_dp.c port_name(port), pipe_name(intel_dp->pps_pipe)); intel_dp 976 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_init_panel_power_sequencer(intel_dp); intel_dp 977 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_init_panel_power_sequencer_registers(intel_dp, false); intel_dp 999 drivers/gpu/drm/i915/display/intel_dp.c struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); intel_dp 1001 drivers/gpu/drm/i915/display/intel_dp.c WARN_ON(intel_dp->active_pipe != INVALID_PIPE); intel_dp 1007 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->pps_reset = true; intel_dp 1009 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->pps_pipe = INVALID_PIPE; intel_dp 1021 drivers/gpu/drm/i915/display/intel_dp.c static void intel_pps_get_registers(struct intel_dp *intel_dp, intel_dp 1024 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 1030 drivers/gpu/drm/i915/display/intel_dp.c pps_idx = bxt_power_sequencer_idx(intel_dp); intel_dp 1032 drivers/gpu/drm/i915/display/intel_dp.c pps_idx = vlv_power_sequencer_pipe(intel_dp); intel_dp 1047 drivers/gpu/drm/i915/display/intel_dp.c _pp_ctrl_reg(struct intel_dp *intel_dp) intel_dp 1051 drivers/gpu/drm/i915/display/intel_dp.c intel_pps_get_registers(intel_dp, ®s); intel_dp 1057 drivers/gpu/drm/i915/display/intel_dp.c _pp_stat_reg(struct intel_dp *intel_dp) intel_dp 1061 drivers/gpu/drm/i915/display/intel_dp.c intel_pps_get_registers(intel_dp, ®s); intel_dp 1071 drivers/gpu/drm/i915/display/intel_dp.c struct intel_dp *intel_dp = container_of(this, typeof(* intel_dp), intel_dp 1073 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 1076 drivers/gpu/drm/i915/display/intel_dp.c if (!intel_dp_is_edp(intel_dp) || code != SYS_RESTART) intel_dp 1079 drivers/gpu/drm/i915/display/intel_dp.c with_pps_lock(intel_dp, wakeref) { intel_dp 1081 drivers/gpu/drm/i915/display/intel_dp.c enum pipe pipe = vlv_power_sequencer_pipe(intel_dp); intel_dp 1093 drivers/gpu/drm/i915/display/intel_dp.c msleep(intel_dp->panel_power_cycle_delay); intel_dp 1100 drivers/gpu/drm/i915/display/intel_dp.c static bool edp_have_panel_power(struct intel_dp *intel_dp) intel_dp 1102 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 1107 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->pps_pipe == INVALID_PIPE) intel_dp 1110 drivers/gpu/drm/i915/display/intel_dp.c return (I915_READ(_pp_stat_reg(intel_dp)) & PP_ON) != 0; intel_dp 1113 drivers/gpu/drm/i915/display/intel_dp.c static bool edp_have_panel_vdd(struct intel_dp *intel_dp) intel_dp 1115 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 1120 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->pps_pipe == INVALID_PIPE) intel_dp 1123 drivers/gpu/drm/i915/display/intel_dp.c return I915_READ(_pp_ctrl_reg(intel_dp)) & EDP_FORCE_VDD; intel_dp 1127 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_check_edp(struct intel_dp *intel_dp) intel_dp 1129 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 1131 drivers/gpu/drm/i915/display/intel_dp.c if (!intel_dp_is_edp(intel_dp)) intel_dp 1134 drivers/gpu/drm/i915/display/intel_dp.c if (!edp_have_panel_power(intel_dp) && !edp_have_panel_vdd(intel_dp)) { intel_dp 1137 drivers/gpu/drm/i915/display/intel_dp.c I915_READ(_pp_stat_reg(intel_dp)), intel_dp 1138 drivers/gpu/drm/i915/display/intel_dp.c I915_READ(_pp_ctrl_reg(intel_dp))); intel_dp 1143 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_aux_wait_done(struct intel_dp *intel_dp) intel_dp 1145 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *i915 = dp_to_i915(intel_dp); intel_dp 1146 drivers/gpu/drm/i915/display/intel_dp.c i915_reg_t ch_ctl = intel_dp->aux_ch_ctl_reg(intel_dp); intel_dp 1164 drivers/gpu/drm/i915/display/intel_dp.c static u32 g4x_get_aux_clock_divider(struct intel_dp *intel_dp, int index) intel_dp 1166 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 1178 drivers/gpu/drm/i915/display/intel_dp.c static u32 ilk_get_aux_clock_divider(struct intel_dp *intel_dp, int index) intel_dp 1180 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 1181 drivers/gpu/drm/i915/display/intel_dp.c struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); intel_dp 1197 drivers/gpu/drm/i915/display/intel_dp.c static u32 hsw_get_aux_clock_divider(struct intel_dp *intel_dp, int index) intel_dp 1199 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 1200 drivers/gpu/drm/i915/display/intel_dp.c struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); intel_dp 1211 drivers/gpu/drm/i915/display/intel_dp.c return ilk_get_aux_clock_divider(intel_dp, index); intel_dp 1214 drivers/gpu/drm/i915/display/intel_dp.c static u32 skl_get_aux_clock_divider(struct intel_dp *intel_dp, int index) intel_dp 1224 drivers/gpu/drm/i915/display/intel_dp.c static u32 g4x_get_aux_send_ctl(struct intel_dp *intel_dp, intel_dp 1228 drivers/gpu/drm/i915/display/intel_dp.c struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); intel_dp 1254 drivers/gpu/drm/i915/display/intel_dp.c static u32 skl_get_aux_send_ctl(struct intel_dp *intel_dp, intel_dp 1258 drivers/gpu/drm/i915/display/intel_dp.c struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); intel_dp 1282 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_aux_xfer(struct intel_dp *intel_dp, intel_dp 1287 drivers/gpu/drm/i915/display/intel_dp.c struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); intel_dp 1304 drivers/gpu/drm/i915/display/intel_dp.c ch_ctl = intel_dp->aux_ch_ctl_reg(intel_dp); intel_dp 1306 drivers/gpu/drm/i915/display/intel_dp.c ch_data[i] = intel_dp->aux_ch_data_reg(intel_dp, i); intel_dp 1312 drivers/gpu/drm/i915/display/intel_dp.c pps_wakeref = pps_lock(intel_dp); intel_dp 1320 drivers/gpu/drm/i915/display/intel_dp.c vdd = edp_panel_vdd_on(intel_dp); intel_dp 1328 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_check_edp(intel_dp); intel_dp 1360 drivers/gpu/drm/i915/display/intel_dp.c while ((aux_clock_divider = intel_dp->get_aux_clock_divider(intel_dp, clock++))) { intel_dp 1361 drivers/gpu/drm/i915/display/intel_dp.c u32 send_ctl = intel_dp->get_aux_send_ctl(intel_dp, intel_dp 1379 drivers/gpu/drm/i915/display/intel_dp.c status = intel_dp_aux_wait_done(intel_dp); intel_dp 1458 drivers/gpu/drm/i915/display/intel_dp.c edp_panel_vdd_off(intel_dp, false); intel_dp 1460 drivers/gpu/drm/i915/display/intel_dp.c pps_unlock(intel_dp, pps_wakeref); intel_dp 1485 drivers/gpu/drm/i915/display/intel_dp.c struct intel_dp *intel_dp = container_of(aux, struct intel_dp, aux); intel_dp 1507 drivers/gpu/drm/i915/display/intel_dp.c ret = intel_dp_aux_xfer(intel_dp, txbuf, txsize, intel_dp 1530 drivers/gpu/drm/i915/display/intel_dp.c ret = intel_dp_aux_xfer(intel_dp, txbuf, txsize, intel_dp 1554 drivers/gpu/drm/i915/display/intel_dp.c static i915_reg_t g4x_aux_ctl_reg(struct intel_dp *intel_dp) intel_dp 1556 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 1557 drivers/gpu/drm/i915/display/intel_dp.c struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); intel_dp 1571 drivers/gpu/drm/i915/display/intel_dp.c static i915_reg_t g4x_aux_data_reg(struct intel_dp *intel_dp, int index) intel_dp 1573 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 1574 drivers/gpu/drm/i915/display/intel_dp.c struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); intel_dp 1588 drivers/gpu/drm/i915/display/intel_dp.c static i915_reg_t ilk_aux_ctl_reg(struct intel_dp *intel_dp) intel_dp 1590 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 1591 drivers/gpu/drm/i915/display/intel_dp.c struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); intel_dp 1607 drivers/gpu/drm/i915/display/intel_dp.c static i915_reg_t ilk_aux_data_reg(struct intel_dp *intel_dp, int index) intel_dp 1609 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 1610 drivers/gpu/drm/i915/display/intel_dp.c struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); intel_dp 1626 drivers/gpu/drm/i915/display/intel_dp.c static i915_reg_t skl_aux_ctl_reg(struct intel_dp *intel_dp) intel_dp 1628 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 1629 drivers/gpu/drm/i915/display/intel_dp.c struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); intel_dp 1646 drivers/gpu/drm/i915/display/intel_dp.c static i915_reg_t skl_aux_data_reg(struct intel_dp *intel_dp, int index) intel_dp 1648 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 1649 drivers/gpu/drm/i915/display/intel_dp.c struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); intel_dp 1667 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_aux_fini(struct intel_dp *intel_dp) intel_dp 1669 drivers/gpu/drm/i915/display/intel_dp.c kfree(intel_dp->aux.name); intel_dp 1673 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_aux_init(struct intel_dp *intel_dp) intel_dp 1675 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 1676 drivers/gpu/drm/i915/display/intel_dp.c struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); intel_dp 1680 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->aux_ch_ctl_reg = skl_aux_ctl_reg; intel_dp 1681 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->aux_ch_data_reg = skl_aux_data_reg; intel_dp 1683 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->aux_ch_ctl_reg = ilk_aux_ctl_reg; intel_dp 1684 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->aux_ch_data_reg = ilk_aux_data_reg; intel_dp 1686 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->aux_ch_ctl_reg = g4x_aux_ctl_reg; intel_dp 1687 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->aux_ch_data_reg = g4x_aux_data_reg; intel_dp 1691 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->get_aux_clock_divider = skl_get_aux_clock_divider; intel_dp 1693 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->get_aux_clock_divider = hsw_get_aux_clock_divider; intel_dp 1695 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->get_aux_clock_divider = ilk_get_aux_clock_divider; intel_dp 1697 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->get_aux_clock_divider = g4x_get_aux_clock_divider; intel_dp 1700 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->get_aux_send_ctl = skl_get_aux_send_ctl; intel_dp 1702 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->get_aux_send_ctl = g4x_get_aux_send_ctl; intel_dp 1704 drivers/gpu/drm/i915/display/intel_dp.c drm_dp_aux_init(&intel_dp->aux); intel_dp 1707 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->aux.name = kasprintf(GFP_KERNEL, "DPDDC-%c", intel_dp 1709 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->aux.transfer = intel_dp_aux_transfer; intel_dp 1712 drivers/gpu/drm/i915/display/intel_dp.c bool intel_dp_source_supports_hbr2(struct intel_dp *intel_dp) intel_dp 1714 drivers/gpu/drm/i915/display/intel_dp.c int max_rate = intel_dp->source_rates[intel_dp->num_source_rates - 1]; intel_dp 1719 drivers/gpu/drm/i915/display/intel_dp.c bool intel_dp_source_supports_hbr3(struct intel_dp *intel_dp) intel_dp 1721 drivers/gpu/drm/i915/display/intel_dp.c int max_rate = intel_dp->source_rates[intel_dp->num_source_rates - 1]; intel_dp 1775 drivers/gpu/drm/i915/display/intel_dp.c static void intel_dp_print_rates(struct intel_dp *intel_dp) intel_dp 1783 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->source_rates, intel_dp->num_source_rates); intel_dp 1787 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->sink_rates, intel_dp->num_sink_rates); intel_dp 1791 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->common_rates, intel_dp->num_common_rates); intel_dp 1796 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_max_link_rate(struct intel_dp *intel_dp) intel_dp 1800 drivers/gpu/drm/i915/display/intel_dp.c len = intel_dp_common_len_rate_limit(intel_dp, intel_dp->max_link_rate); intel_dp 1804 drivers/gpu/drm/i915/display/intel_dp.c return intel_dp->common_rates[len - 1]; intel_dp 1807 drivers/gpu/drm/i915/display/intel_dp.c int intel_dp_rate_select(struct intel_dp *intel_dp, int rate) intel_dp 1809 drivers/gpu/drm/i915/display/intel_dp.c int i = intel_dp_rate_index(intel_dp->sink_rates, intel_dp 1810 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->num_sink_rates, rate); intel_dp 1818 drivers/gpu/drm/i915/display/intel_dp.c void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock, intel_dp 1822 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp->use_rate_select) { intel_dp 1825 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_rate_select(intel_dp, port_clock); intel_dp 1832 drivers/gpu/drm/i915/display/intel_dp.c static bool intel_dp_source_supports_fec(struct intel_dp *intel_dp, intel_dp 1835 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 1841 drivers/gpu/drm/i915/display/intel_dp.c static bool intel_dp_supports_fec(struct intel_dp *intel_dp, intel_dp 1844 drivers/gpu/drm/i915/display/intel_dp.c return intel_dp_source_supports_fec(intel_dp, pipe_config) && intel_dp 1845 drivers/gpu/drm/i915/display/intel_dp.c drm_dp_sink_supports_fec(intel_dp->fec_capable); intel_dp 1848 drivers/gpu/drm/i915/display/intel_dp.c static bool intel_dp_source_supports_dsc(struct intel_dp *intel_dp, intel_dp 1851 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 1857 drivers/gpu/drm/i915/display/intel_dp.c static bool intel_dp_supports_dsc(struct intel_dp *intel_dp, intel_dp 1860 drivers/gpu/drm/i915/display/intel_dp.c if (!intel_dp_is_edp(intel_dp) && !pipe_config->fec_enable) intel_dp 1863 drivers/gpu/drm/i915/display/intel_dp.c return intel_dp_source_supports_dsc(intel_dp, pipe_config) && intel_dp 1864 drivers/gpu/drm/i915/display/intel_dp.c drm_dp_sink_supports_dsc(intel_dp->dsc_dpcd); intel_dp 1867 drivers/gpu/drm/i915/display/intel_dp.c static int intel_dp_compute_bpp(struct intel_dp *intel_dp, intel_dp 1870 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 1871 drivers/gpu/drm/i915/display/intel_dp.c struct intel_connector *intel_connector = intel_dp->attached_connector; intel_dp 1875 drivers/gpu/drm/i915/display/intel_dp.c bpc = drm_dp_downstream_max_bpc(intel_dp->dpcd, intel_dp->downstream_ports); intel_dp 1880 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp_is_edp(intel_dp)) { intel_dp 1895 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_adjust_compliance_config(struct intel_dp *intel_dp, intel_dp 1900 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp->compliance.test_data.bpc != 0) { intel_dp 1901 drivers/gpu/drm/i915/display/intel_dp.c int bpp = 3 * intel_dp->compliance.test_data.bpc; intel_dp 1910 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp->compliance.test_type == DP_TEST_LINK_TRAINING) { intel_dp 1916 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp_link_params_valid(intel_dp, intel_dp->compliance.test_link_rate, intel_dp 1917 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->compliance.test_lane_count)) { intel_dp 1918 drivers/gpu/drm/i915/display/intel_dp.c index = intel_dp_rate_index(intel_dp->common_rates, intel_dp 1919 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->num_common_rates, intel_dp 1920 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->compliance.test_link_rate); intel_dp 1924 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->compliance.test_lane_count; intel_dp 1944 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_compute_link_config_wide(struct intel_dp *intel_dp, intel_dp 1962 drivers/gpu/drm/i915/display/intel_dp.c link_clock = intel_dp->common_rates[clock]; intel_dp 1980 drivers/gpu/drm/i915/display/intel_dp.c static int intel_dp_dsc_compute_bpp(struct intel_dp *intel_dp, u8 dsc_max_bpc) intel_dp 1985 drivers/gpu/drm/i915/display/intel_dp.c num_bpc = drm_dp_dsc_sink_supported_input_bpcs(intel_dp->dsc_dpcd, intel_dp 1995 drivers/gpu/drm/i915/display/intel_dp.c static int intel_dp_dsc_compute_config(struct intel_dp *intel_dp, intel_dp 2000 drivers/gpu/drm/i915/display/intel_dp.c struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); intel_dp 2007 drivers/gpu/drm/i915/display/intel_dp.c pipe_config->fec_enable = !intel_dp_is_edp(intel_dp) && intel_dp 2008 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_supports_fec(intel_dp, pipe_config); intel_dp 2010 drivers/gpu/drm/i915/display/intel_dp.c if (!intel_dp_supports_dsc(intel_dp, pipe_config)) intel_dp 2016 drivers/gpu/drm/i915/display/intel_dp.c pipe_bpp = intel_dp_dsc_compute_bpp(intel_dp, dsc_max_bpc); intel_dp 2028 drivers/gpu/drm/i915/display/intel_dp.c pipe_config->port_clock = intel_dp->common_rates[limits->max_clock]; intel_dp 2031 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp_is_edp(intel_dp)) { intel_dp 2033 drivers/gpu/drm/i915/display/intel_dp.c min_t(u16, drm_edp_dsc_sink_output_bpp(intel_dp->dsc_dpcd) >> 4, intel_dp 2036 drivers/gpu/drm/i915/display/intel_dp.c drm_dp_dsc_sink_max_slice_count(intel_dp->dsc_dpcd, intel_dp 2048 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_dsc_get_slice_count(intel_dp, intel_dp 2074 drivers/gpu/drm/i915/display/intel_dp.c ret = intel_dp_compute_dsc_params(intel_dp, pipe_config); intel_dp 2107 drivers/gpu/drm/i915/display/intel_dp.c struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); intel_dp 2112 drivers/gpu/drm/i915/display/intel_dp.c common_len = intel_dp_common_len_rate_limit(intel_dp, intel_dp 2113 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->max_link_rate); intel_dp 2122 drivers/gpu/drm/i915/display/intel_dp.c limits.max_lane_count = intel_dp_max_lane_count(intel_dp); intel_dp 2125 drivers/gpu/drm/i915/display/intel_dp.c limits.max_bpp = intel_dp_compute_bpp(intel_dp, pipe_config); intel_dp 2127 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp_is_edp(intel_dp)) { intel_dp 2139 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_adjust_compliance_config(intel_dp, pipe_config, &limits); intel_dp 2144 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->common_rates[limits.max_clock], intel_dp 2151 drivers/gpu/drm/i915/display/intel_dp.c ret = intel_dp_compute_link_config_wide(intel_dp, pipe_config, &limits); intel_dp 2154 drivers/gpu/drm/i915/display/intel_dp.c DRM_DEBUG_KMS("Force DSC en = %d\n", intel_dp->force_dsc_en); intel_dp 2155 drivers/gpu/drm/i915/display/intel_dp.c if (ret || intel_dp->force_dsc_en) { intel_dp 2156 drivers/gpu/drm/i915/display/intel_dp.c ret = intel_dp_dsc_compute_config(intel_dp, pipe_config, intel_dp 2188 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_ycbcr420_config(struct intel_dp *intel_dp, intel_dp 2199 drivers/gpu/drm/i915/display/intel_dp.c !intel_dp_get_colorimetry_status(intel_dp) || intel_dp 2247 drivers/gpu/drm/i915/display/intel_dp.c struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); intel_dp 2251 drivers/gpu/drm/i915/display/intel_dp.c struct intel_connector *intel_connector = intel_dp->attached_connector; intel_dp 2254 drivers/gpu/drm/i915/display/intel_dp.c bool constant_n = drm_dp_has_quirk(&intel_dp->desc, intel_dp 2265 drivers/gpu/drm/i915/display/intel_dp.c ret = intel_dp_ycbcr420_config(intel_dp, &intel_connector->base, intel_dp 2275 drivers/gpu/drm/i915/display/intel_dp.c pipe_config->has_audio = intel_dp->has_audio; intel_dp 2279 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp_is_edp(intel_dp) && intel_connector->panel.fixed_mode) { intel_dp 2340 drivers/gpu/drm/i915/display/intel_dp.c intel_psr_compute_config(intel_dp, pipe_config); intel_dp 2345 drivers/gpu/drm/i915/display/intel_dp.c void intel_dp_set_link_params(struct intel_dp *intel_dp, intel_dp 2349 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->link_trained = false; intel_dp 2350 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->link_rate = link_rate; intel_dp 2351 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->lane_count = lane_count; intel_dp 2352 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->link_mst = link_mst; intel_dp 2359 drivers/gpu/drm/i915/display/intel_dp.c struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); intel_dp 2364 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_set_link_params(intel_dp, pipe_config->port_clock, intel_dp 2389 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->DP = I915_READ(intel_dp->output_reg) & DP_DETECTED; intel_dp 2392 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->DP |= DP_VOLTAGE_0_4 | DP_PRE_EMPHASIS_0; intel_dp 2393 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->DP |= DP_PORT_WIDTH(pipe_config->lane_count); intel_dp 2399 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->DP |= DP_SYNC_HS_HIGH; intel_dp 2401 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->DP |= DP_SYNC_VS_HIGH; intel_dp 2402 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->DP |= DP_LINK_TRAIN_OFF_CPT; intel_dp 2404 drivers/gpu/drm/i915/display/intel_dp.c if (drm_dp_enhanced_frame_cap(intel_dp->dpcd)) intel_dp 2405 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->DP |= DP_ENHANCED_FRAMING; intel_dp 2407 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->DP |= DP_PIPE_SEL_IVB(crtc->pipe); intel_dp 2411 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->DP |= DP_LINK_TRAIN_OFF_CPT; intel_dp 2414 drivers/gpu/drm/i915/display/intel_dp.c if (drm_dp_enhanced_frame_cap(intel_dp->dpcd)) intel_dp 2421 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->DP |= DP_COLOR_RANGE_16_235; intel_dp 2424 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->DP |= DP_SYNC_HS_HIGH; intel_dp 2426 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->DP |= DP_SYNC_VS_HIGH; intel_dp 2427 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->DP |= DP_LINK_TRAIN_OFF; intel_dp 2429 drivers/gpu/drm/i915/display/intel_dp.c if (drm_dp_enhanced_frame_cap(intel_dp->dpcd)) intel_dp 2430 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->DP |= DP_ENHANCED_FRAMING; intel_dp 2433 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->DP |= DP_PIPE_SEL_CHV(crtc->pipe); intel_dp 2435 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->DP |= DP_PIPE_SEL(crtc->pipe); intel_dp 2448 drivers/gpu/drm/i915/display/intel_dp.c static void intel_pps_verify_state(struct intel_dp *intel_dp); intel_dp 2450 drivers/gpu/drm/i915/display/intel_dp.c static void wait_panel_status(struct intel_dp *intel_dp, intel_dp 2454 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 2459 drivers/gpu/drm/i915/display/intel_dp.c intel_pps_verify_state(intel_dp); intel_dp 2461 drivers/gpu/drm/i915/display/intel_dp.c pp_stat_reg = _pp_stat_reg(intel_dp); intel_dp 2462 drivers/gpu/drm/i915/display/intel_dp.c pp_ctrl_reg = _pp_ctrl_reg(intel_dp); intel_dp 2478 drivers/gpu/drm/i915/display/intel_dp.c static void wait_panel_on(struct intel_dp *intel_dp) intel_dp 2481 drivers/gpu/drm/i915/display/intel_dp.c wait_panel_status(intel_dp, IDLE_ON_MASK, IDLE_ON_VALUE); intel_dp 2484 drivers/gpu/drm/i915/display/intel_dp.c static void wait_panel_off(struct intel_dp *intel_dp) intel_dp 2487 drivers/gpu/drm/i915/display/intel_dp.c wait_panel_status(intel_dp, IDLE_OFF_MASK, IDLE_OFF_VALUE); intel_dp 2490 drivers/gpu/drm/i915/display/intel_dp.c static void wait_panel_power_cycle(struct intel_dp *intel_dp) intel_dp 2500 drivers/gpu/drm/i915/display/intel_dp.c panel_power_off_duration = ktime_ms_delta(panel_power_on_time, intel_dp->panel_power_off_time); intel_dp 2504 drivers/gpu/drm/i915/display/intel_dp.c if (panel_power_off_duration < (s64)intel_dp->panel_power_cycle_delay) intel_dp 2506 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->panel_power_cycle_delay - panel_power_off_duration); intel_dp 2508 drivers/gpu/drm/i915/display/intel_dp.c wait_panel_status(intel_dp, IDLE_CYCLE_MASK, IDLE_CYCLE_VALUE); intel_dp 2511 drivers/gpu/drm/i915/display/intel_dp.c static void wait_backlight_on(struct intel_dp *intel_dp) intel_dp 2513 drivers/gpu/drm/i915/display/intel_dp.c wait_remaining_ms_from_jiffies(intel_dp->last_power_on, intel_dp 2514 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->backlight_on_delay); intel_dp 2517 drivers/gpu/drm/i915/display/intel_dp.c static void edp_wait_backlight_off(struct intel_dp *intel_dp) intel_dp 2519 drivers/gpu/drm/i915/display/intel_dp.c wait_remaining_ms_from_jiffies(intel_dp->last_backlight_off, intel_dp 2520 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->backlight_off_delay); intel_dp 2527 drivers/gpu/drm/i915/display/intel_dp.c static u32 ironlake_get_pp_control(struct intel_dp *intel_dp) intel_dp 2529 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 2534 drivers/gpu/drm/i915/display/intel_dp.c control = I915_READ(_pp_ctrl_reg(intel_dp)); intel_dp 2548 drivers/gpu/drm/i915/display/intel_dp.c static bool edp_panel_vdd_on(struct intel_dp *intel_dp) intel_dp 2550 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 2551 drivers/gpu/drm/i915/display/intel_dp.c struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); intel_dp 2554 drivers/gpu/drm/i915/display/intel_dp.c bool need_to_disable = !intel_dp->want_panel_vdd; intel_dp 2558 drivers/gpu/drm/i915/display/intel_dp.c if (!intel_dp_is_edp(intel_dp)) intel_dp 2561 drivers/gpu/drm/i915/display/intel_dp.c cancel_delayed_work(&intel_dp->panel_vdd_work); intel_dp 2562 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->want_panel_vdd = true; intel_dp 2564 drivers/gpu/drm/i915/display/intel_dp.c if (edp_have_panel_vdd(intel_dp)) intel_dp 2573 drivers/gpu/drm/i915/display/intel_dp.c if (!edp_have_panel_power(intel_dp)) intel_dp 2574 drivers/gpu/drm/i915/display/intel_dp.c wait_panel_power_cycle(intel_dp); intel_dp 2576 drivers/gpu/drm/i915/display/intel_dp.c pp = ironlake_get_pp_control(intel_dp); intel_dp 2579 drivers/gpu/drm/i915/display/intel_dp.c pp_stat_reg = _pp_stat_reg(intel_dp); intel_dp 2580 drivers/gpu/drm/i915/display/intel_dp.c pp_ctrl_reg = _pp_ctrl_reg(intel_dp); intel_dp 2589 drivers/gpu/drm/i915/display/intel_dp.c if (!edp_have_panel_power(intel_dp)) { intel_dp 2592 drivers/gpu/drm/i915/display/intel_dp.c msleep(intel_dp->panel_power_up_delay); intel_dp 2605 drivers/gpu/drm/i915/display/intel_dp.c void intel_edp_panel_vdd_on(struct intel_dp *intel_dp) intel_dp 2610 drivers/gpu/drm/i915/display/intel_dp.c if (!intel_dp_is_edp(intel_dp)) intel_dp 2614 drivers/gpu/drm/i915/display/intel_dp.c with_pps_lock(intel_dp, wakeref) intel_dp 2615 drivers/gpu/drm/i915/display/intel_dp.c vdd = edp_panel_vdd_on(intel_dp); intel_dp 2617 drivers/gpu/drm/i915/display/intel_dp.c port_name(dp_to_dig_port(intel_dp)->base.port)); intel_dp 2620 drivers/gpu/drm/i915/display/intel_dp.c static void edp_panel_vdd_off_sync(struct intel_dp *intel_dp) intel_dp 2622 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 2624 drivers/gpu/drm/i915/display/intel_dp.c dp_to_dig_port(intel_dp); intel_dp 2630 drivers/gpu/drm/i915/display/intel_dp.c WARN_ON(intel_dp->want_panel_vdd); intel_dp 2632 drivers/gpu/drm/i915/display/intel_dp.c if (!edp_have_panel_vdd(intel_dp)) intel_dp 2638 drivers/gpu/drm/i915/display/intel_dp.c pp = ironlake_get_pp_control(intel_dp); intel_dp 2641 drivers/gpu/drm/i915/display/intel_dp.c pp_ctrl_reg = _pp_ctrl_reg(intel_dp); intel_dp 2642 drivers/gpu/drm/i915/display/intel_dp.c pp_stat_reg = _pp_stat_reg(intel_dp); intel_dp 2652 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->panel_power_off_time = ktime_get_boottime(); intel_dp 2660 drivers/gpu/drm/i915/display/intel_dp.c struct intel_dp *intel_dp = intel_dp 2662 drivers/gpu/drm/i915/display/intel_dp.c struct intel_dp, panel_vdd_work); intel_dp 2665 drivers/gpu/drm/i915/display/intel_dp.c with_pps_lock(intel_dp, wakeref) { intel_dp 2666 drivers/gpu/drm/i915/display/intel_dp.c if (!intel_dp->want_panel_vdd) intel_dp 2667 drivers/gpu/drm/i915/display/intel_dp.c edp_panel_vdd_off_sync(intel_dp); intel_dp 2671 drivers/gpu/drm/i915/display/intel_dp.c static void edp_panel_vdd_schedule_off(struct intel_dp *intel_dp) intel_dp 2680 drivers/gpu/drm/i915/display/intel_dp.c delay = msecs_to_jiffies(intel_dp->panel_power_cycle_delay * 5); intel_dp 2681 drivers/gpu/drm/i915/display/intel_dp.c schedule_delayed_work(&intel_dp->panel_vdd_work, delay); intel_dp 2689 drivers/gpu/drm/i915/display/intel_dp.c static void edp_panel_vdd_off(struct intel_dp *intel_dp, bool sync) intel_dp 2691 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 2695 drivers/gpu/drm/i915/display/intel_dp.c if (!intel_dp_is_edp(intel_dp)) intel_dp 2698 drivers/gpu/drm/i915/display/intel_dp.c I915_STATE_WARN(!intel_dp->want_panel_vdd, "eDP port %c VDD not forced on", intel_dp 2699 drivers/gpu/drm/i915/display/intel_dp.c port_name(dp_to_dig_port(intel_dp)->base.port)); intel_dp 2701 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->want_panel_vdd = false; intel_dp 2704 drivers/gpu/drm/i915/display/intel_dp.c edp_panel_vdd_off_sync(intel_dp); intel_dp 2706 drivers/gpu/drm/i915/display/intel_dp.c edp_panel_vdd_schedule_off(intel_dp); intel_dp 2709 drivers/gpu/drm/i915/display/intel_dp.c static void edp_panel_on(struct intel_dp *intel_dp) intel_dp 2711 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 2717 drivers/gpu/drm/i915/display/intel_dp.c if (!intel_dp_is_edp(intel_dp)) intel_dp 2721 drivers/gpu/drm/i915/display/intel_dp.c port_name(dp_to_dig_port(intel_dp)->base.port)); intel_dp 2723 drivers/gpu/drm/i915/display/intel_dp.c if (WARN(edp_have_panel_power(intel_dp), intel_dp 2725 drivers/gpu/drm/i915/display/intel_dp.c port_name(dp_to_dig_port(intel_dp)->base.port))) intel_dp 2728 drivers/gpu/drm/i915/display/intel_dp.c wait_panel_power_cycle(intel_dp); intel_dp 2730 drivers/gpu/drm/i915/display/intel_dp.c pp_ctrl_reg = _pp_ctrl_reg(intel_dp); intel_dp 2731 drivers/gpu/drm/i915/display/intel_dp.c pp = ironlake_get_pp_control(intel_dp); intel_dp 2746 drivers/gpu/drm/i915/display/intel_dp.c wait_panel_on(intel_dp); intel_dp 2747 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->last_power_on = jiffies; intel_dp 2756 drivers/gpu/drm/i915/display/intel_dp.c void intel_edp_panel_on(struct intel_dp *intel_dp) intel_dp 2760 drivers/gpu/drm/i915/display/intel_dp.c if (!intel_dp_is_edp(intel_dp)) intel_dp 2763 drivers/gpu/drm/i915/display/intel_dp.c with_pps_lock(intel_dp, wakeref) intel_dp 2764 drivers/gpu/drm/i915/display/intel_dp.c edp_panel_on(intel_dp); intel_dp 2768 drivers/gpu/drm/i915/display/intel_dp.c static void edp_panel_off(struct intel_dp *intel_dp) intel_dp 2770 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 2771 drivers/gpu/drm/i915/display/intel_dp.c struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); intel_dp 2777 drivers/gpu/drm/i915/display/intel_dp.c if (!intel_dp_is_edp(intel_dp)) intel_dp 2783 drivers/gpu/drm/i915/display/intel_dp.c WARN(!intel_dp->want_panel_vdd, "Need eDP port %c VDD to turn off panel\n", intel_dp 2786 drivers/gpu/drm/i915/display/intel_dp.c pp = ironlake_get_pp_control(intel_dp); intel_dp 2792 drivers/gpu/drm/i915/display/intel_dp.c pp_ctrl_reg = _pp_ctrl_reg(intel_dp); intel_dp 2794 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->want_panel_vdd = false; intel_dp 2799 drivers/gpu/drm/i915/display/intel_dp.c wait_panel_off(intel_dp); intel_dp 2800 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->panel_power_off_time = ktime_get_boottime(); intel_dp 2806 drivers/gpu/drm/i915/display/intel_dp.c void intel_edp_panel_off(struct intel_dp *intel_dp) intel_dp 2810 drivers/gpu/drm/i915/display/intel_dp.c if (!intel_dp_is_edp(intel_dp)) intel_dp 2813 drivers/gpu/drm/i915/display/intel_dp.c with_pps_lock(intel_dp, wakeref) intel_dp 2814 drivers/gpu/drm/i915/display/intel_dp.c edp_panel_off(intel_dp); intel_dp 2818 drivers/gpu/drm/i915/display/intel_dp.c static void _intel_edp_backlight_on(struct intel_dp *intel_dp) intel_dp 2820 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 2829 drivers/gpu/drm/i915/display/intel_dp.c wait_backlight_on(intel_dp); intel_dp 2831 drivers/gpu/drm/i915/display/intel_dp.c with_pps_lock(intel_dp, wakeref) { intel_dp 2832 drivers/gpu/drm/i915/display/intel_dp.c i915_reg_t pp_ctrl_reg = _pp_ctrl_reg(intel_dp); intel_dp 2835 drivers/gpu/drm/i915/display/intel_dp.c pp = ironlake_get_pp_control(intel_dp); intel_dp 2847 drivers/gpu/drm/i915/display/intel_dp.c struct intel_dp *intel_dp = enc_to_intel_dp(conn_state->best_encoder); intel_dp 2849 drivers/gpu/drm/i915/display/intel_dp.c if (!intel_dp_is_edp(intel_dp)) intel_dp 2855 drivers/gpu/drm/i915/display/intel_dp.c _intel_edp_backlight_on(intel_dp); intel_dp 2859 drivers/gpu/drm/i915/display/intel_dp.c static void _intel_edp_backlight_off(struct intel_dp *intel_dp) intel_dp 2861 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 2864 drivers/gpu/drm/i915/display/intel_dp.c if (!intel_dp_is_edp(intel_dp)) intel_dp 2867 drivers/gpu/drm/i915/display/intel_dp.c with_pps_lock(intel_dp, wakeref) { intel_dp 2868 drivers/gpu/drm/i915/display/intel_dp.c i915_reg_t pp_ctrl_reg = _pp_ctrl_reg(intel_dp); intel_dp 2871 drivers/gpu/drm/i915/display/intel_dp.c pp = ironlake_get_pp_control(intel_dp); intel_dp 2878 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->last_backlight_off = jiffies; intel_dp 2879 drivers/gpu/drm/i915/display/intel_dp.c edp_wait_backlight_off(intel_dp); intel_dp 2885 drivers/gpu/drm/i915/display/intel_dp.c struct intel_dp *intel_dp = enc_to_intel_dp(old_conn_state->best_encoder); intel_dp 2887 drivers/gpu/drm/i915/display/intel_dp.c if (!intel_dp_is_edp(intel_dp)) intel_dp 2892 drivers/gpu/drm/i915/display/intel_dp.c _intel_edp_backlight_off(intel_dp); intel_dp 2903 drivers/gpu/drm/i915/display/intel_dp.c struct intel_dp *intel_dp = intel_attached_dp(&connector->base); intel_dp 2908 drivers/gpu/drm/i915/display/intel_dp.c with_pps_lock(intel_dp, wakeref) intel_dp 2909 drivers/gpu/drm/i915/display/intel_dp.c is_enabled = ironlake_get_pp_control(intel_dp) & EDP_BLC_ENABLE; intel_dp 2917 drivers/gpu/drm/i915/display/intel_dp.c _intel_edp_backlight_on(intel_dp); intel_dp 2919 drivers/gpu/drm/i915/display/intel_dp.c _intel_edp_backlight_off(intel_dp); intel_dp 2922 drivers/gpu/drm/i915/display/intel_dp.c static void assert_dp_port(struct intel_dp *intel_dp, bool state) intel_dp 2924 drivers/gpu/drm/i915/display/intel_dp.c struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); intel_dp 2926 drivers/gpu/drm/i915/display/intel_dp.c bool cur_state = I915_READ(intel_dp->output_reg) & DP_PORT_EN; intel_dp 2946 drivers/gpu/drm/i915/display/intel_dp.c static void ironlake_edp_pll_on(struct intel_dp *intel_dp, intel_dp 2953 drivers/gpu/drm/i915/display/intel_dp.c assert_dp_port_disabled(intel_dp); intel_dp 2959 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->DP &= ~DP_PLL_FREQ_MASK; intel_dp 2962 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->DP |= DP_PLL_FREQ_162MHZ; intel_dp 2964 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->DP |= DP_PLL_FREQ_270MHZ; intel_dp 2966 drivers/gpu/drm/i915/display/intel_dp.c I915_WRITE(DP_A, intel_dp->DP); intel_dp 2979 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->DP |= DP_PLL_ENABLE; intel_dp 2981 drivers/gpu/drm/i915/display/intel_dp.c I915_WRITE(DP_A, intel_dp->DP); intel_dp 2986 drivers/gpu/drm/i915/display/intel_dp.c static void ironlake_edp_pll_off(struct intel_dp *intel_dp, intel_dp 2993 drivers/gpu/drm/i915/display/intel_dp.c assert_dp_port_disabled(intel_dp); intel_dp 2998 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->DP &= ~DP_PLL_ENABLE; intel_dp 3000 drivers/gpu/drm/i915/display/intel_dp.c I915_WRITE(DP_A, intel_dp->DP); intel_dp 3005 drivers/gpu/drm/i915/display/intel_dp.c static bool downstream_hpd_needs_d0(struct intel_dp *intel_dp) intel_dp 3015 drivers/gpu/drm/i915/display/intel_dp.c return intel_dp->dpcd[DP_DPCD_REV] == 0x11 && intel_dp 3016 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->dpcd[DP_DOWNSTREAMPORT_PRESENT] & DP_DWN_STRM_PORT_PRESENT && intel_dp 3017 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->downstream_ports[0] & DP_DS_PORT_HPD; intel_dp 3020 drivers/gpu/drm/i915/display/intel_dp.c void intel_dp_sink_set_decompression_state(struct intel_dp *intel_dp, intel_dp 3029 drivers/gpu/drm/i915/display/intel_dp.c ret = drm_dp_dpcd_writeb(&intel_dp->aux, DP_DSC_ENABLE, intel_dp 3037 drivers/gpu/drm/i915/display/intel_dp.c void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode) intel_dp 3042 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp->dpcd[DP_DPCD_REV] < 0x11) intel_dp 3046 drivers/gpu/drm/i915/display/intel_dp.c if (downstream_hpd_needs_d0(intel_dp)) intel_dp 3049 drivers/gpu/drm/i915/display/intel_dp.c ret = drm_dp_dpcd_writeb(&intel_dp->aux, DP_SET_POWER, intel_dp 3052 drivers/gpu/drm/i915/display/intel_dp.c struct intel_lspcon *lspcon = dp_to_lspcon(intel_dp); intel_dp 3059 drivers/gpu/drm/i915/display/intel_dp.c ret = drm_dp_dpcd_writeb(&intel_dp->aux, DP_SET_POWER, intel_dp 3125 drivers/gpu/drm/i915/display/intel_dp.c struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); intel_dp 3134 drivers/gpu/drm/i915/display/intel_dp.c ret = intel_dp_port_enabled(dev_priv, intel_dp->output_reg, intel_dp 3146 drivers/gpu/drm/i915/display/intel_dp.c struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); intel_dp 3156 drivers/gpu/drm/i915/display/intel_dp.c tmp = I915_READ(intel_dp->output_reg); intel_dp 3205 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp_is_edp(intel_dp) && dev_priv->vbt.edp.bpp && intel_dp 3230 drivers/gpu/drm/i915/display/intel_dp.c struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); intel_dp 3232 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->link_trained = false; intel_dp 3240 drivers/gpu/drm/i915/display/intel_dp.c intel_edp_panel_vdd_on(intel_dp); intel_dp 3242 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF); intel_dp 3243 drivers/gpu/drm/i915/display/intel_dp.c intel_edp_panel_off(intel_dp); intel_dp 3264 drivers/gpu/drm/i915/display/intel_dp.c struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); intel_dp 3277 drivers/gpu/drm/i915/display/intel_dp.c ironlake_edp_pll_off(intel_dp, old_crtc_state); intel_dp 3304 drivers/gpu/drm/i915/display/intel_dp.c _intel_dp_set_link_train(struct intel_dp *intel_dp, intel_dp 3308 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 3309 drivers/gpu/drm/i915/display/intel_dp.c struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); intel_dp 3311 drivers/gpu/drm/i915/display/intel_dp.c u8 train_pat_mask = drm_dp_training_pattern_mask(intel_dp->dpcd); intel_dp 3387 drivers/gpu/drm/i915/display/intel_dp.c static void intel_dp_enable_port(struct intel_dp *intel_dp, intel_dp 3390 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 3394 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_program_link_training_pattern(intel_dp, DP_TRAINING_PATTERN_1); intel_dp 3402 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->DP |= DP_PORT_EN; intel_dp 3404 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->DP |= DP_AUDIO_OUTPUT_ENABLE; intel_dp 3406 drivers/gpu/drm/i915/display/intel_dp.c I915_WRITE(intel_dp->output_reg, intel_dp->DP); intel_dp 3407 drivers/gpu/drm/i915/display/intel_dp.c POSTING_READ(intel_dp->output_reg); intel_dp 3415 drivers/gpu/drm/i915/display/intel_dp.c struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); intel_dp 3417 drivers/gpu/drm/i915/display/intel_dp.c u32 dp_reg = I915_READ(intel_dp->output_reg); intel_dp 3424 drivers/gpu/drm/i915/display/intel_dp.c with_pps_lock(intel_dp, wakeref) { intel_dp 3428 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_enable_port(intel_dp, pipe_config); intel_dp 3430 drivers/gpu/drm/i915/display/intel_dp.c edp_panel_vdd_on(intel_dp); intel_dp 3431 drivers/gpu/drm/i915/display/intel_dp.c edp_panel_on(intel_dp); intel_dp 3432 drivers/gpu/drm/i915/display/intel_dp.c edp_panel_vdd_off(intel_dp, true); intel_dp 3441 drivers/gpu/drm/i915/display/intel_dp.c vlv_wait_port_ready(dev_priv, dp_to_dig_port(intel_dp), intel_dp 3445 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON); intel_dp 3446 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_start_link_train(intel_dp); intel_dp 3447 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_stop_link_train(intel_dp); intel_dp 3475 drivers/gpu/drm/i915/display/intel_dp.c struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); intel_dp 3482 drivers/gpu/drm/i915/display/intel_dp.c ironlake_edp_pll_on(intel_dp, pipe_config); intel_dp 3485 drivers/gpu/drm/i915/display/intel_dp.c static void vlv_detach_power_sequencer(struct intel_dp *intel_dp) intel_dp 3487 drivers/gpu/drm/i915/display/intel_dp.c struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); intel_dp 3489 drivers/gpu/drm/i915/display/intel_dp.c enum pipe pipe = intel_dp->pps_pipe; intel_dp 3492 drivers/gpu/drm/i915/display/intel_dp.c WARN_ON(intel_dp->active_pipe != INVALID_PIPE); intel_dp 3497 drivers/gpu/drm/i915/display/intel_dp.c edp_panel_vdd_off_sync(intel_dp); intel_dp 3513 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->pps_pipe = INVALID_PIPE; intel_dp 3524 drivers/gpu/drm/i915/display/intel_dp.c struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); intel_dp 3527 drivers/gpu/drm/i915/display/intel_dp.c WARN(intel_dp->active_pipe == pipe, intel_dp 3531 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp->pps_pipe != pipe) intel_dp 3538 drivers/gpu/drm/i915/display/intel_dp.c vlv_detach_power_sequencer(intel_dp); intel_dp 3546 drivers/gpu/drm/i915/display/intel_dp.c struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); intel_dp 3551 drivers/gpu/drm/i915/display/intel_dp.c WARN_ON(intel_dp->active_pipe != INVALID_PIPE); intel_dp 3553 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp->pps_pipe != INVALID_PIPE && intel_dp 3554 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->pps_pipe != crtc->pipe) { intel_dp 3560 drivers/gpu/drm/i915/display/intel_dp.c vlv_detach_power_sequencer(intel_dp); intel_dp 3569 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->active_pipe = crtc->pipe; intel_dp 3571 drivers/gpu/drm/i915/display/intel_dp.c if (!intel_dp_is_edp(intel_dp)) intel_dp 3575 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->pps_pipe = crtc->pipe; intel_dp 3578 drivers/gpu/drm/i915/display/intel_dp.c pipe_name(intel_dp->pps_pipe), port_name(encoder->port)); intel_dp 3581 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_init_panel_power_sequencer(intel_dp); intel_dp 3582 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_init_panel_power_sequencer_registers(intel_dp, true); intel_dp 3636 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_get_link_status(struct intel_dp *intel_dp, u8 link_status[DP_LINK_STATUS_SIZE]) intel_dp 3638 drivers/gpu/drm/i915/display/intel_dp.c return drm_dp_dpcd_read(&intel_dp->aux, DP_LANE0_1_STATUS, link_status, intel_dp 3644 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_voltage_max(struct intel_dp *intel_dp) intel_dp 3646 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 3647 drivers/gpu/drm/i915/display/intel_dp.c struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base; intel_dp 3663 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_pre_emphasis_max(struct intel_dp *intel_dp, u8 voltage_swing) intel_dp 3665 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 3666 drivers/gpu/drm/i915/display/intel_dp.c struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base; intel_dp 3708 drivers/gpu/drm/i915/display/intel_dp.c static u32 vlv_signal_levels(struct intel_dp *intel_dp) intel_dp 3710 drivers/gpu/drm/i915/display/intel_dp.c struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base; intel_dp 3713 drivers/gpu/drm/i915/display/intel_dp.c u8 train_set = intel_dp->train_set[0]; intel_dp 3794 drivers/gpu/drm/i915/display/intel_dp.c static u32 chv_signal_levels(struct intel_dp *intel_dp) intel_dp 3796 drivers/gpu/drm/i915/display/intel_dp.c struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base; intel_dp 3799 drivers/gpu/drm/i915/display/intel_dp.c u8 train_set = intel_dp->train_set[0]; intel_dp 3975 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_set_signal_levels(struct intel_dp *intel_dp) intel_dp 3977 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 3978 drivers/gpu/drm/i915/display/intel_dp.c struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); intel_dp 3981 drivers/gpu/drm/i915/display/intel_dp.c u8 train_set = intel_dp->train_set[0]; intel_dp 3984 drivers/gpu/drm/i915/display/intel_dp.c signal_levels = bxt_signal_levels(intel_dp); intel_dp 3986 drivers/gpu/drm/i915/display/intel_dp.c signal_levels = ddi_signal_levels(intel_dp); intel_dp 3989 drivers/gpu/drm/i915/display/intel_dp.c signal_levels = chv_signal_levels(intel_dp); intel_dp 3991 drivers/gpu/drm/i915/display/intel_dp.c signal_levels = vlv_signal_levels(intel_dp); intel_dp 4012 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->DP = (intel_dp->DP & ~mask) | signal_levels; intel_dp 4014 drivers/gpu/drm/i915/display/intel_dp.c I915_WRITE(intel_dp->output_reg, intel_dp->DP); intel_dp 4015 drivers/gpu/drm/i915/display/intel_dp.c POSTING_READ(intel_dp->output_reg); intel_dp 4019 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_program_link_training_pattern(struct intel_dp *intel_dp, intel_dp 4022 drivers/gpu/drm/i915/display/intel_dp.c struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); intel_dp 4026 drivers/gpu/drm/i915/display/intel_dp.c _intel_dp_set_link_train(intel_dp, &intel_dp->DP, dp_train_pat); intel_dp 4028 drivers/gpu/drm/i915/display/intel_dp.c I915_WRITE(intel_dp->output_reg, intel_dp->DP); intel_dp 4029 drivers/gpu/drm/i915/display/intel_dp.c POSTING_READ(intel_dp->output_reg); intel_dp 4032 drivers/gpu/drm/i915/display/intel_dp.c void intel_dp_set_idle_link_train(struct intel_dp *intel_dp) intel_dp 4034 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 4035 drivers/gpu/drm/i915/display/intel_dp.c struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); intel_dp 4067 drivers/gpu/drm/i915/display/intel_dp.c struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); intel_dp 4070 drivers/gpu/drm/i915/display/intel_dp.c u32 DP = intel_dp->DP; intel_dp 4072 drivers/gpu/drm/i915/display/intel_dp.c if (WARN_ON((I915_READ(intel_dp->output_reg) & DP_PORT_EN) == 0)) intel_dp 4085 drivers/gpu/drm/i915/display/intel_dp.c I915_WRITE(intel_dp->output_reg, DP); intel_dp 4086 drivers/gpu/drm/i915/display/intel_dp.c POSTING_READ(intel_dp->output_reg); intel_dp 4089 drivers/gpu/drm/i915/display/intel_dp.c I915_WRITE(intel_dp->output_reg, DP); intel_dp 4090 drivers/gpu/drm/i915/display/intel_dp.c POSTING_READ(intel_dp->output_reg); intel_dp 4109 drivers/gpu/drm/i915/display/intel_dp.c I915_WRITE(intel_dp->output_reg, DP); intel_dp 4110 drivers/gpu/drm/i915/display/intel_dp.c POSTING_READ(intel_dp->output_reg); intel_dp 4113 drivers/gpu/drm/i915/display/intel_dp.c I915_WRITE(intel_dp->output_reg, DP); intel_dp 4114 drivers/gpu/drm/i915/display/intel_dp.c POSTING_READ(intel_dp->output_reg); intel_dp 4121 drivers/gpu/drm/i915/display/intel_dp.c msleep(intel_dp->panel_power_down_delay); intel_dp 4123 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->DP = DP; intel_dp 4128 drivers/gpu/drm/i915/display/intel_dp.c with_pps_lock(intel_dp, wakeref) intel_dp 4129 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->active_pipe = INVALID_PIPE; intel_dp 4134 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_extended_receiver_capabilities(struct intel_dp *intel_dp) intel_dp 4145 drivers/gpu/drm/i915/display/intel_dp.c if (!(intel_dp->dpcd[DP_TRAINING_AUX_RD_INTERVAL] & intel_dp 4149 drivers/gpu/drm/i915/display/intel_dp.c if (drm_dp_dpcd_read(&intel_dp->aux, DP_DP13_DPCD_REV, intel_dp 4155 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp->dpcd[DP_DPCD_REV] > dpcd_ext[DP_DPCD_REV]) { intel_dp 4160 drivers/gpu/drm/i915/display/intel_dp.c if (!memcmp(intel_dp->dpcd, dpcd_ext, sizeof(dpcd_ext))) intel_dp 4164 drivers/gpu/drm/i915/display/intel_dp.c (int)sizeof(intel_dp->dpcd), intel_dp->dpcd); intel_dp 4166 drivers/gpu/drm/i915/display/intel_dp.c memcpy(intel_dp->dpcd, dpcd_ext, sizeof(dpcd_ext)); intel_dp 4170 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_read_dpcd(struct intel_dp *intel_dp) intel_dp 4172 drivers/gpu/drm/i915/display/intel_dp.c if (drm_dp_dpcd_read(&intel_dp->aux, 0x000, intel_dp->dpcd, intel_dp 4173 drivers/gpu/drm/i915/display/intel_dp.c sizeof(intel_dp->dpcd)) < 0) intel_dp 4176 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_extended_receiver_capabilities(intel_dp); intel_dp 4178 drivers/gpu/drm/i915/display/intel_dp.c DRM_DEBUG_KMS("DPCD: %*ph\n", (int) sizeof(intel_dp->dpcd), intel_dp->dpcd); intel_dp 4180 drivers/gpu/drm/i915/display/intel_dp.c return intel_dp->dpcd[DP_DPCD_REV] != 0; intel_dp 4183 drivers/gpu/drm/i915/display/intel_dp.c bool intel_dp_get_colorimetry_status(struct intel_dp *intel_dp) intel_dp 4187 drivers/gpu/drm/i915/display/intel_dp.c if (drm_dp_dpcd_readb(&intel_dp->aux, DP_DPRX_FEATURE_ENUMERATION_LIST, intel_dp 4193 drivers/gpu/drm/i915/display/intel_dp.c static void intel_dp_get_dsc_sink_cap(struct intel_dp *intel_dp) intel_dp 4199 drivers/gpu/drm/i915/display/intel_dp.c memset(intel_dp->dsc_dpcd, 0, sizeof(intel_dp->dsc_dpcd)); intel_dp 4202 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->fec_capable = 0; intel_dp 4205 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp->dpcd[DP_DPCD_REV] >= 0x14 || intel_dp 4206 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->edp_dpcd[0] >= DP_EDP_14) { intel_dp 4207 drivers/gpu/drm/i915/display/intel_dp.c if (drm_dp_dpcd_read(&intel_dp->aux, DP_DSC_SUPPORT, intel_dp 4208 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->dsc_dpcd, intel_dp 4209 drivers/gpu/drm/i915/display/intel_dp.c sizeof(intel_dp->dsc_dpcd)) < 0) intel_dp 4214 drivers/gpu/drm/i915/display/intel_dp.c (int)sizeof(intel_dp->dsc_dpcd), intel_dp 4215 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->dsc_dpcd); intel_dp 4218 drivers/gpu/drm/i915/display/intel_dp.c if (!intel_dp_is_edp(intel_dp) && intel_dp 4219 drivers/gpu/drm/i915/display/intel_dp.c drm_dp_dpcd_readb(&intel_dp->aux, DP_FEC_CAPABILITY, intel_dp 4220 drivers/gpu/drm/i915/display/intel_dp.c &intel_dp->fec_capable) < 0) intel_dp 4223 drivers/gpu/drm/i915/display/intel_dp.c DRM_DEBUG_KMS("FEC CAPABILITY: %x\n", intel_dp->fec_capable); intel_dp 4228 drivers/gpu/drm/i915/display/intel_dp.c intel_edp_init_dpcd(struct intel_dp *intel_dp) intel_dp 4231 drivers/gpu/drm/i915/display/intel_dp.c to_i915(dp_to_dig_port(intel_dp)->base.base.dev); intel_dp 4234 drivers/gpu/drm/i915/display/intel_dp.c WARN_ON(intel_dp->dpcd[DP_DPCD_REV] != 0); intel_dp 4236 drivers/gpu/drm/i915/display/intel_dp.c if (!intel_dp_read_dpcd(intel_dp)) intel_dp 4239 drivers/gpu/drm/i915/display/intel_dp.c drm_dp_read_desc(&intel_dp->aux, &intel_dp->desc, intel_dp 4240 drivers/gpu/drm/i915/display/intel_dp.c drm_dp_is_branch(intel_dp->dpcd)); intel_dp 4251 drivers/gpu/drm/i915/display/intel_dp.c if (drm_dp_dpcd_read(&intel_dp->aux, DP_EDP_DPCD_REV, intel_dp 4252 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->edp_dpcd, sizeof(intel_dp->edp_dpcd)) == intel_dp 4253 drivers/gpu/drm/i915/display/intel_dp.c sizeof(intel_dp->edp_dpcd)) intel_dp 4254 drivers/gpu/drm/i915/display/intel_dp.c DRM_DEBUG_KMS("eDP DPCD: %*ph\n", (int) sizeof(intel_dp->edp_dpcd), intel_dp 4255 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->edp_dpcd); intel_dp 4261 drivers/gpu/drm/i915/display/intel_dp.c intel_psr_init_dpcd(intel_dp); intel_dp 4264 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp->edp_dpcd[0] >= DP_EDP_14) { intel_dp 4268 drivers/gpu/drm/i915/display/intel_dp.c drm_dp_dpcd_read(&intel_dp->aux, DP_SUPPORTED_LINK_RATES, intel_dp 4283 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->sink_rates[i] = (val * 200) / 10; intel_dp 4285 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->num_sink_rates = i; intel_dp 4292 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp->num_sink_rates) intel_dp 4293 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->use_rate_select = true; intel_dp 4295 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_set_sink_rates(intel_dp); intel_dp 4297 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_set_common_rates(intel_dp); intel_dp 4301 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_get_dsc_sink_cap(intel_dp); intel_dp 4308 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_get_dpcd(struct intel_dp *intel_dp) intel_dp 4310 drivers/gpu/drm/i915/display/intel_dp.c if (!intel_dp_read_dpcd(intel_dp)) intel_dp 4317 drivers/gpu/drm/i915/display/intel_dp.c if (!intel_dp_is_edp(intel_dp)) { intel_dp 4318 drivers/gpu/drm/i915/display/intel_dp.c drm_dp_read_desc(&intel_dp->aux, &intel_dp->desc, intel_dp 4319 drivers/gpu/drm/i915/display/intel_dp.c drm_dp_is_branch(intel_dp->dpcd)); intel_dp 4321 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_set_sink_rates(intel_dp); intel_dp 4322 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_set_common_rates(intel_dp); intel_dp 4329 drivers/gpu/drm/i915/display/intel_dp.c if (!intel_dp_is_edp(intel_dp) && intel_dp 4330 drivers/gpu/drm/i915/display/intel_dp.c !drm_dp_has_quirk(&intel_dp->desc, DP_DPCD_QUIRK_NO_SINK_COUNT)) { intel_dp 4334 drivers/gpu/drm/i915/display/intel_dp.c r = drm_dp_dpcd_readb(&intel_dp->aux, DP_SINK_COUNT, &count); intel_dp 4343 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->sink_count = DP_GET_SINK_COUNT(count); intel_dp 4352 drivers/gpu/drm/i915/display/intel_dp.c if (!intel_dp->sink_count) intel_dp 4356 drivers/gpu/drm/i915/display/intel_dp.c if (!drm_dp_is_branch(intel_dp->dpcd)) intel_dp 4359 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp->dpcd[DP_DPCD_REV] == 0x10) intel_dp 4362 drivers/gpu/drm/i915/display/intel_dp.c if (drm_dp_dpcd_read(&intel_dp->aux, DP_DOWNSTREAM_PORT_0, intel_dp 4363 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->downstream_ports, intel_dp 4371 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_sink_can_mst(struct intel_dp *intel_dp) intel_dp 4375 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp->dpcd[DP_DPCD_REV] < 0x12) intel_dp 4378 drivers/gpu/drm/i915/display/intel_dp.c if (drm_dp_dpcd_readb(&intel_dp->aux, DP_MSTM_CAP, &mstm_cap) != 1) intel_dp 4385 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_can_mst(struct intel_dp *intel_dp) intel_dp 4388 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->can_mst && intel_dp 4389 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_sink_can_mst(intel_dp); intel_dp 4393 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_configure_mst(struct intel_dp *intel_dp) intel_dp 4396 drivers/gpu/drm/i915/display/intel_dp.c &dp_to_dig_port(intel_dp)->base; intel_dp 4397 drivers/gpu/drm/i915/display/intel_dp.c bool sink_can_mst = intel_dp_sink_can_mst(intel_dp); intel_dp 4400 drivers/gpu/drm/i915/display/intel_dp.c port_name(encoder->port), yesno(intel_dp->can_mst), intel_dp 4403 drivers/gpu/drm/i915/display/intel_dp.c if (!intel_dp->can_mst) intel_dp 4406 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->is_mst = sink_can_mst && intel_dp 4409 drivers/gpu/drm/i915/display/intel_dp.c drm_dp_mst_topology_mgr_set_mst(&intel_dp->mst_mgr, intel_dp 4410 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->is_mst); intel_dp 4414 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_get_sink_irq_esi(struct intel_dp *intel_dp, u8 *sink_irq_vector) intel_dp 4416 drivers/gpu/drm/i915/display/intel_dp.c return drm_dp_dpcd_read(&intel_dp->aux, DP_SINK_COUNT_ESI, intel_dp 4422 drivers/gpu/drm/i915/display/intel_dp.c intel_pixel_encoding_setup_vsc(struct intel_dp *intel_dp, intel_dp 4425 drivers/gpu/drm/i915/display/intel_dp.c struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); intel_dp 4502 drivers/gpu/drm/i915/display/intel_dp.c void intel_dp_ycbcr_420_enable(struct intel_dp *intel_dp, intel_dp 4508 drivers/gpu/drm/i915/display/intel_dp.c intel_pixel_encoding_setup_vsc(intel_dp, crtc_state); intel_dp 4511 drivers/gpu/drm/i915/display/intel_dp.c static u8 intel_dp_autotest_link_training(struct intel_dp *intel_dp) intel_dp 4520 drivers/gpu/drm/i915/display/intel_dp.c status = drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_LANE_COUNT, intel_dp 4529 drivers/gpu/drm/i915/display/intel_dp.c status = drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_LINK_RATE, intel_dp 4538 drivers/gpu/drm/i915/display/intel_dp.c if (!intel_dp_link_params_valid(intel_dp, test_link_rate, intel_dp 4542 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->compliance.test_lane_count = test_lane_count; intel_dp 4543 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->compliance.test_link_rate = test_link_rate; intel_dp 4548 drivers/gpu/drm/i915/display/intel_dp.c static u8 intel_dp_autotest_video_pattern(struct intel_dp *intel_dp) intel_dp 4556 drivers/gpu/drm/i915/display/intel_dp.c status = drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_PATTERN, intel_dp 4565 drivers/gpu/drm/i915/display/intel_dp.c status = drm_dp_dpcd_read(&intel_dp->aux, DP_TEST_H_WIDTH_HI, intel_dp 4572 drivers/gpu/drm/i915/display/intel_dp.c status = drm_dp_dpcd_read(&intel_dp->aux, DP_TEST_V_HEIGHT_HI, intel_dp 4579 drivers/gpu/drm/i915/display/intel_dp.c status = drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_MISC0, intel_dp 4591 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->compliance.test_data.bpc = 6; intel_dp 4594 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->compliance.test_data.bpc = 8; intel_dp 4600 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->compliance.test_data.video_pattern = test_pattern; intel_dp 4601 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->compliance.test_data.hdisplay = be16_to_cpu(h_width); intel_dp 4602 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->compliance.test_data.vdisplay = be16_to_cpu(v_height); intel_dp 4604 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->compliance.test_active = 1; intel_dp 4609 drivers/gpu/drm/i915/display/intel_dp.c static u8 intel_dp_autotest_edid(struct intel_dp *intel_dp) intel_dp 4612 drivers/gpu/drm/i915/display/intel_dp.c struct intel_connector *intel_connector = intel_dp->attached_connector; intel_dp 4617 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->aux.i2c_defer_count > 6) { intel_dp 4625 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp->aux.i2c_nack_count > 0 || intel_dp 4626 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->aux.i2c_defer_count > 0) intel_dp 4628 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->aux.i2c_nack_count, intel_dp 4629 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->aux.i2c_defer_count); intel_dp 4630 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->compliance.test_data.edid = INTEL_DP_RESOLUTION_FAILSAFE; intel_dp 4639 drivers/gpu/drm/i915/display/intel_dp.c if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_TEST_EDID_CHECKSUM, intel_dp 4644 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->compliance.test_data.edid = INTEL_DP_RESOLUTION_PREFERRED; intel_dp 4648 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->compliance.test_active = 1; intel_dp 4653 drivers/gpu/drm/i915/display/intel_dp.c static u8 intel_dp_autotest_phy_pattern(struct intel_dp *intel_dp) intel_dp 4659 drivers/gpu/drm/i915/display/intel_dp.c static void intel_dp_handle_test_request(struct intel_dp *intel_dp) intel_dp 4665 drivers/gpu/drm/i915/display/intel_dp.c status = drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_REQUEST, &request); intel_dp 4674 drivers/gpu/drm/i915/display/intel_dp.c response = intel_dp_autotest_link_training(intel_dp); intel_dp 4678 drivers/gpu/drm/i915/display/intel_dp.c response = intel_dp_autotest_video_pattern(intel_dp); intel_dp 4682 drivers/gpu/drm/i915/display/intel_dp.c response = intel_dp_autotest_edid(intel_dp); intel_dp 4686 drivers/gpu/drm/i915/display/intel_dp.c response = intel_dp_autotest_phy_pattern(intel_dp); intel_dp 4694 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->compliance.test_type = request; intel_dp 4697 drivers/gpu/drm/i915/display/intel_dp.c status = drm_dp_dpcd_writeb(&intel_dp->aux, DP_TEST_RESPONSE, response); intel_dp 4703 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_check_mst_status(struct intel_dp *intel_dp) intel_dp 4707 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp->is_mst) { intel_dp 4713 drivers/gpu/drm/i915/display/intel_dp.c WARN_ON_ONCE(intel_dp->active_mst_links < 0); intel_dp 4714 drivers/gpu/drm/i915/display/intel_dp.c bret = intel_dp_get_sink_irq_esi(intel_dp, esi); intel_dp 4719 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp->active_mst_links > 0 && intel_dp 4720 drivers/gpu/drm/i915/display/intel_dp.c !drm_dp_channel_eq_ok(&esi[10], intel_dp->lane_count)) { intel_dp 4722 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_start_link_train(intel_dp); intel_dp 4723 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_stop_link_train(intel_dp); intel_dp 4727 drivers/gpu/drm/i915/display/intel_dp.c ret = drm_dp_mst_hpd_irq(&intel_dp->mst_mgr, esi, &handled); intel_dp 4732 drivers/gpu/drm/i915/display/intel_dp.c wret = drm_dp_dpcd_write(&intel_dp->aux, intel_dp 4740 drivers/gpu/drm/i915/display/intel_dp.c bret = intel_dp_get_sink_irq_esi(intel_dp, esi); intel_dp 4751 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->is_mst = false; intel_dp 4752 drivers/gpu/drm/i915/display/intel_dp.c drm_dp_mst_topology_mgr_set_mst(&intel_dp->mst_mgr, intel_dp 4753 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->is_mst); intel_dp 4760 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_needs_link_retrain(struct intel_dp *intel_dp) intel_dp 4764 drivers/gpu/drm/i915/display/intel_dp.c if (!intel_dp->link_trained) intel_dp 4775 drivers/gpu/drm/i915/display/intel_dp.c if (intel_psr_enabled(intel_dp)) intel_dp 4778 drivers/gpu/drm/i915/display/intel_dp.c if (!intel_dp_get_link_status(intel_dp, link_status)) intel_dp 4785 drivers/gpu/drm/i915/display/intel_dp.c if (!intel_dp_link_params_valid(intel_dp, intel_dp->link_rate, intel_dp 4786 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->lane_count)) intel_dp 4790 drivers/gpu/drm/i915/display/intel_dp.c return !drm_dp_channel_eq_ok(link_status, intel_dp->lane_count); intel_dp 4797 drivers/gpu/drm/i915/display/intel_dp.c struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); intel_dp 4798 drivers/gpu/drm/i915/display/intel_dp.c struct intel_connector *connector = intel_dp->attached_connector; intel_dp 4835 drivers/gpu/drm/i915/display/intel_dp.c if (!intel_dp_needs_link_retrain(intel_dp)) intel_dp 4844 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_start_link_train(intel_dp); intel_dp 4845 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_stop_link_train(intel_dp); intel_dp 4908 drivers/gpu/drm/i915/display/intel_dp.c static void intel_dp_check_service_irq(struct intel_dp *intel_dp) intel_dp 4912 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp->dpcd[DP_DPCD_REV] < 0x11) intel_dp 4915 drivers/gpu/drm/i915/display/intel_dp.c if (drm_dp_dpcd_readb(&intel_dp->aux, intel_dp 4919 drivers/gpu/drm/i915/display/intel_dp.c drm_dp_dpcd_writeb(&intel_dp->aux, DP_DEVICE_SERVICE_IRQ_VECTOR, val); intel_dp 4922 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_handle_test_request(intel_dp); intel_dp 4925 drivers/gpu/drm/i915/display/intel_dp.c intel_hdcp_handle_cp_irq(intel_dp->attached_connector); intel_dp 4945 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_short_pulse(struct intel_dp *intel_dp) intel_dp 4947 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 4948 drivers/gpu/drm/i915/display/intel_dp.c u8 old_sink_count = intel_dp->sink_count; intel_dp 4955 drivers/gpu/drm/i915/display/intel_dp.c memset(&intel_dp->compliance, 0, sizeof(intel_dp->compliance)); intel_dp 4963 drivers/gpu/drm/i915/display/intel_dp.c ret = intel_dp_get_dpcd(intel_dp); intel_dp 4965 drivers/gpu/drm/i915/display/intel_dp.c if ((old_sink_count != intel_dp->sink_count) || !ret) { intel_dp 4970 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_check_service_irq(intel_dp); intel_dp 4973 drivers/gpu/drm/i915/display/intel_dp.c drm_dp_cec_irq(&intel_dp->aux); intel_dp 4976 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp_needs_link_retrain(intel_dp)) intel_dp 4979 drivers/gpu/drm/i915/display/intel_dp.c intel_psr_short_pulse(intel_dp); intel_dp 4981 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp->compliance.test_type == DP_TEST_LINK_TRAINING) { intel_dp 4992 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_detect_dpcd(struct intel_dp *intel_dp) intel_dp 4994 drivers/gpu/drm/i915/display/intel_dp.c struct intel_lspcon *lspcon = dp_to_lspcon(intel_dp); intel_dp 4995 drivers/gpu/drm/i915/display/intel_dp.c u8 *dpcd = intel_dp->dpcd; intel_dp 4998 drivers/gpu/drm/i915/display/intel_dp.c if (WARN_ON(intel_dp_is_edp(intel_dp))) intel_dp 5004 drivers/gpu/drm/i915/display/intel_dp.c if (!intel_dp_get_dpcd(intel_dp)) intel_dp 5012 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11 && intel_dp 5013 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->downstream_ports[0] & DP_DS_PORT_HPD) { intel_dp 5015 drivers/gpu/drm/i915/display/intel_dp.c return intel_dp->sink_count ? intel_dp 5019 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp_can_mst(intel_dp)) intel_dp 5023 drivers/gpu/drm/i915/display/intel_dp.c if (drm_probe_ddc(&intel_dp->aux.ddc)) intel_dp 5027 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11) { intel_dp 5028 drivers/gpu/drm/i915/display/intel_dp.c type = intel_dp->downstream_ports[0] & DP_DS_PORT_TYPE_MASK; intel_dp 5033 drivers/gpu/drm/i915/display/intel_dp.c type = intel_dp->dpcd[DP_DOWNSTREAMPORT_PRESENT] & intel_dp 5046 drivers/gpu/drm/i915/display/intel_dp.c edp_detect(struct intel_dp *intel_dp) intel_dp 5303 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_get_edid(struct intel_dp *intel_dp) intel_dp 5305 drivers/gpu/drm/i915/display/intel_dp.c struct intel_connector *intel_connector = intel_dp->attached_connector; intel_dp 5316 drivers/gpu/drm/i915/display/intel_dp.c &intel_dp->aux.ddc); intel_dp 5320 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_set_edid(struct intel_dp *intel_dp) intel_dp 5322 drivers/gpu/drm/i915/display/intel_dp.c struct intel_connector *intel_connector = intel_dp->attached_connector; intel_dp 5325 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_unset_edid(intel_dp); intel_dp 5326 drivers/gpu/drm/i915/display/intel_dp.c edid = intel_dp_get_edid(intel_dp); intel_dp 5329 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->has_audio = drm_detect_monitor_audio(edid); intel_dp 5330 drivers/gpu/drm/i915/display/intel_dp.c drm_dp_cec_set_edid(&intel_dp->aux, edid); intel_dp 5334 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_unset_edid(struct intel_dp *intel_dp) intel_dp 5336 drivers/gpu/drm/i915/display/intel_dp.c struct intel_connector *intel_connector = intel_dp->attached_connector; intel_dp 5338 drivers/gpu/drm/i915/display/intel_dp.c drm_dp_cec_unset_edid(&intel_dp->aux); intel_dp 5342 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->has_audio = false; intel_dp 5351 drivers/gpu/drm/i915/display/intel_dp.c struct intel_dp *intel_dp = intel_attached_dp(connector); intel_dp 5352 drivers/gpu/drm/i915/display/intel_dp.c struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); intel_dp 5361 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp_is_edp(intel_dp)) intel_dp 5362 drivers/gpu/drm/i915/display/intel_dp.c status = edp_detect(intel_dp); intel_dp 5364 drivers/gpu/drm/i915/display/intel_dp.c status = intel_dp_detect_dpcd(intel_dp); intel_dp 5369 drivers/gpu/drm/i915/display/intel_dp.c memset(&intel_dp->compliance, 0, sizeof(intel_dp->compliance)); intel_dp 5370 drivers/gpu/drm/i915/display/intel_dp.c memset(intel_dp->dsc_dpcd, 0, sizeof(intel_dp->dsc_dpcd)); intel_dp 5372 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp->is_mst) { intel_dp 5374 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->is_mst, intel_dp 5375 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->mst_mgr.mst_state); intel_dp 5376 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->is_mst = false; intel_dp 5377 drivers/gpu/drm/i915/display/intel_dp.c drm_dp_mst_topology_mgr_set_mst(&intel_dp->mst_mgr, intel_dp 5378 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->is_mst); intel_dp 5384 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp->reset_link_params) { intel_dp 5386 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->max_link_lane_count = intel_dp_max_common_lane_count(intel_dp); intel_dp 5389 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->max_link_rate = intel_dp_max_common_rate(intel_dp); intel_dp 5391 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->reset_link_params = false; intel_dp 5394 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_print_rates(intel_dp); intel_dp 5398 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_get_dsc_sink_cap(intel_dp); intel_dp 5400 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_configure_mst(intel_dp); intel_dp 5402 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp->is_mst) { intel_dp 5416 drivers/gpu/drm/i915/display/intel_dp.c if (!intel_dp_is_edp(intel_dp)) { intel_dp 5429 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->aux.i2c_nack_count = 0; intel_dp 5430 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->aux.i2c_defer_count = 0; intel_dp 5432 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_set_edid(intel_dp); intel_dp 5433 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp_is_edp(intel_dp) || intel_dp 5437 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_check_service_irq(intel_dp); intel_dp 5440 drivers/gpu/drm/i915/display/intel_dp.c if (status != connector_status_connected && !intel_dp->is_mst) intel_dp 5441 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_unset_edid(intel_dp); intel_dp 5455 drivers/gpu/drm/i915/display/intel_dp.c struct intel_dp *intel_dp = intel_attached_dp(connector); intel_dp 5456 drivers/gpu/drm/i915/display/intel_dp.c struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); intel_dp 5465 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_unset_edid(intel_dp); intel_dp 5472 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_set_edid(intel_dp); intel_dp 5508 drivers/gpu/drm/i915/display/intel_dp.c struct intel_dp *intel_dp = intel_attached_dp(connector); intel_dp 5519 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->aux.name, connector->kdev->kobj.name); intel_dp 5521 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->aux.dev = connector->kdev; intel_dp 5522 drivers/gpu/drm/i915/display/intel_dp.c ret = drm_dp_aux_register(&intel_dp->aux); intel_dp 5524 drivers/gpu/drm/i915/display/intel_dp.c drm_dp_cec_register_connector(&intel_dp->aux, intel_dp 5532 drivers/gpu/drm/i915/display/intel_dp.c struct intel_dp *intel_dp = intel_attached_dp(connector); intel_dp 5534 drivers/gpu/drm/i915/display/intel_dp.c drm_dp_cec_unregister_connector(&intel_dp->aux); intel_dp 5535 drivers/gpu/drm/i915/display/intel_dp.c drm_dp_aux_unregister(&intel_dp->aux); intel_dp 5542 drivers/gpu/drm/i915/display/intel_dp.c struct intel_dp *intel_dp = &intel_dig_port->dp; intel_dp 5545 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp_is_edp(intel_dp)) { intel_dp 5548 drivers/gpu/drm/i915/display/intel_dp.c cancel_delayed_work_sync(&intel_dp->panel_vdd_work); intel_dp 5553 drivers/gpu/drm/i915/display/intel_dp.c with_pps_lock(intel_dp, wakeref) intel_dp 5554 drivers/gpu/drm/i915/display/intel_dp.c edp_panel_vdd_off_sync(intel_dp); intel_dp 5556 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp->edp_notifier.notifier_call) { intel_dp 5557 drivers/gpu/drm/i915/display/intel_dp.c unregister_reboot_notifier(&intel_dp->edp_notifier); intel_dp 5558 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->edp_notifier.notifier_call = NULL; intel_dp 5562 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_aux_fini(intel_dp); intel_dp 5575 drivers/gpu/drm/i915/display/intel_dp.c struct intel_dp *intel_dp = enc_to_intel_dp(&intel_encoder->base); intel_dp 5578 drivers/gpu/drm/i915/display/intel_dp.c if (!intel_dp_is_edp(intel_dp)) intel_dp 5585 drivers/gpu/drm/i915/display/intel_dp.c cancel_delayed_work_sync(&intel_dp->panel_vdd_work); intel_dp 5586 drivers/gpu/drm/i915/display/intel_dp.c with_pps_lock(intel_dp, wakeref) intel_dp 5587 drivers/gpu/drm/i915/display/intel_dp.c edp_panel_vdd_off_sync(intel_dp); intel_dp 5606 drivers/gpu/drm/i915/display/intel_dp.c struct intel_dp *intel_dp = enc_to_intel_dp(&intel_dig_port->base.base); intel_dp 5633 drivers/gpu/drm/i915/display/intel_dp.c ret = intel_dp_aux_xfer(intel_dp, txbuf, HEADER_SIZE + msg.size, intel_dp 5929 drivers/gpu/drm/i915/display/intel_dp.c struct intel_dp *dp = &intel_dig_port->dp; intel_dp 5981 drivers/gpu/drm/i915/display/intel_dp.c struct intel_dp *dp = &intel_dig_port->dp; intel_dp 6178 drivers/gpu/drm/i915/display/intel_dp.c static void intel_edp_panel_vdd_sanitize(struct intel_dp *intel_dp) intel_dp 6180 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 6181 drivers/gpu/drm/i915/display/intel_dp.c struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); intel_dp 6185 drivers/gpu/drm/i915/display/intel_dp.c if (!edp_have_panel_vdd(intel_dp)) intel_dp 6197 drivers/gpu/drm/i915/display/intel_dp.c edp_panel_vdd_schedule_off(intel_dp); intel_dp 6200 drivers/gpu/drm/i915/display/intel_dp.c static enum pipe vlv_active_pipe(struct intel_dp *intel_dp) intel_dp 6202 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 6203 drivers/gpu/drm/i915/display/intel_dp.c struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base; intel_dp 6206 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp_port_enabled(dev_priv, intel_dp->output_reg, intel_dp 6216 drivers/gpu/drm/i915/display/intel_dp.c struct intel_dp *intel_dp = enc_to_intel_dp(encoder); intel_dp 6217 drivers/gpu/drm/i915/display/intel_dp.c struct intel_lspcon *lspcon = dp_to_lspcon(intel_dp); intel_dp 6221 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->DP = I915_READ(intel_dp->output_reg); intel_dp 6226 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->reset_link_params = true; intel_dp 6229 drivers/gpu/drm/i915/display/intel_dp.c !intel_dp_is_edp(intel_dp)) intel_dp 6232 drivers/gpu/drm/i915/display/intel_dp.c with_pps_lock(intel_dp, wakeref) { intel_dp 6234 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->active_pipe = vlv_active_pipe(intel_dp); intel_dp 6236 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp_is_edp(intel_dp)) { intel_dp 6241 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_pps_init(intel_dp); intel_dp 6242 drivers/gpu/drm/i915/display/intel_dp.c intel_edp_panel_vdd_sanitize(intel_dp); intel_dp 6274 drivers/gpu/drm/i915/display/intel_dp.c struct intel_dp *intel_dp = &intel_dig_port->dp; intel_dp 6293 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->reset_link_params = true; intel_dp 6297 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp->is_mst) { intel_dp 6298 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp_check_mst_status(intel_dp) == -EINVAL) { intel_dp 6304 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->is_mst, intel_dp->mst_mgr.mst_state); intel_dp 6305 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->is_mst = false; intel_dp 6306 drivers/gpu/drm/i915/display/intel_dp.c drm_dp_mst_topology_mgr_set_mst(&intel_dp->mst_mgr, intel_dp 6307 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->is_mst); intel_dp 6313 drivers/gpu/drm/i915/display/intel_dp.c if (!intel_dp->is_mst) { intel_dp 6316 drivers/gpu/drm/i915/display/intel_dp.c handled = intel_dp_short_pulse(intel_dp); intel_dp 6342 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_add_properties(struct intel_dp *intel_dp, struct drm_connector *connector) intel_dp 6345 drivers/gpu/drm/i915/display/intel_dp.c enum port port = dp_to_dig_port(intel_dp)->base.port; intel_dp 6356 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp_is_edp(intel_dp)) { intel_dp 6370 drivers/gpu/drm/i915/display/intel_dp.c static void intel_dp_init_panel_power_timestamps(struct intel_dp *intel_dp) intel_dp 6372 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->panel_power_off_time = ktime_get_boottime(); intel_dp 6373 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->last_power_on = jiffies; intel_dp 6374 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->last_backlight_off = jiffies; intel_dp 6378 drivers/gpu/drm/i915/display/intel_dp.c intel_pps_readout_hw_state(struct intel_dp *intel_dp, struct edp_power_seq *seq) intel_dp 6380 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 6384 drivers/gpu/drm/i915/display/intel_dp.c intel_pps_get_registers(intel_dp, ®s); intel_dp 6386 drivers/gpu/drm/i915/display/intel_dp.c pp_ctl = ironlake_get_pp_control(intel_dp); intel_dp 6421 drivers/gpu/drm/i915/display/intel_dp.c intel_pps_verify_state(struct intel_dp *intel_dp) intel_dp 6424 drivers/gpu/drm/i915/display/intel_dp.c struct edp_power_seq *sw = &intel_dp->pps_delays; intel_dp 6426 drivers/gpu/drm/i915/display/intel_dp.c intel_pps_readout_hw_state(intel_dp, &hw); intel_dp 6437 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_init_panel_power_sequencer(struct intel_dp *intel_dp) intel_dp 6439 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 6441 drivers/gpu/drm/i915/display/intel_dp.c *final = &intel_dp->pps_delays; intel_dp 6449 drivers/gpu/drm/i915/display/intel_dp.c intel_pps_readout_hw_state(intel_dp, &cur); intel_dp 6497 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->panel_power_up_delay = get_delay(t1_t3); intel_dp 6498 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->backlight_on_delay = get_delay(t8); intel_dp 6499 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->backlight_off_delay = get_delay(t9); intel_dp 6500 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->panel_power_down_delay = get_delay(t10); intel_dp 6501 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->panel_power_cycle_delay = get_delay(t11_t12); intel_dp 6505 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->panel_power_up_delay, intel_dp->panel_power_down_delay, intel_dp 6506 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->panel_power_cycle_delay); intel_dp 6509 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->backlight_on_delay, intel_dp->backlight_off_delay); intel_dp 6529 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_init_panel_power_sequencer_registers(struct intel_dp *intel_dp, intel_dp 6532 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 6536 drivers/gpu/drm/i915/display/intel_dp.c enum port port = dp_to_dig_port(intel_dp)->base.port; intel_dp 6537 drivers/gpu/drm/i915/display/intel_dp.c const struct edp_power_seq *seq = &intel_dp->pps_delays; intel_dp 6541 drivers/gpu/drm/i915/display/intel_dp.c intel_pps_get_registers(intel_dp, ®s); intel_dp 6556 drivers/gpu/drm/i915/display/intel_dp.c u32 pp = ironlake_get_pp_control(intel_dp); intel_dp 6623 drivers/gpu/drm/i915/display/intel_dp.c static void intel_dp_pps_init(struct intel_dp *intel_dp) intel_dp 6625 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 6628 drivers/gpu/drm/i915/display/intel_dp.c vlv_initial_power_sequencer_setup(intel_dp); intel_dp 6630 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_init_panel_power_sequencer(intel_dp); intel_dp 6631 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_init_panel_power_sequencer_registers(intel_dp, false); intel_dp 6652 drivers/gpu/drm/i915/display/intel_dp.c struct intel_dp *intel_dp = dev_priv->drrs.dp; intel_dp 6661 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp == NULL) { intel_dp 6676 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp->attached_connector->panel.downclock_mode->vrefresh == intel_dp 6734 drivers/gpu/drm/i915/display/intel_dp.c void intel_edp_drrs_enable(struct intel_dp *intel_dp, intel_dp 6737 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 6757 drivers/gpu/drm/i915/display/intel_dp.c dev_priv->drrs.dp = intel_dp; intel_dp 6769 drivers/gpu/drm/i915/display/intel_dp.c void intel_edp_drrs_disable(struct intel_dp *intel_dp, intel_dp 6772 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 6785 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->attached_connector->panel.fixed_mode->vrefresh); intel_dp 6797 drivers/gpu/drm/i915/display/intel_dp.c struct intel_dp *intel_dp; intel_dp 6801 drivers/gpu/drm/i915/display/intel_dp.c intel_dp = dev_priv->drrs.dp; intel_dp 6803 drivers/gpu/drm/i915/display/intel_dp.c if (!intel_dp) intel_dp 6815 drivers/gpu/drm/i915/display/intel_dp.c struct drm_crtc *crtc = dp_to_dig_port(intel_dp)->base.base.crtc; intel_dp 6818 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->attached_connector->panel.downclock_mode->vrefresh); intel_dp 6999 drivers/gpu/drm/i915/display/intel_dp.c static bool intel_edp_init_connector(struct intel_dp *intel_dp, intel_dp 7002 drivers/gpu/drm/i915/display/intel_dp.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 7012 drivers/gpu/drm/i915/display/intel_dp.c if (!intel_dp_is_edp(intel_dp)) intel_dp 7015 drivers/gpu/drm/i915/display/intel_dp.c INIT_DELAYED_WORK(&intel_dp->panel_vdd_work, edp_panel_vdd_work); intel_dp 7030 drivers/gpu/drm/i915/display/intel_dp.c with_pps_lock(intel_dp, wakeref) { intel_dp 7031 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_init_panel_power_timestamps(intel_dp); intel_dp 7032 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_pps_init(intel_dp); intel_dp 7033 drivers/gpu/drm/i915/display/intel_dp.c intel_edp_panel_vdd_sanitize(intel_dp); intel_dp 7037 drivers/gpu/drm/i915/display/intel_dp.c has_dpcd = intel_edp_init_dpcd(intel_dp); intel_dp 7046 drivers/gpu/drm/i915/display/intel_dp.c edid = drm_get_edid(connector, &intel_dp->aux.ddc); intel_dp 7070 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->edp_notifier.notifier_call = edp_notify_handler; intel_dp 7071 drivers/gpu/drm/i915/display/intel_dp.c register_reboot_notifier(&intel_dp->edp_notifier); intel_dp 7078 drivers/gpu/drm/i915/display/intel_dp.c pipe = vlv_active_pipe(intel_dp); intel_dp 7081 drivers/gpu/drm/i915/display/intel_dp.c pipe = intel_dp->pps_pipe; intel_dp 7101 drivers/gpu/drm/i915/display/intel_dp.c cancel_delayed_work_sync(&intel_dp->panel_vdd_work); intel_dp 7106 drivers/gpu/drm/i915/display/intel_dp.c with_pps_lock(intel_dp, wakeref) intel_dp 7107 drivers/gpu/drm/i915/display/intel_dp.c edp_panel_vdd_off_sync(intel_dp); intel_dp 7140 drivers/gpu/drm/i915/display/intel_dp.c struct intel_dp *intel_dp = &intel_dig_port->dp; intel_dp 7157 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_set_source_rates(intel_dp); intel_dp 7159 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->reset_link_params = true; intel_dp 7160 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->pps_pipe = INVALID_PIPE; intel_dp 7161 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->active_pipe = INVALID_PIPE; intel_dp 7164 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->DP = I915_READ(intel_dp->output_reg); intel_dp 7165 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->attached_connector = intel_connector; intel_dp 7179 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->active_pipe = vlv_active_pipe(intel_dp); intel_dp 7191 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_is_edp(intel_dp) && intel_dp 7211 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_aux_init(intel_dp); intel_dp 7224 drivers/gpu/drm/i915/display/intel_dp.c if (!intel_edp_init_connector(intel_dp, intel_connector)) { intel_dp 7225 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_aux_fini(intel_dp); intel_dp 7230 drivers/gpu/drm/i915/display/intel_dp.c intel_dp_add_properties(intel_dp, connector); intel_dp 7232 drivers/gpu/drm/i915/display/intel_dp.c if (is_hdcp_supported(dev_priv, port) && !intel_dp_is_edp(intel_dp)) { intel_dp 7347 drivers/gpu/drm/i915/display/intel_dp.c struct intel_dp *intel_dp; intel_dp 7352 drivers/gpu/drm/i915/display/intel_dp.c intel_dp = enc_to_intel_dp(&encoder->base); intel_dp 7354 drivers/gpu/drm/i915/display/intel_dp.c if (!intel_dp->can_mst) intel_dp 7357 drivers/gpu/drm/i915/display/intel_dp.c if (intel_dp->is_mst) intel_dp 7358 drivers/gpu/drm/i915/display/intel_dp.c drm_dp_mst_topology_mgr_suspend(&intel_dp->mst_mgr); intel_dp 7367 drivers/gpu/drm/i915/display/intel_dp.c struct intel_dp *intel_dp; intel_dp 7373 drivers/gpu/drm/i915/display/intel_dp.c intel_dp = enc_to_intel_dp(&encoder->base); intel_dp 7375 drivers/gpu/drm/i915/display/intel_dp.c if (!intel_dp->can_mst) intel_dp 7378 drivers/gpu/drm/i915/display/intel_dp.c ret = drm_dp_mst_topology_mgr_resume(&intel_dp->mst_mgr); intel_dp 7380 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->is_mst = false; intel_dp 7381 drivers/gpu/drm/i915/display/intel_dp.c drm_dp_mst_topology_mgr_set_mst(&intel_dp->mst_mgr, intel_dp 23 drivers/gpu/drm/i915/display/intel_dp.h struct intel_dp; intel_dp 32 drivers/gpu/drm/i915/display/intel_dp.h void intel_dp_adjust_compliance_config(struct intel_dp *intel_dp, intel_dp 45 drivers/gpu/drm/i915/display/intel_dp.h void intel_dp_set_link_params(struct intel_dp *intel_dp, intel_dp 48 drivers/gpu/drm/i915/display/intel_dp.h int intel_dp_get_link_train_fallback_values(struct intel_dp *intel_dp, intel_dp 52 drivers/gpu/drm/i915/display/intel_dp.h void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode); intel_dp 53 drivers/gpu/drm/i915/display/intel_dp.h void intel_dp_sink_set_decompression_state(struct intel_dp *intel_dp, intel_dp 62 drivers/gpu/drm/i915/display/intel_dp.h bool intel_dp_is_edp(struct intel_dp *intel_dp); intel_dp 69 drivers/gpu/drm/i915/display/intel_dp.h void intel_edp_panel_vdd_on(struct intel_dp *intel_dp); intel_dp 70 drivers/gpu/drm/i915/display/intel_dp.h void intel_edp_panel_on(struct intel_dp *intel_dp); intel_dp 71 drivers/gpu/drm/i915/display/intel_dp.h void intel_edp_panel_off(struct intel_dp *intel_dp); intel_dp 74 drivers/gpu/drm/i915/display/intel_dp.h int intel_dp_max_link_rate(struct intel_dp *intel_dp); intel_dp 75 drivers/gpu/drm/i915/display/intel_dp.h int intel_dp_max_lane_count(struct intel_dp *intel_dp); intel_dp 76 drivers/gpu/drm/i915/display/intel_dp.h int intel_dp_rate_select(struct intel_dp *intel_dp, int rate); intel_dp 80 drivers/gpu/drm/i915/display/intel_dp.h void intel_edp_drrs_enable(struct intel_dp *intel_dp, intel_dp 82 drivers/gpu/drm/i915/display/intel_dp.h void intel_edp_drrs_disable(struct intel_dp *intel_dp, intel_dp 90 drivers/gpu/drm/i915/display/intel_dp.h intel_dp_program_link_training_pattern(struct intel_dp *intel_dp, intel_dp 93 drivers/gpu/drm/i915/display/intel_dp.h intel_dp_set_signal_levels(struct intel_dp *intel_dp); intel_dp 94 drivers/gpu/drm/i915/display/intel_dp.h void intel_dp_set_idle_link_train(struct intel_dp *intel_dp); intel_dp 96 drivers/gpu/drm/i915/display/intel_dp.h intel_dp_voltage_max(struct intel_dp *intel_dp); intel_dp 98 drivers/gpu/drm/i915/display/intel_dp.h intel_dp_pre_emphasis_max(struct intel_dp *intel_dp, u8 voltage_swing); intel_dp 99 drivers/gpu/drm/i915/display/intel_dp.h void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock, intel_dp 101 drivers/gpu/drm/i915/display/intel_dp.h bool intel_dp_source_supports_hbr2(struct intel_dp *intel_dp); intel_dp 102 drivers/gpu/drm/i915/display/intel_dp.h bool intel_dp_source_supports_hbr3(struct intel_dp *intel_dp); intel_dp 104 drivers/gpu/drm/i915/display/intel_dp.h intel_dp_get_link_status(struct intel_dp *intel_dp, u8 *link_status); intel_dp 106 drivers/gpu/drm/i915/display/intel_dp.h bool intel_dp_read_dpcd(struct intel_dp *intel_dp); intel_dp 107 drivers/gpu/drm/i915/display/intel_dp.h bool intel_dp_get_colorimetry_status(struct intel_dp *intel_dp); intel_dp 28 drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c static void set_aux_backlight_enable(struct intel_dp *intel_dp, bool enable) intel_dp 33 drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c if (!(intel_dp->edp_dpcd[1] & DP_EDP_BACKLIGHT_AUX_ENABLE_CAP)) intel_dp 36 drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c if (drm_dp_dpcd_readb(&intel_dp->aux, DP_EDP_DISPLAY_CONTROL_REGISTER, intel_dp 47 drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_EDP_DISPLAY_CONTROL_REGISTER, intel_dp 60 drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base); intel_dp 64 drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c if (drm_dp_dpcd_read(&intel_dp->aux, DP_EDP_BACKLIGHT_BRIGHTNESS_MSB, intel_dp 71 drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c if (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_BYTE_COUNT) intel_dp 85 drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base); intel_dp 91 drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c if (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_BYTE_COUNT) { intel_dp 95 drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c if (drm_dp_dpcd_write(&intel_dp->aux, DP_EDP_BACKLIGHT_BRIGHTNESS_MSB, intel_dp 113 drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base); intel_dp 137 drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c if (drm_dp_dpcd_readb(&intel_dp->aux, intel_dp 142 drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c if (drm_dp_dpcd_readb(&intel_dp->aux, intel_dp 164 drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c if (drm_dp_dpcd_writeb(&intel_dp->aux, intel_dp 169 drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c if (drm_dp_dpcd_writeb(&intel_dp->aux, intel_dp 181 drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base); intel_dp 184 drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c if (drm_dp_dpcd_readb(&intel_dp->aux, intel_dp 208 drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c if (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_FREQ_AUX_SET_CAP) intel_dp 213 drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c if (drm_dp_dpcd_writeb(&intel_dp->aux, intel_dp 219 drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c set_aux_backlight_enable(intel_dp, true); intel_dp 231 drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base); intel_dp 234 drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c if (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_BYTE_COUNT) intel_dp 250 drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base); intel_dp 255 drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c if (intel_dp->edp_dpcd[1] & DP_EDP_TCON_BACKLIGHT_ADJUSTMENT_CAP && intel_dp 256 drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_AUX_SET_CAP) && intel_dp 257 drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c !(intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_PWM_PIN_CAP)) { intel_dp 38 drivers/gpu/drm/i915/display/intel_dp_link_training.c intel_get_adjust_train(struct intel_dp *intel_dp, intel_dp 47 drivers/gpu/drm/i915/display/intel_dp_link_training.c for (lane = 0; lane < intel_dp->lane_count; lane++) { intel_dp 57 drivers/gpu/drm/i915/display/intel_dp_link_training.c voltage_max = intel_dp_voltage_max(intel_dp); intel_dp 61 drivers/gpu/drm/i915/display/intel_dp_link_training.c preemph_max = intel_dp_pre_emphasis_max(intel_dp, v); intel_dp 66 drivers/gpu/drm/i915/display/intel_dp_link_training.c intel_dp->train_set[lane] = v | p; intel_dp 70 drivers/gpu/drm/i915/display/intel_dp_link_training.c intel_dp_set_link_train(struct intel_dp *intel_dp, intel_dp 73 drivers/gpu/drm/i915/display/intel_dp_link_training.c u8 buf[sizeof(intel_dp->train_set) + 1]; intel_dp 76 drivers/gpu/drm/i915/display/intel_dp_link_training.c intel_dp_program_link_training_pattern(intel_dp, dp_train_pat); intel_dp 85 drivers/gpu/drm/i915/display/intel_dp_link_training.c memcpy(buf + 1, intel_dp->train_set, intel_dp->lane_count); intel_dp 86 drivers/gpu/drm/i915/display/intel_dp_link_training.c len = intel_dp->lane_count + 1; intel_dp 89 drivers/gpu/drm/i915/display/intel_dp_link_training.c ret = drm_dp_dpcd_write(&intel_dp->aux, DP_TRAINING_PATTERN_SET, intel_dp 96 drivers/gpu/drm/i915/display/intel_dp_link_training.c intel_dp_reset_link_train(struct intel_dp *intel_dp, intel_dp 99 drivers/gpu/drm/i915/display/intel_dp_link_training.c memset(intel_dp->train_set, 0, sizeof(intel_dp->train_set)); intel_dp 100 drivers/gpu/drm/i915/display/intel_dp_link_training.c intel_dp_set_signal_levels(intel_dp); intel_dp 101 drivers/gpu/drm/i915/display/intel_dp_link_training.c return intel_dp_set_link_train(intel_dp, dp_train_pat); intel_dp 105 drivers/gpu/drm/i915/display/intel_dp_link_training.c intel_dp_update_link_train(struct intel_dp *intel_dp) intel_dp 109 drivers/gpu/drm/i915/display/intel_dp_link_training.c intel_dp_set_signal_levels(intel_dp); intel_dp 111 drivers/gpu/drm/i915/display/intel_dp_link_training.c ret = drm_dp_dpcd_write(&intel_dp->aux, DP_TRAINING_LANE0_SET, intel_dp 112 drivers/gpu/drm/i915/display/intel_dp_link_training.c intel_dp->train_set, intel_dp->lane_count); intel_dp 114 drivers/gpu/drm/i915/display/intel_dp_link_training.c return ret == intel_dp->lane_count; intel_dp 117 drivers/gpu/drm/i915/display/intel_dp_link_training.c static bool intel_dp_link_max_vswing_reached(struct intel_dp *intel_dp) intel_dp 121 drivers/gpu/drm/i915/display/intel_dp_link_training.c for (lane = 0; lane < intel_dp->lane_count; lane++) intel_dp 122 drivers/gpu/drm/i915/display/intel_dp_link_training.c if ((intel_dp->train_set[lane] & intel_dp 131 drivers/gpu/drm/i915/display/intel_dp_link_training.c intel_dp_link_training_clock_recovery(struct intel_dp *intel_dp) intel_dp 139 drivers/gpu/drm/i915/display/intel_dp_link_training.c if (intel_dp->prepare_link_retrain) intel_dp 140 drivers/gpu/drm/i915/display/intel_dp_link_training.c intel_dp->prepare_link_retrain(intel_dp); intel_dp 142 drivers/gpu/drm/i915/display/intel_dp_link_training.c intel_dp_compute_rate(intel_dp, intel_dp->link_rate, intel_dp 152 drivers/gpu/drm/i915/display/intel_dp_link_training.c link_config[1] = intel_dp->lane_count; intel_dp 153 drivers/gpu/drm/i915/display/intel_dp_link_training.c if (drm_dp_enhanced_frame_cap(intel_dp->dpcd)) intel_dp 155 drivers/gpu/drm/i915/display/intel_dp_link_training.c drm_dp_dpcd_write(&intel_dp->aux, DP_LINK_BW_SET, link_config, 2); intel_dp 159 drivers/gpu/drm/i915/display/intel_dp_link_training.c drm_dp_dpcd_write(&intel_dp->aux, DP_LINK_RATE_SET, intel_dp 164 drivers/gpu/drm/i915/display/intel_dp_link_training.c drm_dp_dpcd_write(&intel_dp->aux, DP_DOWNSPREAD_CTRL, link_config, 2); intel_dp 166 drivers/gpu/drm/i915/display/intel_dp_link_training.c intel_dp->DP |= DP_PORT_EN; intel_dp 169 drivers/gpu/drm/i915/display/intel_dp_link_training.c if (!intel_dp_reset_link_train(intel_dp, intel_dp 184 drivers/gpu/drm/i915/display/intel_dp_link_training.c if (intel_dp->dpcd[DP_DPCD_REV] >= DP_DPCD_REV_14) intel_dp 193 drivers/gpu/drm/i915/display/intel_dp_link_training.c drm_dp_link_train_clock_recovery_delay(intel_dp->dpcd); intel_dp 195 drivers/gpu/drm/i915/display/intel_dp_link_training.c if (!intel_dp_get_link_status(intel_dp, link_status)) { intel_dp 200 drivers/gpu/drm/i915/display/intel_dp_link_training.c if (drm_dp_clock_recovery_ok(link_status, intel_dp->lane_count)) { intel_dp 215 drivers/gpu/drm/i915/display/intel_dp_link_training.c voltage = intel_dp->train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK; intel_dp 218 drivers/gpu/drm/i915/display/intel_dp_link_training.c intel_get_adjust_train(intel_dp, link_status); intel_dp 219 drivers/gpu/drm/i915/display/intel_dp_link_training.c if (!intel_dp_update_link_train(intel_dp)) { intel_dp 224 drivers/gpu/drm/i915/display/intel_dp_link_training.c if ((intel_dp->train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK) == intel_dp 230 drivers/gpu/drm/i915/display/intel_dp_link_training.c if (intel_dp_link_max_vswing_reached(intel_dp)) intel_dp 243 drivers/gpu/drm/i915/display/intel_dp_link_training.c static u32 intel_dp_training_pattern(struct intel_dp *intel_dp) intel_dp 253 drivers/gpu/drm/i915/display/intel_dp_link_training.c source_tps4 = intel_dp_source_supports_hbr3(intel_dp); intel_dp 254 drivers/gpu/drm/i915/display/intel_dp_link_training.c sink_tps4 = drm_dp_tps4_supported(intel_dp->dpcd); intel_dp 257 drivers/gpu/drm/i915/display/intel_dp_link_training.c } else if (intel_dp->link_rate == 810000) { intel_dp 268 drivers/gpu/drm/i915/display/intel_dp_link_training.c source_tps3 = intel_dp_source_supports_hbr2(intel_dp); intel_dp 269 drivers/gpu/drm/i915/display/intel_dp_link_training.c sink_tps3 = drm_dp_tps3_supported(intel_dp->dpcd); intel_dp 272 drivers/gpu/drm/i915/display/intel_dp_link_training.c } else if (intel_dp->link_rate >= 540000) { intel_dp 283 drivers/gpu/drm/i915/display/intel_dp_link_training.c intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp) intel_dp 290 drivers/gpu/drm/i915/display/intel_dp_link_training.c training_pattern = intel_dp_training_pattern(intel_dp); intel_dp 296 drivers/gpu/drm/i915/display/intel_dp_link_training.c if (!intel_dp_set_link_train(intel_dp, intel_dp 304 drivers/gpu/drm/i915/display/intel_dp_link_training.c drm_dp_link_train_channel_eq_delay(intel_dp->dpcd); intel_dp 305 drivers/gpu/drm/i915/display/intel_dp_link_training.c if (!intel_dp_get_link_status(intel_dp, link_status)) { intel_dp 312 drivers/gpu/drm/i915/display/intel_dp_link_training.c intel_dp->lane_count)) { intel_dp 320 drivers/gpu/drm/i915/display/intel_dp_link_training.c intel_dp->lane_count)) { intel_dp 328 drivers/gpu/drm/i915/display/intel_dp_link_training.c intel_get_adjust_train(intel_dp, link_status); intel_dp 329 drivers/gpu/drm/i915/display/intel_dp_link_training.c if (!intel_dp_update_link_train(intel_dp)) { intel_dp 341 drivers/gpu/drm/i915/display/intel_dp_link_training.c intel_dp_set_idle_link_train(intel_dp); intel_dp 347 drivers/gpu/drm/i915/display/intel_dp_link_training.c void intel_dp_stop_link_train(struct intel_dp *intel_dp) intel_dp 349 drivers/gpu/drm/i915/display/intel_dp_link_training.c intel_dp->link_trained = true; intel_dp 351 drivers/gpu/drm/i915/display/intel_dp_link_training.c intel_dp_set_link_train(intel_dp, intel_dp 356 drivers/gpu/drm/i915/display/intel_dp_link_training.c intel_dp_start_link_train(struct intel_dp *intel_dp) intel_dp 358 drivers/gpu/drm/i915/display/intel_dp_link_training.c struct intel_connector *intel_connector = intel_dp->attached_connector; intel_dp 360 drivers/gpu/drm/i915/display/intel_dp_link_training.c if (!intel_dp_link_training_clock_recovery(intel_dp)) intel_dp 362 drivers/gpu/drm/i915/display/intel_dp_link_training.c if (!intel_dp_link_training_channel_equalization(intel_dp)) intel_dp 368 drivers/gpu/drm/i915/display/intel_dp_link_training.c intel_dp->link_rate, intel_dp->lane_count); intel_dp 375 drivers/gpu/drm/i915/display/intel_dp_link_training.c intel_dp->link_rate, intel_dp->lane_count); intel_dp 376 drivers/gpu/drm/i915/display/intel_dp_link_training.c if (!intel_dp_get_link_train_fallback_values(intel_dp, intel_dp 377 drivers/gpu/drm/i915/display/intel_dp_link_training.c intel_dp->link_rate, intel_dp 378 drivers/gpu/drm/i915/display/intel_dp_link_training.c intel_dp->lane_count)) intel_dp 9 drivers/gpu/drm/i915/display/intel_dp_link_training.h struct intel_dp; intel_dp 11 drivers/gpu/drm/i915/display/intel_dp_link_training.h void intel_dp_start_link_train(struct intel_dp *intel_dp); intel_dp 12 drivers/gpu/drm/i915/display/intel_dp_link_training.h void intel_dp_stop_link_train(struct intel_dp *intel_dp); intel_dp 47 drivers/gpu/drm/i915/display/intel_dp_mst.c struct intel_dp *intel_dp = &intel_mst->primary->dp; intel_dp 53 drivers/gpu/drm/i915/display/intel_dp_mst.c bool constant_n = drm_dp_has_quirk(&intel_dp->desc, intel_dp 66 drivers/gpu/drm/i915/display/intel_dp_mst.c slots = drm_dp_atomic_find_vcpi_slots(state, &intel_dp->mst_mgr, intel_dp 96 drivers/gpu/drm/i915/display/intel_dp_mst.c struct intel_dp *intel_dp = &intel_mst->primary->dp; intel_dp 115 drivers/gpu/drm/i915/display/intel_dp_mst.c drm_dp_mst_port_has_audio(&intel_dp->mst_mgr, port); intel_dp 125 drivers/gpu/drm/i915/display/intel_dp_mst.c limits.max_clock = intel_dp_max_link_rate(intel_dp); intel_dp 128 drivers/gpu/drm/i915/display/intel_dp_mst.c limits.max_lane_count = intel_dp_max_lane_count(intel_dp); intel_dp 141 drivers/gpu/drm/i915/display/intel_dp_mst.c intel_dp_adjust_compliance_config(intel_dp, pipe_config, &limits); intel_dp 207 drivers/gpu/drm/i915/display/intel_dp_mst.c struct intel_dp *intel_dp = &intel_dig_port->dp; intel_dp 212 drivers/gpu/drm/i915/display/intel_dp_mst.c DRM_DEBUG_KMS("active links %d\n", intel_dp->active_mst_links); intel_dp 214 drivers/gpu/drm/i915/display/intel_dp_mst.c drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, connector->port); intel_dp 216 drivers/gpu/drm/i915/display/intel_dp_mst.c ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr); intel_dp 231 drivers/gpu/drm/i915/display/intel_dp_mst.c struct intel_dp *intel_dp = &intel_dig_port->dp; intel_dp 238 drivers/gpu/drm/i915/display/intel_dp_mst.c drm_dp_check_act_status(&intel_dp->mst_mgr); intel_dp 240 drivers/gpu/drm/i915/display/intel_dp_mst.c drm_dp_update_payload_part2(&intel_dp->mst_mgr); intel_dp 242 drivers/gpu/drm/i915/display/intel_dp_mst.c drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, connector->port); intel_dp 248 drivers/gpu/drm/i915/display/intel_dp_mst.c drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector->port, intel_dp 251 drivers/gpu/drm/i915/display/intel_dp_mst.c intel_dp->active_mst_links--; intel_dp 254 drivers/gpu/drm/i915/display/intel_dp_mst.c if (intel_dp->active_mst_links == 0) { intel_dp 255 drivers/gpu/drm/i915/display/intel_dp_mst.c intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF); intel_dp 260 drivers/gpu/drm/i915/display/intel_dp_mst.c DRM_DEBUG_KMS("active links %d\n", intel_dp->active_mst_links); intel_dp 269 drivers/gpu/drm/i915/display/intel_dp_mst.c struct intel_dp *intel_dp = &intel_dig_port->dp; intel_dp 271 drivers/gpu/drm/i915/display/intel_dp_mst.c if (intel_dp->active_mst_links == 0) intel_dp 282 drivers/gpu/drm/i915/display/intel_dp_mst.c struct intel_dp *intel_dp = &intel_dig_port->dp; intel_dp 284 drivers/gpu/drm/i915/display/intel_dp_mst.c if (intel_dp->active_mst_links == 0) intel_dp 296 drivers/gpu/drm/i915/display/intel_dp_mst.c struct intel_dp *intel_dp = &intel_dig_port->dp; intel_dp 310 drivers/gpu/drm/i915/display/intel_dp_mst.c DRM_DEBUG_KMS("active links %d\n", intel_dp->active_mst_links); intel_dp 312 drivers/gpu/drm/i915/display/intel_dp_mst.c if (intel_dp->active_mst_links == 0) intel_dp 313 drivers/gpu/drm/i915/display/intel_dp_mst.c intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON); intel_dp 315 drivers/gpu/drm/i915/display/intel_dp_mst.c drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector->port, true); intel_dp 317 drivers/gpu/drm/i915/display/intel_dp_mst.c if (intel_dp->active_mst_links == 0) intel_dp 321 drivers/gpu/drm/i915/display/intel_dp_mst.c ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr, intel_dp 328 drivers/gpu/drm/i915/display/intel_dp_mst.c intel_dp->active_mst_links++; intel_dp 332 drivers/gpu/drm/i915/display/intel_dp_mst.c ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr); intel_dp 343 drivers/gpu/drm/i915/display/intel_dp_mst.c struct intel_dp *intel_dp = &intel_dig_port->dp; intel_dp 347 drivers/gpu/drm/i915/display/intel_dp_mst.c DRM_DEBUG_KMS("active links %d\n", intel_dp->active_mst_links); intel_dp 353 drivers/gpu/drm/i915/display/intel_dp_mst.c drm_dp_check_act_status(&intel_dp->mst_mgr); intel_dp 355 drivers/gpu/drm/i915/display/intel_dp_mst.c drm_dp_update_payload_part2(&intel_dp->mst_mgr); intel_dp 382 drivers/gpu/drm/i915/display/intel_dp_mst.c struct intel_dp *intel_dp = intel_connector->mst_port; intel_dp 389 drivers/gpu/drm/i915/display/intel_dp_mst.c edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port); intel_dp 400 drivers/gpu/drm/i915/display/intel_dp_mst.c struct intel_dp *intel_dp = intel_connector->mst_port; intel_dp 404 drivers/gpu/drm/i915/display/intel_dp_mst.c return drm_dp_mst_detect_port(connector, &intel_dp->mst_mgr, intel_dp 430 drivers/gpu/drm/i915/display/intel_dp_mst.c struct intel_dp *intel_dp = intel_connector->mst_port; intel_dp 440 drivers/gpu/drm/i915/display/intel_dp_mst.c max_link_clock = intel_dp_max_link_rate(intel_dp); intel_dp 441 drivers/gpu/drm/i915/display/intel_dp_mst.c max_lanes = intel_dp_max_lane_count(intel_dp); intel_dp 463 drivers/gpu/drm/i915/display/intel_dp_mst.c struct intel_dp *intel_dp = intel_connector->mst_port; intel_dp 466 drivers/gpu/drm/i915/display/intel_dp_mst.c return &intel_dp->mst_encoders[crtc->pipe]->base.base; intel_dp 501 drivers/gpu/drm/i915/display/intel_dp_mst.c struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr); intel_dp 502 drivers/gpu/drm/i915/display/intel_dp_mst.c struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); intel_dp 515 drivers/gpu/drm/i915/display/intel_dp_mst.c intel_connector->mst_port = intel_dp; intel_dp 531 drivers/gpu/drm/i915/display/intel_dp_mst.c &intel_dp->mst_encoders[pipe]->base.base; intel_dp 553 drivers/gpu/drm/i915/display/intel_dp_mst.c intel_dp->attached_connector->base.max_bpc_property; intel_dp 638 drivers/gpu/drm/i915/display/intel_dp_mst.c struct intel_dp *intel_dp = &intel_dig_port->dp; intel_dp 643 drivers/gpu/drm/i915/display/intel_dp_mst.c intel_dp->mst_encoders[pipe] = intel_dp_create_fake_mst_encoder(intel_dig_port, pipe); intel_dp 657 drivers/gpu/drm/i915/display/intel_dp_mst.c struct intel_dp *intel_dp = &intel_dig_port->dp; intel_dp 661 drivers/gpu/drm/i915/display/intel_dp_mst.c if (!HAS_DP_MST(i915) || intel_dp_is_edp(intel_dp)) intel_dp 670 drivers/gpu/drm/i915/display/intel_dp_mst.c intel_dp->mst_mgr.cbs = &mst_cbs; intel_dp 674 drivers/gpu/drm/i915/display/intel_dp_mst.c ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, &i915->drm, intel_dp 675 drivers/gpu/drm/i915/display/intel_dp_mst.c &intel_dp->aux, 16, 3, conn_base_id); intel_dp 679 drivers/gpu/drm/i915/display/intel_dp_mst.c intel_dp->can_mst = true; intel_dp 687 drivers/gpu/drm/i915/display/intel_dp_mst.c struct intel_dp *intel_dp = &intel_dig_port->dp; intel_dp 689 drivers/gpu/drm/i915/display/intel_dp_mst.c if (!intel_dp->can_mst) intel_dp 692 drivers/gpu/drm/i915/display/intel_dp_mst.c drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr); intel_dp 864 drivers/gpu/drm/i915/display/intel_dpio_phy.c struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); intel_dp 865 drivers/gpu/drm/i915/display/intel_dpio_phy.c struct intel_digital_port *dport = dp_to_dig_port(intel_dp); intel_dp 1046 drivers/gpu/drm/i915/display/intel_dpio_phy.c struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); intel_dp 1047 drivers/gpu/drm/i915/display/intel_dpio_phy.c struct intel_digital_port *dport = dp_to_dig_port(intel_dp); intel_dp 50 drivers/gpu/drm/i915/display/intel_lspcon.c static struct intel_dp *lspcon_to_intel_dp(struct intel_lspcon *lspcon) intel_dp 75 drivers/gpu/drm/i915/display/intel_lspcon.c struct intel_dp *dp = lspcon_to_intel_dp(lspcon); intel_dp 248 drivers/gpu/drm/i915/display/intel_lspcon.c struct intel_dp *intel_dp = lspcon_to_intel_dp(lspcon); intel_dp 249 drivers/gpu/drm/i915/display/intel_lspcon.c struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); intel_dp 437 drivers/gpu/drm/i915/display/intel_lspcon.c struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); intel_dp 445 drivers/gpu/drm/i915/display/intel_lspcon.c ret = _lspcon_write_avi_infoframe_mca(&intel_dp->aux, intel_dp 448 drivers/gpu/drm/i915/display/intel_lspcon.c ret = _lspcon_write_avi_infoframe_parade(&intel_dp->aux, intel_dp 555 drivers/gpu/drm/i915/display/intel_lspcon.c struct intel_dp *dp = &intel_dig_port->dp; intel_dp 233 drivers/gpu/drm/i915/display/intel_psr.c static bool intel_dp_get_alpm_status(struct intel_dp *intel_dp) intel_dp 237 drivers/gpu/drm/i915/display/intel_psr.c if (drm_dp_dpcd_readb(&intel_dp->aux, DP_RECEIVER_ALPM_CAP, intel_dp 243 drivers/gpu/drm/i915/display/intel_psr.c static u8 intel_dp_get_sink_sync_latency(struct intel_dp *intel_dp) intel_dp 247 drivers/gpu/drm/i915/display/intel_psr.c if (drm_dp_dpcd_readb(&intel_dp->aux, intel_dp 255 drivers/gpu/drm/i915/display/intel_psr.c static u16 intel_dp_get_su_x_granulartiy(struct intel_dp *intel_dp) intel_dp 264 drivers/gpu/drm/i915/display/intel_psr.c if (!(intel_dp->psr_dpcd[1] & DP_PSR2_SU_GRANULARITY_REQUIRED)) intel_dp 267 drivers/gpu/drm/i915/display/intel_psr.c r = drm_dp_dpcd_read(&intel_dp->aux, DP_PSR2_SU_X_GRANULARITY, &val, 2); intel_dp 281 drivers/gpu/drm/i915/display/intel_psr.c void intel_psr_init_dpcd(struct intel_dp *intel_dp) intel_dp 284 drivers/gpu/drm/i915/display/intel_psr.c to_i915(dp_to_dig_port(intel_dp)->base.base.dev); intel_dp 286 drivers/gpu/drm/i915/display/intel_psr.c drm_dp_dpcd_read(&intel_dp->aux, DP_PSR_SUPPORT, intel_dp->psr_dpcd, intel_dp 287 drivers/gpu/drm/i915/display/intel_psr.c sizeof(intel_dp->psr_dpcd)); intel_dp 289 drivers/gpu/drm/i915/display/intel_psr.c if (!intel_dp->psr_dpcd[0]) intel_dp 292 drivers/gpu/drm/i915/display/intel_psr.c intel_dp->psr_dpcd[0]); intel_dp 294 drivers/gpu/drm/i915/display/intel_psr.c if (drm_dp_has_quirk(&intel_dp->desc, DP_DPCD_QUIRK_NO_PSR)) { intel_dp 299 drivers/gpu/drm/i915/display/intel_psr.c if (!(intel_dp->edp_dpcd[1] & DP_EDP_SET_POWER_CAP)) { intel_dp 306 drivers/gpu/drm/i915/display/intel_psr.c intel_dp_get_sink_sync_latency(intel_dp); intel_dp 309 drivers/gpu/drm/i915/display/intel_psr.c dev_priv->psr.dp = intel_dp; intel_dp 312 drivers/gpu/drm/i915/display/intel_psr.c (intel_dp->psr_dpcd[0] == DP_PSR2_WITH_Y_COORD_IS_SUPPORTED)) { intel_dp 313 drivers/gpu/drm/i915/display/intel_psr.c bool y_req = intel_dp->psr_dpcd[1] & intel_dp 315 drivers/gpu/drm/i915/display/intel_psr.c bool alpm = intel_dp_get_alpm_status(intel_dp); intel_dp 334 drivers/gpu/drm/i915/display/intel_psr.c intel_dp_get_colorimetry_status(intel_dp); intel_dp 336 drivers/gpu/drm/i915/display/intel_psr.c intel_dp_get_su_x_granulartiy(intel_dp); intel_dp 341 drivers/gpu/drm/i915/display/intel_psr.c static void intel_psr_setup_vsc(struct intel_dp *intel_dp, intel_dp 344 drivers/gpu/drm/i915/display/intel_psr.c struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); intel_dp 345 drivers/gpu/drm/i915/display/intel_psr.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 374 drivers/gpu/drm/i915/display/intel_psr.c static void hsw_psr_setup_aux(struct intel_dp *intel_dp) intel_dp 376 drivers/gpu/drm/i915/display/intel_psr.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 396 drivers/gpu/drm/i915/display/intel_psr.c aux_clock_divider = intel_dp->get_aux_clock_divider(intel_dp, 0); intel_dp 399 drivers/gpu/drm/i915/display/intel_psr.c aux_ctl = intel_dp->get_aux_send_ctl(intel_dp, sizeof(aux_msg), intel_dp 407 drivers/gpu/drm/i915/display/intel_psr.c static void intel_psr_enable_sink(struct intel_dp *intel_dp) intel_dp 409 drivers/gpu/drm/i915/display/intel_psr.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 414 drivers/gpu/drm/i915/display/intel_psr.c drm_dp_dpcd_writeb(&intel_dp->aux, DP_RECEIVER_ALPM_CONFIG, intel_dp 425 drivers/gpu/drm/i915/display/intel_psr.c drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, dpcd_val); intel_dp 427 drivers/gpu/drm/i915/display/intel_psr.c drm_dp_dpcd_writeb(&intel_dp->aux, DP_SET_POWER, DP_SET_POWER_D0); intel_dp 430 drivers/gpu/drm/i915/display/intel_psr.c static u32 intel_psr1_get_tp_time(struct intel_dp *intel_dp) intel_dp 432 drivers/gpu/drm/i915/display/intel_psr.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 456 drivers/gpu/drm/i915/display/intel_psr.c if (intel_dp_source_supports_hbr2(intel_dp) && intel_dp 457 drivers/gpu/drm/i915/display/intel_psr.c drm_dp_tps3_supported(intel_dp->dpcd)) intel_dp 465 drivers/gpu/drm/i915/display/intel_psr.c static void hsw_activate_psr1(struct intel_dp *intel_dp) intel_dp 467 drivers/gpu/drm/i915/display/intel_psr.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 489 drivers/gpu/drm/i915/display/intel_psr.c val |= intel_psr1_get_tp_time(intel_dp); intel_dp 498 drivers/gpu/drm/i915/display/intel_psr.c static void hsw_activate_psr2(struct intel_dp *intel_dp) intel_dp 500 drivers/gpu/drm/i915/display/intel_psr.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 536 drivers/gpu/drm/i915/display/intel_psr.c static bool intel_psr2_config_valid(struct intel_dp *intel_dp, intel_dp 539 drivers/gpu/drm/i915/display/intel_psr.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 592 drivers/gpu/drm/i915/display/intel_psr.c void intel_psr_compute_config(struct intel_dp *intel_dp, intel_dp 595 drivers/gpu/drm/i915/display/intel_psr.c struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); intel_dp 596 drivers/gpu/drm/i915/display/intel_psr.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 604 drivers/gpu/drm/i915/display/intel_psr.c if (intel_dp != dev_priv->psr.dp) intel_dp 629 drivers/gpu/drm/i915/display/intel_psr.c psr_setup_time = drm_dp_psr_setup_time(intel_dp->psr_dpcd); intel_dp 632 drivers/gpu/drm/i915/display/intel_psr.c intel_dp->psr_dpcd[1]); intel_dp 644 drivers/gpu/drm/i915/display/intel_psr.c crtc_state->has_psr2 = intel_psr2_config_valid(intel_dp, crtc_state); intel_dp 647 drivers/gpu/drm/i915/display/intel_psr.c static void intel_psr_activate(struct intel_dp *intel_dp) intel_dp 649 drivers/gpu/drm/i915/display/intel_psr.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 659 drivers/gpu/drm/i915/display/intel_psr.c hsw_activate_psr2(intel_dp); intel_dp 661 drivers/gpu/drm/i915/display/intel_psr.c hsw_activate_psr1(intel_dp); intel_dp 685 drivers/gpu/drm/i915/display/intel_psr.c static void intel_psr_enable_source(struct intel_dp *intel_dp, intel_dp 688 drivers/gpu/drm/i915/display/intel_psr.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 696 drivers/gpu/drm/i915/display/intel_psr.c hsw_psr_setup_aux(intel_dp); intel_dp 729 drivers/gpu/drm/i915/display/intel_psr.c struct intel_dp *intel_dp = dev_priv->psr.dp; intel_dp 739 drivers/gpu/drm/i915/display/intel_psr.c intel_psr_setup_vsc(intel_dp, crtc_state); intel_dp 740 drivers/gpu/drm/i915/display/intel_psr.c intel_psr_enable_sink(intel_dp); intel_dp 741 drivers/gpu/drm/i915/display/intel_psr.c intel_psr_enable_source(intel_dp, crtc_state); intel_dp 744 drivers/gpu/drm/i915/display/intel_psr.c intel_psr_activate(intel_dp); intel_dp 754 drivers/gpu/drm/i915/display/intel_psr.c void intel_psr_enable(struct intel_dp *intel_dp, intel_dp 757 drivers/gpu/drm/i915/display/intel_psr.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 803 drivers/gpu/drm/i915/display/intel_psr.c static void intel_psr_disable_locked(struct intel_dp *intel_dp) intel_dp 805 drivers/gpu/drm/i915/display/intel_psr.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 833 drivers/gpu/drm/i915/display/intel_psr.c drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, 0); intel_dp 845 drivers/gpu/drm/i915/display/intel_psr.c void intel_psr_disable(struct intel_dp *intel_dp, intel_dp 848 drivers/gpu/drm/i915/display/intel_psr.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 858 drivers/gpu/drm/i915/display/intel_psr.c intel_psr_disable_locked(intel_dp); intel_dp 894 drivers/gpu/drm/i915/display/intel_psr.c void intel_psr_update(struct intel_dp *intel_dp, intel_dp 897 drivers/gpu/drm/i915/display/intel_psr.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 901 drivers/gpu/drm/i915/display/intel_psr.c if (!CAN_PSR(dev_priv) || READ_ONCE(psr->dp) != intel_dp) intel_dp 927 drivers/gpu/drm/i915/display/intel_psr.c intel_psr_disable_locked(intel_dp); intel_dp 1253 drivers/gpu/drm/i915/display/intel_psr.c void intel_psr_short_pulse(struct intel_dp *intel_dp) intel_dp 1255 drivers/gpu/drm/i915/display/intel_psr.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 1262 drivers/gpu/drm/i915/display/intel_psr.c if (!CAN_PSR(dev_priv) || !intel_dp_is_edp(intel_dp)) intel_dp 1267 drivers/gpu/drm/i915/display/intel_psr.c if (!psr->enabled || psr->dp != intel_dp) intel_dp 1270 drivers/gpu/drm/i915/display/intel_psr.c if (drm_dp_dpcd_readb(&intel_dp->aux, DP_PSR_STATUS, &val) != 1) { intel_dp 1277 drivers/gpu/drm/i915/display/intel_psr.c intel_psr_disable_locked(intel_dp); intel_dp 1281 drivers/gpu/drm/i915/display/intel_psr.c if (drm_dp_dpcd_readb(&intel_dp->aux, DP_PSR_ERROR_STATUS, &val) != 1) { intel_dp 1297 drivers/gpu/drm/i915/display/intel_psr.c intel_psr_disable_locked(intel_dp); intel_dp 1301 drivers/gpu/drm/i915/display/intel_psr.c drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_ERROR_STATUS, val); intel_dp 1306 drivers/gpu/drm/i915/display/intel_psr.c bool intel_psr_enabled(struct intel_dp *intel_dp) intel_dp 1308 drivers/gpu/drm/i915/display/intel_psr.c struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); intel_dp 1311 drivers/gpu/drm/i915/display/intel_psr.c if (!CAN_PSR(dev_priv) || !intel_dp_is_edp(intel_dp)) intel_dp 1315 drivers/gpu/drm/i915/display/intel_psr.c ret = (dev_priv->psr.dp == intel_dp && dev_priv->psr.enabled); intel_dp 13 drivers/gpu/drm/i915/display/intel_psr.h struct intel_dp; intel_dp 16 drivers/gpu/drm/i915/display/intel_psr.h void intel_psr_init_dpcd(struct intel_dp *intel_dp); intel_dp 17 drivers/gpu/drm/i915/display/intel_psr.h void intel_psr_enable(struct intel_dp *intel_dp, intel_dp 19 drivers/gpu/drm/i915/display/intel_psr.h void intel_psr_disable(struct intel_dp *intel_dp, intel_dp 21 drivers/gpu/drm/i915/display/intel_psr.h void intel_psr_update(struct intel_dp *intel_dp, intel_dp 31 drivers/gpu/drm/i915/display/intel_psr.h void intel_psr_compute_config(struct intel_dp *intel_dp, intel_dp 35 drivers/gpu/drm/i915/display/intel_psr.h void intel_psr_short_pulse(struct intel_dp *intel_dp); intel_dp 38 drivers/gpu/drm/i915/display/intel_psr.h bool intel_psr_enabled(struct intel_dp *intel_dp); intel_dp 322 drivers/gpu/drm/i915/display/intel_vdsc.c int intel_dp_compute_dsc_params(struct intel_dp *intel_dp, intel_dp 350 drivers/gpu/drm/i915/display/intel_vdsc.c (intel_dp->dsc_dpcd[DP_DSC_REV - DP_DSC_SUPPORT] & intel_dp 354 drivers/gpu/drm/i915/display/intel_vdsc.c (intel_dp->dsc_dpcd[DP_DSC_REV - DP_DSC_SUPPORT] & intel_dp 357 drivers/gpu/drm/i915/display/intel_vdsc.c vdsc_cfg->convert_rgb = intel_dp->dsc_dpcd[DP_DSC_DEC_COLOR_FORMAT_CAP - DP_DSC_SUPPORT] & intel_dp 360 drivers/gpu/drm/i915/display/intel_vdsc.c line_buf_depth = drm_dp_dsc_sink_line_buf_depth(intel_dp->dsc_dpcd); intel_dp 377 drivers/gpu/drm/i915/display/intel_vdsc.c intel_dp->dsc_dpcd[DP_DSC_BLK_PREDICTION_SUPPORT - DP_DSC_SUPPORT] & intel_dp 886 drivers/gpu/drm/i915/display/intel_vdsc.c struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); intel_dp 887 drivers/gpu/drm/i915/display/intel_vdsc.c struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); intel_dp 11 drivers/gpu/drm/i915/display/intel_vdsc.h struct intel_dp; intel_dp 16 drivers/gpu/drm/i915/display/intel_vdsc.h int intel_dp_compute_dsc_params(struct intel_dp *intel_dp, intel_dp 2087 drivers/gpu/drm/i915/i915_debugfs.c struct intel_dp *intel_dp = intel_dp 2099 drivers/gpu/drm/i915/i915_debugfs.c ret = drm_dp_dpcd_readb(&intel_dp->aux, DP_PSR_STATUS, &val); intel_dp 2510 drivers/gpu/drm/i915/i915_debugfs.c struct intel_dp *intel_dp = enc_to_intel_dp(&intel_encoder->base); intel_dp 2512 drivers/gpu/drm/i915/i915_debugfs.c seq_printf(m, "\tDPCD rev: %x\n", intel_dp->dpcd[DP_DPCD_REV]); intel_dp 2513 drivers/gpu/drm/i915/i915_debugfs.c seq_printf(m, "\taudio support: %s\n", yesno(intel_dp->has_audio)); intel_dp 2517 drivers/gpu/drm/i915/i915_debugfs.c drm_dp_downstream_debug(m, intel_dp->dpcd, intel_dp->downstream_ports, intel_dp 2518 drivers/gpu/drm/i915/i915_debugfs.c &intel_dp->aux); intel_dp 2532 drivers/gpu/drm/i915/i915_debugfs.c struct intel_dp *intel_dp = &intel_dig_port->dp; intel_dp 2533 drivers/gpu/drm/i915/i915_debugfs.c bool has_audio = drm_dp_mst_port_has_audio(&intel_dp->mst_mgr, intel_dp 3131 drivers/gpu/drm/i915/i915_debugfs.c struct intel_dp *intel_dp; intel_dp 3158 drivers/gpu/drm/i915/i915_debugfs.c intel_dp = enc_to_intel_dp(&encoder->base); intel_dp 3167 drivers/gpu/drm/i915/i915_debugfs.c intel_dp->compliance.test_active = 1; intel_dp 3169 drivers/gpu/drm/i915/i915_debugfs.c intel_dp->compliance.test_active = 0; intel_dp 3187 drivers/gpu/drm/i915/i915_debugfs.c struct intel_dp *intel_dp; intel_dp 3202 drivers/gpu/drm/i915/i915_debugfs.c intel_dp = enc_to_intel_dp(&encoder->base); intel_dp 3203 drivers/gpu/drm/i915/i915_debugfs.c if (intel_dp->compliance.test_active) intel_dp 3237 drivers/gpu/drm/i915/i915_debugfs.c struct intel_dp *intel_dp; intel_dp 3252 drivers/gpu/drm/i915/i915_debugfs.c intel_dp = enc_to_intel_dp(&encoder->base); intel_dp 3253 drivers/gpu/drm/i915/i915_debugfs.c if (intel_dp->compliance.test_type == intel_dp 3256 drivers/gpu/drm/i915/i915_debugfs.c intel_dp->compliance.test_data.edid); intel_dp 3257 drivers/gpu/drm/i915/i915_debugfs.c else if (intel_dp->compliance.test_type == intel_dp 3260 drivers/gpu/drm/i915/i915_debugfs.c intel_dp->compliance.test_data.hdisplay); intel_dp 3262 drivers/gpu/drm/i915/i915_debugfs.c intel_dp->compliance.test_data.vdisplay); intel_dp 3264 drivers/gpu/drm/i915/i915_debugfs.c intel_dp->compliance.test_data.bpc); intel_dp 3281 drivers/gpu/drm/i915/i915_debugfs.c struct intel_dp *intel_dp; intel_dp 3296 drivers/gpu/drm/i915/i915_debugfs.c intel_dp = enc_to_intel_dp(&encoder->base); intel_dp 3297 drivers/gpu/drm/i915/i915_debugfs.c seq_printf(m, "%02lx", intel_dp->compliance.test_type); intel_dp 4198 drivers/gpu/drm/i915/i915_debugfs.c struct intel_dp *intel_dp; intel_dp 4211 drivers/gpu/drm/i915/i915_debugfs.c intel_dp = enc_to_intel_dp(&encoder->base); intel_dp 4213 drivers/gpu/drm/i915/i915_debugfs.c intel_edp_drrs_enable(intel_dp, intel_dp 4216 drivers/gpu/drm/i915/i915_debugfs.c intel_edp_drrs_disable(intel_dp, intel_dp 4414 drivers/gpu/drm/i915/i915_debugfs.c struct intel_dp *intel_dp = intel_dp 4435 drivers/gpu/drm/i915/i915_debugfs.c err = drm_dp_dpcd_read(&intel_dp->aux, b->offset, buf, size); intel_dp 4449 drivers/gpu/drm/i915/i915_debugfs.c struct intel_dp *intel_dp = intel_dp 4456 drivers/gpu/drm/i915/i915_debugfs.c intel_dp->panel_power_up_delay); intel_dp 4458 drivers/gpu/drm/i915/i915_debugfs.c intel_dp->panel_power_down_delay); intel_dp 4460 drivers/gpu/drm/i915/i915_debugfs.c intel_dp->backlight_on_delay); intel_dp 4462 drivers/gpu/drm/i915/i915_debugfs.c intel_dp->backlight_off_delay); intel_dp 4493 drivers/gpu/drm/i915/i915_debugfs.c struct intel_dp *intel_dp; intel_dp 4528 drivers/gpu/drm/i915/i915_debugfs.c intel_dp = enc_to_intel_dp(&intel_attached_encoder(connector)->base); intel_dp 4533 drivers/gpu/drm/i915/i915_debugfs.c yesno(drm_dp_sink_supports_dsc(intel_dp->dsc_dpcd))); intel_dp 4535 drivers/gpu/drm/i915/i915_debugfs.c yesno(intel_dp->force_dsc_en)); intel_dp 4536 drivers/gpu/drm/i915/i915_debugfs.c if (!intel_dp_is_edp(intel_dp)) intel_dp 4538 drivers/gpu/drm/i915/i915_debugfs.c yesno(drm_dp_sink_supports_fec(intel_dp->fec_capable))); intel_dp 4556 drivers/gpu/drm/i915/i915_debugfs.c struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); intel_dp 4570 drivers/gpu/drm/i915/i915_debugfs.c intel_dp->force_dsc_en = dsc_enable; intel_dp 457 drivers/gpu/drm/i915/i915_drv.h struct intel_dp; intel_dp 461 drivers/gpu/drm/i915/i915_drv.h struct intel_dp *dp; intel_dp 480 drivers/gpu/drm/i915/i915_drv.h struct intel_dp *dp;