imx_readw          91 arch/arm/mach-imx/3ds_debugboard.c 	imr_val = imx_readw(brd_io + INTR_MASK_REG);
imx_readw          92 arch/arm/mach-imx/3ds_debugboard.c 	int_valid = imx_readw(brd_io + INTR_STATUS_REG) & ~imr_val;
imx_readw         114 arch/arm/mach-imx/3ds_debugboard.c 	reg = imx_readw(brd_io + INTR_MASK_REG);
imx_readw         133 arch/arm/mach-imx/3ds_debugboard.c 	reg = imx_readw(brd_io + INTR_MASK_REG);
imx_readw         159 arch/arm/mach-imx/3ds_debugboard.c 	if ((imx_readw(brd_io + MAGIC_NUMBER1_REG) != 0xAAAA) ||
imx_readw         160 arch/arm/mach-imx/3ds_debugboard.c 	    (imx_readw(brd_io + MAGIC_NUMBER2_REG) != 0x5555) ||
imx_readw         161 arch/arm/mach-imx/3ds_debugboard.c 	    (imx_readw(brd_io + MAGIC_NUMBER3_REG) != 0xCAFE)) {
imx_readw         376 arch/arm/mach-imx/mach-mx27ads.c 	if ((imx_readw(PBC_VERSION_REG) & CKIH_27MHZ_BIT_SET) == 0)
imx_readw         154 arch/arm/mach-imx/mach-mx31ads.c 	imr_val = imx_readw(PBC_INTMASK_SET_REG);
imx_readw         155 arch/arm/mach-imx/mach-mx31ads.c 	int_valid = imx_readw(PBC_INTSTATUS_REG) & imr_val;
imx_readw         175 arch/arm/mach-imx/mach-mx31ads.c 	imx_readw(PBC_INTMASK_CLEAR_REG);