imx_clk_pll14xx   399 drivers/clk/imx/clk-imx8mm.c 	clks[IMX8MM_AUDIO_PLL1] = imx_clk_pll14xx("audio_pll1", "audio_pll1_ref_sel", base, &imx8mm_audio_pll);
imx_clk_pll14xx   400 drivers/clk/imx/clk-imx8mm.c 	clks[IMX8MM_AUDIO_PLL2] = imx_clk_pll14xx("audio_pll2", "audio_pll2_ref_sel", base + 0x14, &imx8mm_audio_pll);
imx_clk_pll14xx   401 drivers/clk/imx/clk-imx8mm.c 	clks[IMX8MM_VIDEO_PLL1] = imx_clk_pll14xx("video_pll1", "video_pll1_ref_sel", base + 0x28, &imx8mm_video_pll);
imx_clk_pll14xx   402 drivers/clk/imx/clk-imx8mm.c 	clks[IMX8MM_DRAM_PLL] = imx_clk_pll14xx("dram_pll", "dram_pll_ref_sel", base + 0x50, &imx8mm_dram_pll);
imx_clk_pll14xx   403 drivers/clk/imx/clk-imx8mm.c 	clks[IMX8MM_GPU_PLL] = imx_clk_pll14xx("gpu_pll", "gpu_pll_ref_sel", base + 0x64, &imx8mm_gpu_pll);
imx_clk_pll14xx   404 drivers/clk/imx/clk-imx8mm.c 	clks[IMX8MM_VPU_PLL] = imx_clk_pll14xx("vpu_pll", "vpu_pll_ref_sel", base + 0x74, &imx8mm_vpu_pll);
imx_clk_pll14xx   405 drivers/clk/imx/clk-imx8mm.c 	clks[IMX8MM_ARM_PLL] = imx_clk_pll14xx("arm_pll", "arm_pll_ref_sel", base + 0x84, &imx8mm_arm_pll);
imx_clk_pll14xx   406 drivers/clk/imx/clk-imx8mm.c 	clks[IMX8MM_SYS_PLL1] = imx_clk_pll14xx("sys_pll1", "sys_pll1_ref_sel", base + 0x94, &imx8mm_sys_pll);
imx_clk_pll14xx   407 drivers/clk/imx/clk-imx8mm.c 	clks[IMX8MM_SYS_PLL2] = imx_clk_pll14xx("sys_pll2", "sys_pll2_ref_sel", base + 0x104, &imx8mm_sys_pll);
imx_clk_pll14xx   408 drivers/clk/imx/clk-imx8mm.c 	clks[IMX8MM_SYS_PLL3] = imx_clk_pll14xx("sys_pll3", "sys_pll3_ref_sel", base + 0x114, &imx8mm_sys_pll);
imx_clk_pll14xx   412 drivers/clk/imx/clk-imx8mn.c 	clks[IMX8MN_AUDIO_PLL1] = imx_clk_pll14xx("audio_pll1", "audio_pll1_ref_sel", base, &imx8mn_audio_pll);
imx_clk_pll14xx   413 drivers/clk/imx/clk-imx8mn.c 	clks[IMX8MN_AUDIO_PLL2] = imx_clk_pll14xx("audio_pll2", "audio_pll2_ref_sel", base + 0x14, &imx8mn_audio_pll);
imx_clk_pll14xx   414 drivers/clk/imx/clk-imx8mn.c 	clks[IMX8MN_VIDEO_PLL1] = imx_clk_pll14xx("video_pll1", "video_pll1_ref_sel", base + 0x28, &imx8mn_video_pll);
imx_clk_pll14xx   415 drivers/clk/imx/clk-imx8mn.c 	clks[IMX8MN_DRAM_PLL] = imx_clk_pll14xx("dram_pll", "dram_pll_ref_sel", base + 0x50, &imx8mn_dram_pll);
imx_clk_pll14xx   416 drivers/clk/imx/clk-imx8mn.c 	clks[IMX8MN_GPU_PLL] = imx_clk_pll14xx("gpu_pll", "gpu_pll_ref_sel", base + 0x64, &imx8mn_gpu_pll);
imx_clk_pll14xx   417 drivers/clk/imx/clk-imx8mn.c 	clks[IMX8MN_VPU_PLL] = imx_clk_pll14xx("vpu_pll", "vpu_pll_ref_sel", base + 0x74, &imx8mn_vpu_pll);
imx_clk_pll14xx   418 drivers/clk/imx/clk-imx8mn.c 	clks[IMX8MN_ARM_PLL] = imx_clk_pll14xx("arm_pll", "arm_pll_ref_sel", base + 0x84, &imx8mn_arm_pll);
imx_clk_pll14xx   419 drivers/clk/imx/clk-imx8mn.c 	clks[IMX8MN_SYS_PLL1] = imx_clk_pll14xx("sys_pll1", "sys_pll1_ref_sel", base + 0x94, &imx8mn_sys_pll);
imx_clk_pll14xx   420 drivers/clk/imx/clk-imx8mn.c 	clks[IMX8MN_SYS_PLL2] = imx_clk_pll14xx("sys_pll2", "sys_pll2_ref_sel", base + 0x104, &imx8mn_sys_pll);
imx_clk_pll14xx   421 drivers/clk/imx/clk-imx8mn.c 	clks[IMX8MN_SYS_PLL3] = imx_clk_pll14xx("sys_pll3", "sys_pll3_ref_sel", base + 0x114, &imx8mn_sys_pll);
imx_clk_pll14xx    97 drivers/clk/imx/clk.h struct clk *imx_clk_pll14xx(const char *name, const char *parent_name,