imx_clk_hw_gate2_shared2  808 drivers/clk/imx/clk-imx7d.c 	hws[IMX7D_ENET1_IPG_ROOT_CLK] = imx_clk_hw_gate2_shared2("enet1_ipg_root_clk", "enet_axi_post_div", base + 0x4700, 0, &share_count_enet1);
imx_clk_hw_gate2_shared2  809 drivers/clk/imx/clk-imx7d.c 	hws[IMX7D_ENET1_TIME_ROOT_CLK] = imx_clk_hw_gate2_shared2("enet1_time_root_clk", "enet1_time_post_div", base + 0x4700, 0, &share_count_enet1);
imx_clk_hw_gate2_shared2  810 drivers/clk/imx/clk-imx7d.c 	hws[IMX7D_ENET2_IPG_ROOT_CLK] = imx_clk_hw_gate2_shared2("enet2_ipg_root_clk", "enet_axi_post_div", base + 0x4710, 0, &share_count_enet2);
imx_clk_hw_gate2_shared2  811 drivers/clk/imx/clk-imx7d.c 	hws[IMX7D_ENET2_TIME_ROOT_CLK] = imx_clk_hw_gate2_shared2("enet2_time_root_clk", "enet2_time_post_div", base + 0x4710, 0, &share_count_enet2);
imx_clk_hw_gate2_shared2  812 drivers/clk/imx/clk-imx7d.c 	hws[IMX7D_SAI1_ROOT_CLK] = imx_clk_hw_gate2_shared2("sai1_root_clk", "sai1_post_div", base + 0x48c0, 0, &share_count_sai1);
imx_clk_hw_gate2_shared2  813 drivers/clk/imx/clk-imx7d.c 	hws[IMX7D_SAI1_IPG_CLK]  = imx_clk_hw_gate2_shared2("sai1_ipg_clk",  "ipg_root_clk",  base + 0x48c0, 0, &share_count_sai1);
imx_clk_hw_gate2_shared2  814 drivers/clk/imx/clk-imx7d.c 	hws[IMX7D_SAI2_ROOT_CLK] = imx_clk_hw_gate2_shared2("sai2_root_clk", "sai2_post_div", base + 0x48d0, 0, &share_count_sai2);
imx_clk_hw_gate2_shared2  815 drivers/clk/imx/clk-imx7d.c 	hws[IMX7D_SAI2_IPG_CLK]  = imx_clk_hw_gate2_shared2("sai2_ipg_clk",  "ipg_root_clk",  base + 0x48d0, 0, &share_count_sai2);
imx_clk_hw_gate2_shared2  816 drivers/clk/imx/clk-imx7d.c 	hws[IMX7D_SAI3_ROOT_CLK] = imx_clk_hw_gate2_shared2("sai3_root_clk", "sai3_post_div", base + 0x48e0, 0, &share_count_sai3);
imx_clk_hw_gate2_shared2  817 drivers/clk/imx/clk-imx7d.c 	hws[IMX7D_SAI3_IPG_CLK]  = imx_clk_hw_gate2_shared2("sai3_ipg_clk",  "ipg_root_clk",  base + 0x48e0, 0, &share_count_sai3);
imx_clk_hw_gate2_shared2  820 drivers/clk/imx/clk-imx7d.c 	hws[IMX7D_NAND_RAWNAND_CLK] = imx_clk_hw_gate2_shared2("nand_rawnand_clk", "nand_root_clk", base + 0x4140, 0, &share_count_nand);
imx_clk_hw_gate2_shared2  821 drivers/clk/imx/clk-imx7d.c 	hws[IMX7D_NAND_USDHC_BUS_RAWNAND_CLK] = imx_clk_hw_gate2_shared2("nand_usdhc_rawnand_clk", "nand_usdhc_root_clk", base + 0x4140, 0, &share_count_nand);
imx_clk_hw_gate2_shared2   86 drivers/clk/imx/clk.h 	to_clk(imx_clk_hw_gate2_shared2(name, parent, reg, shift, share_count))