imx_clk_hw_divider 713 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_PERIPH_CLK2] = imx_clk_hw_divider("periph_clk2", "periph_clk2_sel", base + 0x14, 27, 3); imx_clk_hw_divider 714 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_PERIPH2_CLK2] = imx_clk_hw_divider("periph2_clk2", "periph2_clk2_sel", base + 0x14, 0, 3); imx_clk_hw_divider 715 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_IPG] = imx_clk_hw_divider("ipg", "ahb", base + 0x14, 8, 2); imx_clk_hw_divider 716 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_ESAI_PRED] = imx_clk_hw_divider("esai_pred", "esai_sel", base + 0x28, 9, 3); imx_clk_hw_divider 717 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_ESAI_PODF] = imx_clk_hw_divider("esai_podf", "esai_pred", base + 0x28, 25, 3); imx_clk_hw_divider 718 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_ASRC_PRED] = imx_clk_hw_divider("asrc_pred", "asrc_sel", base + 0x30, 12, 3); imx_clk_hw_divider 719 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_ASRC_PODF] = imx_clk_hw_divider("asrc_podf", "asrc_pred", base + 0x30, 9, 3); imx_clk_hw_divider 720 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_SPDIF_PRED] = imx_clk_hw_divider("spdif_pred", "spdif_sel", base + 0x30, 25, 3); imx_clk_hw_divider 721 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_SPDIF_PODF] = imx_clk_hw_divider("spdif_podf", "spdif_pred", base + 0x30, 22, 3); imx_clk_hw_divider 724 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_IPG_PER] = imx_clk_hw_divider("ipg_per", "ipg_per_sel", base + 0x1c, 0, 6); imx_clk_hw_divider 725 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_ECSPI_ROOT] = imx_clk_hw_divider("ecspi_root", "ecspi_sel", base + 0x38, 19, 6); imx_clk_hw_divider 726 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_CAN_ROOT] = imx_clk_hw_divider("can_root", "can_sel", base + 0x20, 2, 6); imx_clk_hw_divider 727 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_UART_SERIAL_PODF] = imx_clk_hw_divider("uart_serial_podf", "uart_sel", base + 0x24, 0, 6); imx_clk_hw_divider 731 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_ECSPI_ROOT] = imx_clk_hw_divider("ecspi_root", "pll3_60m", base + 0x38, 19, 6); imx_clk_hw_divider 732 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_CAN_ROOT] = imx_clk_hw_divider("can_root", "pll3_60m", base + 0x20, 2, 6); imx_clk_hw_divider 734 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_UART_SERIAL_PODF] = imx_clk_hw_divider("uart_serial_podf", "pll3_80m", base + 0x24, 0, 6); imx_clk_hw_divider 740 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_MLB_PODF] = imx_clk_hw_divider("mlb_podf", "mlb_sel", base + 0x18, 23, 3); imx_clk_hw_divider 742 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_GPU2D_CORE_PODF] = imx_clk_hw_divider("gpu2d_core_podf", "gpu2d_core_sel", base + 0x18, 23, 3); imx_clk_hw_divider 743 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_GPU3D_CORE_PODF] = imx_clk_hw_divider("gpu3d_core_podf", "gpu3d_core_sel", base + 0x18, 26, 3); imx_clk_hw_divider 745 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_GPU2D_CORE_PODF] = imx_clk_hw_divider("gpu2d_core_podf", "gpu2d_core_sel", base + 0x18, 29, 3); imx_clk_hw_divider 747 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_GPU3D_SHADER] = imx_clk_hw_divider("gpu3d_shader", "gpu3d_shader_sel", base + 0x18, 29, 3); imx_clk_hw_divider 748 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_IPU1_PODF] = imx_clk_hw_divider("ipu1_podf", "ipu1_sel", base + 0x3c, 11, 3); imx_clk_hw_divider 749 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_IPU2_PODF] = imx_clk_hw_divider("ipu2_podf", "ipu2_sel", base + 0x3c, 16, 3); imx_clk_hw_divider 752 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_IPU1_DI0_PRE] = imx_clk_hw_divider("ipu1_di0_pre", "ipu1_di0_pre_sel", base + 0x34, 3, 3); imx_clk_hw_divider 753 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_IPU1_DI1_PRE] = imx_clk_hw_divider("ipu1_di1_pre", "ipu1_di1_pre_sel", base + 0x34, 12, 3); imx_clk_hw_divider 754 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_IPU2_DI0_PRE] = imx_clk_hw_divider("ipu2_di0_pre", "ipu2_di0_pre_sel", base + 0x38, 3, 3); imx_clk_hw_divider 755 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_IPU2_DI1_PRE] = imx_clk_hw_divider("ipu2_di1_pre", "ipu2_di1_pre_sel", base + 0x38, 12, 3); imx_clk_hw_divider 756 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_HSI_TX_PODF] = imx_clk_hw_divider("hsi_tx_podf", "hsi_tx_sel", base + 0x30, 29, 3); imx_clk_hw_divider 757 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_SSI1_PRED] = imx_clk_hw_divider("ssi1_pred", "ssi1_sel", base + 0x28, 6, 3); imx_clk_hw_divider 758 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_SSI1_PODF] = imx_clk_hw_divider("ssi1_podf", "ssi1_pred", base + 0x28, 0, 6); imx_clk_hw_divider 759 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_SSI2_PRED] = imx_clk_hw_divider("ssi2_pred", "ssi2_sel", base + 0x2c, 6, 3); imx_clk_hw_divider 760 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_SSI2_PODF] = imx_clk_hw_divider("ssi2_podf", "ssi2_pred", base + 0x2c, 0, 6); imx_clk_hw_divider 761 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_SSI3_PRED] = imx_clk_hw_divider("ssi3_pred", "ssi3_sel", base + 0x28, 22, 3); imx_clk_hw_divider 762 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_SSI3_PODF] = imx_clk_hw_divider("ssi3_podf", "ssi3_pred", base + 0x28, 16, 6); imx_clk_hw_divider 763 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_USDHC1_PODF] = imx_clk_hw_divider("usdhc1_podf", "usdhc1_sel", base + 0x24, 11, 3); imx_clk_hw_divider 764 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_USDHC2_PODF] = imx_clk_hw_divider("usdhc2_podf", "usdhc2_sel", base + 0x24, 16, 3); imx_clk_hw_divider 765 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_USDHC3_PODF] = imx_clk_hw_divider("usdhc3_podf", "usdhc3_sel", base + 0x24, 19, 3); imx_clk_hw_divider 766 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_USDHC4_PODF] = imx_clk_hw_divider("usdhc4_podf", "usdhc4_sel", base + 0x24, 22, 3); imx_clk_hw_divider 767 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_ENFC_PRED] = imx_clk_hw_divider("enfc_pred", "enfc_sel", base + 0x2c, 18, 3); imx_clk_hw_divider 768 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_ENFC_PODF] = imx_clk_hw_divider("enfc_podf", "enfc_pred", base + 0x2c, 21, 6); imx_clk_hw_divider 770 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_EIM_PODF] = imx_clk_hw_divider("eim_podf", "eim_sel", base + 0x1c, 20, 3); imx_clk_hw_divider 771 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_EIM_SLOW_PODF] = imx_clk_hw_divider("eim_slow_podf", "eim_slow_sel", base + 0x1c, 23, 3); imx_clk_hw_divider 777 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_VPU_AXI_PODF] = imx_clk_hw_divider("vpu_axi_podf", "vpu_axi_sel", base + 0x24, 25, 3); imx_clk_hw_divider 778 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_CKO1_PODF] = imx_clk_hw_divider("cko1_podf", "cko1_sel", base + 0x60, 4, 3); imx_clk_hw_divider 779 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_CKO2_PODF] = imx_clk_hw_divider("cko2_podf", "cko2_sel", base + 0x60, 21, 3); imx_clk_hw_divider 335 drivers/clk/imx/clk-imx6sl.c hws[IMX6SL_CLK_PERIPH_CLK2_PODF] = imx_clk_hw_divider("periph_clk2_podf", "periph_clk2_sel", base + 0x14, 27, 3); imx_clk_hw_divider 336 drivers/clk/imx/clk-imx6sl.c hws[IMX6SL_CLK_PERIPH2_CLK2_PODF] = imx_clk_hw_divider("periph2_clk2_podf", "periph2_clk2_sel", base + 0x14, 0, 3); imx_clk_hw_divider 337 drivers/clk/imx/clk-imx6sl.c hws[IMX6SL_CLK_IPG] = imx_clk_hw_divider("ipg", "ahb", base + 0x14, 8, 2); imx_clk_hw_divider 338 drivers/clk/imx/clk-imx6sl.c hws[IMX6SL_CLK_CSI_PODF] = imx_clk_hw_divider("csi_podf", "csi_sel", base + 0x3c, 11, 3); imx_clk_hw_divider 339 drivers/clk/imx/clk-imx6sl.c hws[IMX6SL_CLK_LCDIF_AXI_PODF] = imx_clk_hw_divider("lcdif_axi_podf", "lcdif_axi_sel", base + 0x3c, 16, 3); imx_clk_hw_divider 340 drivers/clk/imx/clk-imx6sl.c hws[IMX6SL_CLK_USDHC1_PODF] = imx_clk_hw_divider("usdhc1_podf", "usdhc1_sel", base + 0x24, 11, 3); imx_clk_hw_divider 341 drivers/clk/imx/clk-imx6sl.c hws[IMX6SL_CLK_USDHC2_PODF] = imx_clk_hw_divider("usdhc2_podf", "usdhc2_sel", base + 0x24, 16, 3); imx_clk_hw_divider 342 drivers/clk/imx/clk-imx6sl.c hws[IMX6SL_CLK_USDHC3_PODF] = imx_clk_hw_divider("usdhc3_podf", "usdhc3_sel", base + 0x24, 19, 3); imx_clk_hw_divider 343 drivers/clk/imx/clk-imx6sl.c hws[IMX6SL_CLK_USDHC4_PODF] = imx_clk_hw_divider("usdhc4_podf", "usdhc4_sel", base + 0x24, 22, 3); imx_clk_hw_divider 344 drivers/clk/imx/clk-imx6sl.c hws[IMX6SL_CLK_SSI1_PRED] = imx_clk_hw_divider("ssi1_pred", "ssi1_sel", base + 0x28, 6, 3); imx_clk_hw_divider 345 drivers/clk/imx/clk-imx6sl.c hws[IMX6SL_CLK_SSI1_PODF] = imx_clk_hw_divider("ssi1_podf", "ssi1_pred", base + 0x28, 0, 6); imx_clk_hw_divider 346 drivers/clk/imx/clk-imx6sl.c hws[IMX6SL_CLK_SSI2_PRED] = imx_clk_hw_divider("ssi2_pred", "ssi2_sel", base + 0x2c, 6, 3); imx_clk_hw_divider 347 drivers/clk/imx/clk-imx6sl.c hws[IMX6SL_CLK_SSI2_PODF] = imx_clk_hw_divider("ssi2_podf", "ssi2_pred", base + 0x2c, 0, 6); imx_clk_hw_divider 348 drivers/clk/imx/clk-imx6sl.c hws[IMX6SL_CLK_SSI3_PRED] = imx_clk_hw_divider("ssi3_pred", "ssi3_sel", base + 0x28, 22, 3); imx_clk_hw_divider 349 drivers/clk/imx/clk-imx6sl.c hws[IMX6SL_CLK_SSI3_PODF] = imx_clk_hw_divider("ssi3_podf", "ssi3_pred", base + 0x28, 16, 6); imx_clk_hw_divider 351 drivers/clk/imx/clk-imx6sl.c hws[IMX6SL_CLK_PXP_AXI_PODF] = imx_clk_hw_divider("pxp_axi_podf", "pxp_axi_sel", base + 0x34, 3, 3); imx_clk_hw_divider 352 drivers/clk/imx/clk-imx6sl.c hws[IMX6SL_CLK_EPDC_AXI_PODF] = imx_clk_hw_divider("epdc_axi_podf", "epdc_axi_sel", base + 0x34, 12, 3); imx_clk_hw_divider 353 drivers/clk/imx/clk-imx6sl.c hws[IMX6SL_CLK_GPU2D_OVG_PODF] = imx_clk_hw_divider("gpu2d_ovg_podf", "gpu2d_ovg_sel", base + 0x18, 26, 3); imx_clk_hw_divider 354 drivers/clk/imx/clk-imx6sl.c hws[IMX6SL_CLK_GPU2D_PODF] = imx_clk_hw_divider("gpu2d_podf", "gpu2d_sel", base + 0x18, 29, 3); imx_clk_hw_divider 355 drivers/clk/imx/clk-imx6sl.c hws[IMX6SL_CLK_LCDIF_PIX_PRED] = imx_clk_hw_divider("lcdif_pix_pred", "lcdif_pix_sel", base + 0x38, 3, 3); imx_clk_hw_divider 356 drivers/clk/imx/clk-imx6sl.c hws[IMX6SL_CLK_EPDC_PIX_PRED] = imx_clk_hw_divider("epdc_pix_pred", "epdc_pix_sel", base + 0x38, 12, 3); imx_clk_hw_divider 358 drivers/clk/imx/clk-imx6sl.c hws[IMX6SL_CLK_EPDC_PIX_PODF] = imx_clk_hw_divider("epdc_pix_podf", "epdc_pix_pred", base + 0x18, 23, 3); imx_clk_hw_divider 359 drivers/clk/imx/clk-imx6sl.c hws[IMX6SL_CLK_SPDIF0_PRED] = imx_clk_hw_divider("spdif0_pred", "spdif0_sel", base + 0x30, 25, 3); imx_clk_hw_divider 360 drivers/clk/imx/clk-imx6sl.c hws[IMX6SL_CLK_SPDIF0_PODF] = imx_clk_hw_divider("spdif0_podf", "spdif0_pred", base + 0x30, 22, 3); imx_clk_hw_divider 361 drivers/clk/imx/clk-imx6sl.c hws[IMX6SL_CLK_SPDIF1_PRED] = imx_clk_hw_divider("spdif1_pred", "spdif1_sel", base + 0x30, 12, 3); imx_clk_hw_divider 362 drivers/clk/imx/clk-imx6sl.c hws[IMX6SL_CLK_SPDIF1_PODF] = imx_clk_hw_divider("spdif1_podf", "spdif1_pred", base + 0x30, 9, 3); imx_clk_hw_divider 363 drivers/clk/imx/clk-imx6sl.c hws[IMX6SL_CLK_EXTERN_AUDIO_PRED] = imx_clk_hw_divider("extern_audio_pred", "extern_audio_sel", base + 0x28, 9, 3); imx_clk_hw_divider 364 drivers/clk/imx/clk-imx6sl.c hws[IMX6SL_CLK_EXTERN_AUDIO_PODF] = imx_clk_hw_divider("extern_audio_podf", "extern_audio_pred", base + 0x28, 25, 3); imx_clk_hw_divider 365 drivers/clk/imx/clk-imx6sl.c hws[IMX6SL_CLK_ECSPI_ROOT] = imx_clk_hw_divider("ecspi_root", "ecspi_sel", base + 0x38, 19, 6); imx_clk_hw_divider 366 drivers/clk/imx/clk-imx6sl.c hws[IMX6SL_CLK_UART_ROOT] = imx_clk_hw_divider("uart_root", "uart_sel", base + 0x24, 0, 6); imx_clk_hw_divider 237 drivers/clk/imx/clk-imx6sll.c hws[IMX6SLL_CLK_PERIPH_CLK2] = imx_clk_hw_divider("periph_clk2", "periph_clk2_sel", base + 0x14, 27, 3); imx_clk_hw_divider 238 drivers/clk/imx/clk-imx6sll.c hws[IMX6SLL_CLK_PERIPH2_CLK2] = imx_clk_hw_divider("periph2_clk2", "periph2_clk2_sel", base + 0x14, 0, 3); imx_clk_hw_divider 239 drivers/clk/imx/clk-imx6sll.c hws[IMX6SLL_CLK_IPG] = imx_clk_hw_divider("ipg", "ahb", base + 0x14, 8, 2); imx_clk_hw_divider 240 drivers/clk/imx/clk-imx6sll.c hws[IMX6SLL_CLK_LCDIF_PODF] = imx_clk_hw_divider("lcdif_podf", "lcdif_pred", base + 0x18, 23, 3); imx_clk_hw_divider 241 drivers/clk/imx/clk-imx6sll.c hws[IMX6SLL_CLK_PERCLK] = imx_clk_hw_divider("perclk", "perclk_sel", base + 0x1c, 0, 6); imx_clk_hw_divider 242 drivers/clk/imx/clk-imx6sll.c hws[IMX6SLL_CLK_USDHC3_PODF] = imx_clk_hw_divider("usdhc3_podf", "usdhc3_sel", base + 0x24, 19, 3); imx_clk_hw_divider 243 drivers/clk/imx/clk-imx6sll.c hws[IMX6SLL_CLK_USDHC2_PODF] = imx_clk_hw_divider("usdhc2_podf", "usdhc2_sel", base + 0x24, 16, 3); imx_clk_hw_divider 244 drivers/clk/imx/clk-imx6sll.c hws[IMX6SLL_CLK_USDHC1_PODF] = imx_clk_hw_divider("usdhc1_podf", "usdhc1_sel", base + 0x24, 11, 3); imx_clk_hw_divider 245 drivers/clk/imx/clk-imx6sll.c hws[IMX6SLL_CLK_UART_PODF] = imx_clk_hw_divider("uart_podf", "uart_sel", base + 0x24, 0, 6); imx_clk_hw_divider 246 drivers/clk/imx/clk-imx6sll.c hws[IMX6SLL_CLK_SSI3_PRED] = imx_clk_hw_divider("ssi3_pred", "ssi3_sel", base + 0x28, 22, 3); imx_clk_hw_divider 247 drivers/clk/imx/clk-imx6sll.c hws[IMX6SLL_CLK_SSI3_PODF] = imx_clk_hw_divider("ssi3_podf", "ssi3_pred", base + 0x28, 16, 6); imx_clk_hw_divider 248 drivers/clk/imx/clk-imx6sll.c hws[IMX6SLL_CLK_SSI1_PRED] = imx_clk_hw_divider("ssi1_pred", "ssi1_sel", base + 0x28, 6, 3); imx_clk_hw_divider 249 drivers/clk/imx/clk-imx6sll.c hws[IMX6SLL_CLK_SSI1_PODF] = imx_clk_hw_divider("ssi1_podf", "ssi1_pred", base + 0x28, 0, 6); imx_clk_hw_divider 250 drivers/clk/imx/clk-imx6sll.c hws[IMX6SLL_CLK_SSI2_PRED] = imx_clk_hw_divider("ssi2_pred", "ssi2_sel", base + 0x2c, 6, 3); imx_clk_hw_divider 251 drivers/clk/imx/clk-imx6sll.c hws[IMX6SLL_CLK_SSI2_PODF] = imx_clk_hw_divider("ssi2_podf", "ssi2_pred", base + 0x2c, 0, 6); imx_clk_hw_divider 252 drivers/clk/imx/clk-imx6sll.c hws[IMX6SLL_CLK_SPDIF_PRED] = imx_clk_hw_divider("spdif_pred", "spdif_sel", base + 0x30, 25, 3); imx_clk_hw_divider 253 drivers/clk/imx/clk-imx6sll.c hws[IMX6SLL_CLK_SPDIF_PODF] = imx_clk_hw_divider("spdif_podf", "spdif_pred", base + 0x30, 22, 3); imx_clk_hw_divider 254 drivers/clk/imx/clk-imx6sll.c hws[IMX6SLL_CLK_EXTERN_AUDIO_PRED] = imx_clk_hw_divider("extern_audio_pred", "extern_audio_sel", base + 0x30, 12, 3); imx_clk_hw_divider 255 drivers/clk/imx/clk-imx6sll.c hws[IMX6SLL_CLK_EXTERN_AUDIO_PODF] = imx_clk_hw_divider("extern_audio_podf", "extern_audio_pred", base + 0x30, 9, 3); imx_clk_hw_divider 256 drivers/clk/imx/clk-imx6sll.c hws[IMX6SLL_CLK_EPDC_PODF] = imx_clk_hw_divider("epdc_podf", "epdc_pre_sel", base + 0x34, 12, 3); imx_clk_hw_divider 257 drivers/clk/imx/clk-imx6sll.c hws[IMX6SLL_CLK_ECSPI_PODF] = imx_clk_hw_divider("ecspi_podf", "ecspi_sel", base + 0x38, 19, 6); imx_clk_hw_divider 258 drivers/clk/imx/clk-imx6sll.c hws[IMX6SLL_CLK_LCDIF_PRED] = imx_clk_hw_divider("lcdif_pred", "lcdif_pre_sel", base + 0x38, 12, 3); imx_clk_hw_divider 320 drivers/clk/imx/clk-imx6sx.c hws[IMX6SX_CLK_PERIPH_CLK2] = imx_clk_hw_divider("periph_clk2", "periph_clk2_sel", base + 0x14, 27, 3); imx_clk_hw_divider 321 drivers/clk/imx/clk-imx6sx.c hws[IMX6SX_CLK_PERIPH2_CLK2] = imx_clk_hw_divider("periph2_clk2", "periph2_clk2_sel", base + 0x14, 0, 3); imx_clk_hw_divider 322 drivers/clk/imx/clk-imx6sx.c hws[IMX6SX_CLK_IPG] = imx_clk_hw_divider("ipg", "ahb", base + 0x14, 8, 2); imx_clk_hw_divider 323 drivers/clk/imx/clk-imx6sx.c hws[IMX6SX_CLK_GPU_CORE_PODF] = imx_clk_hw_divider("gpu_core_podf", "gpu_core_sel", base + 0x18, 29, 3); imx_clk_hw_divider 324 drivers/clk/imx/clk-imx6sx.c hws[IMX6SX_CLK_GPU_AXI_PODF] = imx_clk_hw_divider("gpu_axi_podf", "gpu_axi_sel", base + 0x18, 26, 3); imx_clk_hw_divider 325 drivers/clk/imx/clk-imx6sx.c hws[IMX6SX_CLK_LCDIF1_PODF] = imx_clk_hw_divider("lcdif1_podf", "lcdif1_pred", base + 0x18, 23, 3); imx_clk_hw_divider 326 drivers/clk/imx/clk-imx6sx.c hws[IMX6SX_CLK_QSPI1_PODF] = imx_clk_hw_divider("qspi1_podf", "qspi1_sel", base + 0x1c, 26, 3); imx_clk_hw_divider 327 drivers/clk/imx/clk-imx6sx.c hws[IMX6SX_CLK_EIM_SLOW_PODF] = imx_clk_hw_divider("eim_slow_podf", "eim_slow_sel", base + 0x1c, 23, 3); imx_clk_hw_divider 328 drivers/clk/imx/clk-imx6sx.c hws[IMX6SX_CLK_LCDIF2_PODF] = imx_clk_hw_divider("lcdif2_podf", "lcdif2_pred", base + 0x1c, 20, 3); imx_clk_hw_divider 330 drivers/clk/imx/clk-imx6sx.c hws[IMX6SX_CLK_VID_PODF] = imx_clk_hw_divider("vid_podf", "vid_sel", base + 0x20, 24, 2); imx_clk_hw_divider 331 drivers/clk/imx/clk-imx6sx.c hws[IMX6SX_CLK_CAN_PODF] = imx_clk_hw_divider("can_podf", "can_sel", base + 0x20, 2, 6); imx_clk_hw_divider 332 drivers/clk/imx/clk-imx6sx.c hws[IMX6SX_CLK_USDHC4_PODF] = imx_clk_hw_divider("usdhc4_podf", "usdhc4_sel", base + 0x24, 22, 3); imx_clk_hw_divider 333 drivers/clk/imx/clk-imx6sx.c hws[IMX6SX_CLK_USDHC3_PODF] = imx_clk_hw_divider("usdhc3_podf", "usdhc3_sel", base + 0x24, 19, 3); imx_clk_hw_divider 334 drivers/clk/imx/clk-imx6sx.c hws[IMX6SX_CLK_USDHC2_PODF] = imx_clk_hw_divider("usdhc2_podf", "usdhc2_sel", base + 0x24, 16, 3); imx_clk_hw_divider 335 drivers/clk/imx/clk-imx6sx.c hws[IMX6SX_CLK_USDHC1_PODF] = imx_clk_hw_divider("usdhc1_podf", "usdhc1_sel", base + 0x24, 11, 3); imx_clk_hw_divider 336 drivers/clk/imx/clk-imx6sx.c hws[IMX6SX_CLK_UART_PODF] = imx_clk_hw_divider("uart_podf", "uart_sel", base + 0x24, 0, 6); imx_clk_hw_divider 337 drivers/clk/imx/clk-imx6sx.c hws[IMX6SX_CLK_ESAI_PRED] = imx_clk_hw_divider("esai_pred", "esai_sel", base + 0x28, 9, 3); imx_clk_hw_divider 338 drivers/clk/imx/clk-imx6sx.c hws[IMX6SX_CLK_ESAI_PODF] = imx_clk_hw_divider("esai_podf", "esai_pred", base + 0x28, 25, 3); imx_clk_hw_divider 339 drivers/clk/imx/clk-imx6sx.c hws[IMX6SX_CLK_SSI3_PRED] = imx_clk_hw_divider("ssi3_pred", "ssi3_sel", base + 0x28, 22, 3); imx_clk_hw_divider 340 drivers/clk/imx/clk-imx6sx.c hws[IMX6SX_CLK_SSI3_PODF] = imx_clk_hw_divider("ssi3_podf", "ssi3_pred", base + 0x28, 16, 6); imx_clk_hw_divider 341 drivers/clk/imx/clk-imx6sx.c hws[IMX6SX_CLK_SSI1_PRED] = imx_clk_hw_divider("ssi1_pred", "ssi1_sel", base + 0x28, 6, 3); imx_clk_hw_divider 342 drivers/clk/imx/clk-imx6sx.c hws[IMX6SX_CLK_SSI1_PODF] = imx_clk_hw_divider("ssi1_podf", "ssi1_pred", base + 0x28, 0, 6); imx_clk_hw_divider 343 drivers/clk/imx/clk-imx6sx.c hws[IMX6SX_CLK_QSPI2_PRED] = imx_clk_hw_divider("qspi2_pred", "qspi2_sel", base + 0x2c, 18, 3); imx_clk_hw_divider 344 drivers/clk/imx/clk-imx6sx.c hws[IMX6SX_CLK_QSPI2_PODF] = imx_clk_hw_divider("qspi2_podf", "qspi2_pred", base + 0x2c, 21, 6); imx_clk_hw_divider 345 drivers/clk/imx/clk-imx6sx.c hws[IMX6SX_CLK_SSI2_PRED] = imx_clk_hw_divider("ssi2_pred", "ssi2_sel", base + 0x2c, 6, 3); imx_clk_hw_divider 346 drivers/clk/imx/clk-imx6sx.c hws[IMX6SX_CLK_SSI2_PODF] = imx_clk_hw_divider("ssi2_podf", "ssi2_pred", base + 0x2c, 0, 6); imx_clk_hw_divider 347 drivers/clk/imx/clk-imx6sx.c hws[IMX6SX_CLK_SPDIF_PRED] = imx_clk_hw_divider("spdif_pred", "spdif_sel", base + 0x30, 25, 3); imx_clk_hw_divider 348 drivers/clk/imx/clk-imx6sx.c hws[IMX6SX_CLK_SPDIF_PODF] = imx_clk_hw_divider("spdif_podf", "spdif_pred", base + 0x30, 22, 3); imx_clk_hw_divider 349 drivers/clk/imx/clk-imx6sx.c hws[IMX6SX_CLK_AUDIO_PRED] = imx_clk_hw_divider("audio_pred", "audio_sel", base + 0x30, 12, 3); imx_clk_hw_divider 350 drivers/clk/imx/clk-imx6sx.c hws[IMX6SX_CLK_AUDIO_PODF] = imx_clk_hw_divider("audio_podf", "audio_pred", base + 0x30, 9, 3); imx_clk_hw_divider 351 drivers/clk/imx/clk-imx6sx.c hws[IMX6SX_CLK_ENET_PODF] = imx_clk_hw_divider("enet_podf", "enet_pre_sel", base + 0x34, 12, 3); imx_clk_hw_divider 352 drivers/clk/imx/clk-imx6sx.c hws[IMX6SX_CLK_M4_PODF] = imx_clk_hw_divider("m4_podf", "m4_sel", base + 0x34, 3, 3); imx_clk_hw_divider 353 drivers/clk/imx/clk-imx6sx.c hws[IMX6SX_CLK_ECSPI_PODF] = imx_clk_hw_divider("ecspi_podf", "ecspi_sel", base + 0x38, 19, 6); imx_clk_hw_divider 354 drivers/clk/imx/clk-imx6sx.c hws[IMX6SX_CLK_LCDIF1_PRED] = imx_clk_hw_divider("lcdif1_pred", "lcdif1_pre_sel", base + 0x38, 12, 3); imx_clk_hw_divider 355 drivers/clk/imx/clk-imx6sx.c hws[IMX6SX_CLK_LCDIF2_PRED] = imx_clk_hw_divider("lcdif2_pred", "lcdif2_pre_sel", base + 0x38, 3, 3); imx_clk_hw_divider 356 drivers/clk/imx/clk-imx6sx.c hws[IMX6SX_CLK_DISPLAY_PODF] = imx_clk_hw_divider("display_podf", "display_sel", base + 0x3c, 16, 3); imx_clk_hw_divider 357 drivers/clk/imx/clk-imx6sx.c hws[IMX6SX_CLK_CSI_PODF] = imx_clk_hw_divider("csi_podf", "csi_sel", base + 0x3c, 11, 3); imx_clk_hw_divider 358 drivers/clk/imx/clk-imx6sx.c hws[IMX6SX_CLK_CKO1_PODF] = imx_clk_hw_divider("cko1_podf", "cko1_sel", base + 0x60, 4, 3); imx_clk_hw_divider 359 drivers/clk/imx/clk-imx6sx.c hws[IMX6SX_CLK_CKO2_PODF] = imx_clk_hw_divider("cko2_podf", "cko2_sel", base + 0x60, 21, 3); imx_clk_hw_divider 289 drivers/clk/imx/clk-imx6ul.c hws[IMX6UL_CLK_PERIPH_CLK2] = imx_clk_hw_divider("periph_clk2", "periph_clk2_sel", base + 0x14, 27, 3); imx_clk_hw_divider 290 drivers/clk/imx/clk-imx6ul.c hws[IMX6UL_CLK_PERIPH2_CLK2] = imx_clk_hw_divider("periph2_clk2", "periph2_clk2_sel", base + 0x14, 0, 3); imx_clk_hw_divider 291 drivers/clk/imx/clk-imx6ul.c hws[IMX6UL_CLK_IPG] = imx_clk_hw_divider("ipg", "ahb", base + 0x14, 8, 2); imx_clk_hw_divider 292 drivers/clk/imx/clk-imx6ul.c hws[IMX6UL_CLK_LCDIF_PODF] = imx_clk_hw_divider("lcdif_podf", "lcdif_pred", base + 0x18, 23, 3); imx_clk_hw_divider 293 drivers/clk/imx/clk-imx6ul.c hws[IMX6UL_CLK_QSPI1_PDOF] = imx_clk_hw_divider("qspi1_podf", "qspi1_sel", base + 0x1c, 26, 3); imx_clk_hw_divider 294 drivers/clk/imx/clk-imx6ul.c hws[IMX6UL_CLK_EIM_SLOW_PODF] = imx_clk_hw_divider("eim_slow_podf", "eim_slow_sel", base + 0x1c, 23, 3); imx_clk_hw_divider 295 drivers/clk/imx/clk-imx6ul.c hws[IMX6UL_CLK_PERCLK] = imx_clk_hw_divider("perclk", "perclk_sel", base + 0x1c, 0, 6); imx_clk_hw_divider 296 drivers/clk/imx/clk-imx6ul.c hws[IMX6UL_CLK_CAN_PODF] = imx_clk_hw_divider("can_podf", "can_sel", base + 0x20, 2, 6); imx_clk_hw_divider 297 drivers/clk/imx/clk-imx6ul.c hws[IMX6UL_CLK_GPMI_PODF] = imx_clk_hw_divider("gpmi_podf", "gpmi_sel", base + 0x24, 22, 3); imx_clk_hw_divider 298 drivers/clk/imx/clk-imx6ul.c hws[IMX6UL_CLK_BCH_PODF] = imx_clk_hw_divider("bch_podf", "bch_sel", base + 0x24, 19, 3); imx_clk_hw_divider 299 drivers/clk/imx/clk-imx6ul.c hws[IMX6UL_CLK_USDHC2_PODF] = imx_clk_hw_divider("usdhc2_podf", "usdhc2_sel", base + 0x24, 16, 3); imx_clk_hw_divider 300 drivers/clk/imx/clk-imx6ul.c hws[IMX6UL_CLK_USDHC1_PODF] = imx_clk_hw_divider("usdhc1_podf", "usdhc1_sel", base + 0x24, 11, 3); imx_clk_hw_divider 301 drivers/clk/imx/clk-imx6ul.c hws[IMX6UL_CLK_UART_PODF] = imx_clk_hw_divider("uart_podf", "uart_sel", base + 0x24, 0, 6); imx_clk_hw_divider 302 drivers/clk/imx/clk-imx6ul.c hws[IMX6UL_CLK_SAI3_PRED] = imx_clk_hw_divider("sai3_pred", "sai3_sel", base + 0x28, 22, 3); imx_clk_hw_divider 303 drivers/clk/imx/clk-imx6ul.c hws[IMX6UL_CLK_SAI3_PODF] = imx_clk_hw_divider("sai3_podf", "sai3_pred", base + 0x28, 16, 6); imx_clk_hw_divider 304 drivers/clk/imx/clk-imx6ul.c hws[IMX6UL_CLK_SAI1_PRED] = imx_clk_hw_divider("sai1_pred", "sai1_sel", base + 0x28, 6, 3); imx_clk_hw_divider 305 drivers/clk/imx/clk-imx6ul.c hws[IMX6UL_CLK_SAI1_PODF] = imx_clk_hw_divider("sai1_podf", "sai1_pred", base + 0x28, 0, 6); imx_clk_hw_divider 307 drivers/clk/imx/clk-imx6ul.c hws[IMX6ULL_CLK_ESAI_PRED] = imx_clk_hw_divider("esai_pred", "esai_sel", base + 0x28, 9, 3); imx_clk_hw_divider 308 drivers/clk/imx/clk-imx6ul.c hws[IMX6ULL_CLK_ESAI_PODF] = imx_clk_hw_divider("esai_podf", "esai_pred", base + 0x28, 25, 3); imx_clk_hw_divider 310 drivers/clk/imx/clk-imx6ul.c hws[IMX6UL_CLK_ENFC_PRED] = imx_clk_hw_divider("enfc_pred", "enfc_sel", base + 0x2c, 18, 3); imx_clk_hw_divider 311 drivers/clk/imx/clk-imx6ul.c hws[IMX6UL_CLK_ENFC_PODF] = imx_clk_hw_divider("enfc_podf", "enfc_pred", base + 0x2c, 21, 6); imx_clk_hw_divider 312 drivers/clk/imx/clk-imx6ul.c hws[IMX6UL_CLK_SAI2_PRED] = imx_clk_hw_divider("sai2_pred", "sai2_sel", base + 0x2c, 6, 3); imx_clk_hw_divider 313 drivers/clk/imx/clk-imx6ul.c hws[IMX6UL_CLK_SAI2_PODF] = imx_clk_hw_divider("sai2_podf", "sai2_pred", base + 0x2c, 0, 6); imx_clk_hw_divider 314 drivers/clk/imx/clk-imx6ul.c hws[IMX6UL_CLK_SPDIF_PRED] = imx_clk_hw_divider("spdif_pred", "spdif_sel", base + 0x30, 25, 3); imx_clk_hw_divider 315 drivers/clk/imx/clk-imx6ul.c hws[IMX6UL_CLK_SPDIF_PODF] = imx_clk_hw_divider("spdif_podf", "spdif_pred", base + 0x30, 22, 3); imx_clk_hw_divider 317 drivers/clk/imx/clk-imx6ul.c hws[IMX6UL_CLK_SIM_PODF] = imx_clk_hw_divider("sim_podf", "sim_pre_sel", base + 0x34, 12, 3); imx_clk_hw_divider 319 drivers/clk/imx/clk-imx6ul.c hws[IMX6ULL_CLK_EPDC_PODF] = imx_clk_hw_divider("epdc_podf", "epdc_pre_sel", base + 0x34, 12, 3); imx_clk_hw_divider 320 drivers/clk/imx/clk-imx6ul.c hws[IMX6UL_CLK_ECSPI_PODF] = imx_clk_hw_divider("ecspi_podf", "ecspi_sel", base + 0x38, 19, 6); imx_clk_hw_divider 321 drivers/clk/imx/clk-imx6ul.c hws[IMX6UL_CLK_LCDIF_PRED] = imx_clk_hw_divider("lcdif_pred", "lcdif_pre_sel", base + 0x38, 12, 3); imx_clk_hw_divider 322 drivers/clk/imx/clk-imx6ul.c hws[IMX6UL_CLK_CSI_PODF] = imx_clk_hw_divider("csi_podf", "csi_sel", base + 0x3c, 11, 3); imx_clk_hw_divider 324 drivers/clk/imx/clk-imx6ul.c hws[IMX6UL_CLK_CKO1_PODF] = imx_clk_hw_divider("cko1_podf", "cko1_sel", base + 0x60, 4, 3); imx_clk_hw_divider 325 drivers/clk/imx/clk-imx6ul.c hws[IMX6UL_CLK_CKO2_PODF] = imx_clk_hw_divider("cko2_podf", "cko2_sel", base + 0x60, 21, 3); imx_clk_hw_divider 134 drivers/clk/imx/clk-imx7ulp.c clks[IMX7ULP_CLK_GPU_DIV] = imx_clk_hw_divider("gpu_clk", "nic0_clk", base + 0x40, 20, 4);