imx_clk_hw_busy_divider 782 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_AXI] = imx_clk_hw_busy_divider("axi", "axi_sel", base + 0x14, 16, 3, base + 0x48, 0); imx_clk_hw_busy_divider 783 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_MMDC_CH0_AXI_PODF] = imx_clk_hw_busy_divider("mmdc_ch0_axi_podf", "periph", base + 0x14, 19, 3, base + 0x48, 4); imx_clk_hw_busy_divider 786 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_MMDC_CH1_AXI_PODF] = imx_clk_hw_busy_divider("mmdc_ch1_axi_podf", "mmdc_ch1_axi_cg", base + 0x14, 3, 3, base + 0x48, 2); imx_clk_hw_busy_divider 788 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_MMDC_CH1_AXI_PODF] = imx_clk_hw_busy_divider("mmdc_ch1_axi_podf", "periph2", base + 0x14, 3, 3, base + 0x48, 2); imx_clk_hw_busy_divider 790 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_ARM] = imx_clk_hw_busy_divider("arm", "pll1_sw", base + 0x10, 0, 3, base + 0x48, 16); imx_clk_hw_busy_divider 791 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_CLK_AHB] = imx_clk_hw_busy_divider("ahb", "periph", base + 0x14, 10, 3, base + 0x48, 1); imx_clk_hw_busy_divider 334 drivers/clk/imx/clk-imx6sl.c hws[IMX6SL_CLK_OCRAM_PODF] = imx_clk_hw_busy_divider("ocram_podf", "ocram_sel", base + 0x14, 16, 3, base + 0x48, 0); imx_clk_hw_busy_divider 369 drivers/clk/imx/clk-imx6sl.c hws[IMX6SL_CLK_AHB] = imx_clk_hw_busy_divider("ahb", "periph", base + 0x14, 10, 3, base + 0x48, 1); imx_clk_hw_busy_divider 370 drivers/clk/imx/clk-imx6sl.c hws[IMX6SL_CLK_MMDC_ROOT] = imx_clk_hw_busy_divider("mmdc", "periph2", base + 0x14, 3, 3, base + 0x48, 2); imx_clk_hw_busy_divider 371 drivers/clk/imx/clk-imx6sl.c hws[IMX6SL_CLK_ARM] = imx_clk_hw_busy_divider("arm", "pll1_sw", base + 0x10, 0, 3, base + 0x48, 16); imx_clk_hw_busy_divider 260 drivers/clk/imx/clk-imx6sll.c hws[IMX6SLL_CLK_ARM] = imx_clk_hw_busy_divider("arm", "pll1_sw", base + 0x10, 0, 3, base + 0x48, 16); imx_clk_hw_busy_divider 261 drivers/clk/imx/clk-imx6sll.c hws[IMX6SLL_CLK_MMDC_PODF] = imx_clk_hw_busy_divider("mmdc_podf", "periph2", base + 0x14, 3, 3, base + 0x48, 2); imx_clk_hw_busy_divider 262 drivers/clk/imx/clk-imx6sll.c hws[IMX6SLL_CLK_AXI_PODF] = imx_clk_hw_busy_divider("axi", "axi_sel", base + 0x14, 16, 3, base + 0x48, 0); imx_clk_hw_busy_divider 263 drivers/clk/imx/clk-imx6sll.c hws[IMX6SLL_CLK_AHB] = imx_clk_hw_busy_divider("ahb", "periph", base + 0x14, 10, 3, base + 0x48, 1); imx_clk_hw_busy_divider 370 drivers/clk/imx/clk-imx6sx.c hws[IMX6SX_CLK_OCRAM_PODF] = imx_clk_hw_busy_divider("ocram_podf", "ocram_sel", base + 0x14, 16, 3, base + 0x48, 0); imx_clk_hw_busy_divider 371 drivers/clk/imx/clk-imx6sx.c hws[IMX6SX_CLK_AHB] = imx_clk_hw_busy_divider("ahb", "periph", base + 0x14, 10, 3, base + 0x48, 1); imx_clk_hw_busy_divider 372 drivers/clk/imx/clk-imx6sx.c hws[IMX6SX_CLK_MMDC_PODF] = imx_clk_hw_busy_divider("mmdc_podf", "periph2", base + 0x14, 3, 3, base + 0x48, 2); imx_clk_hw_busy_divider 373 drivers/clk/imx/clk-imx6sx.c hws[IMX6SX_CLK_ARM] = imx_clk_hw_busy_divider("arm", "pll1_sw", base + 0x10, 0, 3, base + 0x48, 16); imx_clk_hw_busy_divider 327 drivers/clk/imx/clk-imx6ul.c hws[IMX6UL_CLK_ARM] = imx_clk_hw_busy_divider("arm", "pll1_sw", base + 0x10, 0, 3, base + 0x48, 16); imx_clk_hw_busy_divider 328 drivers/clk/imx/clk-imx6ul.c hws[IMX6UL_CLK_MMDC_PODF] = imx_clk_hw_busy_divider("mmdc_podf", "periph2", base + 0x14, 3, 3, base + 0x48, 2); imx_clk_hw_busy_divider 329 drivers/clk/imx/clk-imx6ul.c hws[IMX6UL_CLK_AXI_PODF] = imx_clk_hw_busy_divider("axi_podf", "axi_sel", base + 0x14, 16, 3, base + 0x48, 0); imx_clk_hw_busy_divider 330 drivers/clk/imx/clk-imx6ul.c hws[IMX6UL_CLK_AHB] = imx_clk_hw_busy_divider("ahb", "periph", base + 0x14, 10, 3, base + 0x48, 1); imx_clk_hw_busy_divider 176 drivers/clk/imx/clk.h struct clk_hw *imx_clk_hw_busy_divider(const char *name, const char *parent_name,