CLK_TOP_DDRPHYCFG_SEL  492 drivers/clk/mediatek/clk-mt2701.c 	MUX_GATE_FLAGS(CLK_TOP_DDRPHYCFG_SEL, "ddrphycfg_sel",
CLK_TOP_DDRPHYCFG_SEL  519 drivers/clk/mediatek/clk-mt7622.c 	MUX_GATE(CLK_TOP_DDRPHYCFG_SEL, "ddrphycfg_sel", ddrphycfg_parents,
CLK_TOP_DDRPHYCFG_SEL  642 drivers/clk/mediatek/clk-mt7622.c 	clk_prepare_enable(clk_data->clks[CLK_TOP_DDRPHYCFG_SEL]);
CLK_TOP_DDRPHYCFG_SEL  491 drivers/clk/mediatek/clk-mt7629.c 	MUX_GATE(CLK_TOP_DDRPHYCFG_SEL, "ddrphycfg_sel", ddrphycfg_parents,
CLK_TOP_DDRPHYCFG_SEL  596 drivers/clk/mediatek/clk-mt7629.c 	clk_prepare_enable(clk_data->clks[CLK_TOP_DDRPHYCFG_SEL]);
CLK_TOP_DDRPHYCFG_SEL  381 drivers/clk/mediatek/clk-mt8135.c 	MUX_GATE(CLK_TOP_DDRPHYCFG_SEL, "ddrphycfg_sel", ddrphycfg_parents,
CLK_TOP_DDRPHYCFG_SEL  544 drivers/clk/mediatek/clk-mt8173.c 	MUX_GATE(CLK_TOP_DDRPHYCFG_SEL, "ddrphycfg_sel", ddrphycfg_parents, 0x0040, 16, 1, 23),
CLK_TOP_DDRPHYCFG_SEL  919 drivers/clk/mediatek/clk-mt8173.c 	clk_prepare_enable(mt8173_top_clk_data->clks[CLK_TOP_DDRPHYCFG_SEL]);