CLK_TOP_AUD_1_SEL  796 drivers/clk/mediatek/clk-mt2712.c 	MUX_GATE(CLK_TOP_AUD_1_SEL, "aud_1_sel",
CLK_TOP_AUD_1_SEL  579 drivers/clk/mediatek/clk-mt8173.c 	MUX_GATE(CLK_TOP_AUD_1_SEL, "aud_1_sel", aud_1_parents, 0x00a0, 24, 2, 31),