CLK_SOURCE_UARTD  745 drivers/clk/tegra/clk-tegra-periph.c 	UART("uartd", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_UARTD, 65, tegra_clk_uartd),
CLK_SOURCE_UARTD  750 drivers/clk/tegra/clk-tegra-periph.c 	UART8("uartd", mux_pllp_pllc_pllc4_out0_pllc4_out1_clkm_pllc4_out2, CLK_SOURCE_UARTD, 65, tegra_clk_uartd_8),
CLK_SOURCE_UARTD  784 drivers/clk/tegra/clk-tegra20.c 	TEGRA_INIT_DATA_NODIV("uartd",	mux_pllpcm_clkm, CLK_SOURCE_UARTD, 30, 2, 65,  TEGRA_PERIPH_ON_APB, TEGRA20_CLK_UARTD),