CLK_SET_RATE_GATE  686 arch/powerpc/platforms/512x/clock-commonclk.c 			entry->name_en0, CLK_SET_RATE_GATE,
CLK_SET_RATE_GATE  447 drivers/acpi/acpi_lpss.c 					CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
CLK_SET_RATE_GATE  467 drivers/clk/at91/clk-audio-pll.c 	init.flags = CLK_SET_RATE_GATE;
CLK_SET_RATE_GATE  497 drivers/clk/at91/clk-audio-pll.c 	init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
CLK_SET_RATE_GATE  528 drivers/clk/at91/clk-audio-pll.c 	init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
CLK_SET_RATE_GATE  290 drivers/clk/at91/clk-generated.c 	init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
CLK_SET_RATE_GATE  100 drivers/clk/at91/clk-h32mx.c 	init.flags = CLK_SET_RATE_GATE;
CLK_SET_RATE_GATE  296 drivers/clk/at91/clk-pll.c 	init.flags = CLK_SET_RATE_GATE;
CLK_SET_RATE_GATE   90 drivers/clk/at91/clk-plldiv.c 	init.flags = CLK_SET_RATE_GATE;
CLK_SET_RATE_GATE  203 drivers/clk/at91/clk-programmable.c 	init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE;
CLK_SET_RATE_GATE  307 drivers/clk/at91/clk-sam9x60-pll.c 	init.flags = CLK_SET_RATE_GATE;
CLK_SET_RATE_GATE  124 drivers/clk/at91/clk-smd.c 	init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE;
CLK_SET_RATE_GATE  212 drivers/clk/at91/clk-usb.c 	init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
CLK_SET_RATE_GATE  262 drivers/clk/at91/clk-usb.c 	init.flags = CLK_SET_RATE_GATE | CLK_SET_RATE_PARENT;
CLK_SET_RATE_GATE  140 drivers/clk/at91/clk-utmi.c 	init.flags = CLK_SET_RATE_GATE;
CLK_SET_RATE_GATE 1428 drivers/clk/bcm/clk-bcm2835.c 		init.flags |= CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE;
CLK_SET_RATE_GATE 1455 drivers/clk/bcm/clk-bcm2835.c 				 CLK_IGNORE_UNUSED | CLK_SET_RATE_GATE,
CLK_SET_RATE_GATE  451 drivers/clk/clk-axi-clkgen.c 	init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE;
CLK_SET_RATE_GATE  445 drivers/clk/clk-cs2000-cp.c 	init.flags		= CLK_SET_RATE_GATE;
CLK_SET_RATE_GATE  809 drivers/clk/clk-stm32f4.c 	init.flags = CLK_SET_RATE_GATE;
CLK_SET_RATE_GATE  228 drivers/clk/clk-wm831x.c 	.flags = CLK_SET_RATE_GATE,
CLK_SET_RATE_GATE  824 drivers/clk/clk.c 	if (core->flags & CLK_SET_RATE_GATE)
CLK_SET_RATE_GATE  908 drivers/clk/clk.c 	if (core->flags & CLK_SET_RATE_GATE)
CLK_SET_RATE_GATE 3009 drivers/clk/clk.c 	ENTRY(CLK_SET_RATE_GATE),
CLK_SET_RATE_GATE   44 drivers/clk/h8300/clk-div.c 				   CLK_SET_RATE_GATE, divcr, offset, width,
CLK_SET_RATE_GATE   78 drivers/clk/imx/clk-composite-7ulp.c 				       &clk_gate_ops, CLK_SET_RATE_GATE |
CLK_SET_RATE_GATE  192 drivers/clk/imx/clk-imx6sll.c 		 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0x70, 19, 2, 0, post_div_table, &imx_ccm_lock);
CLK_SET_RATE_GATE  194 drivers/clk/imx/clk-imx6sll.c 		 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0x170, 15, 1, 0, &imx_ccm_lock);
CLK_SET_RATE_GATE  196 drivers/clk/imx/clk-imx6sll.c 		 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0xa0, 19, 2, 0, post_div_table, &imx_ccm_lock);
CLK_SET_RATE_GATE  198 drivers/clk/imx/clk-imx6sll.c 		 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0x170, 30, 2, 0, video_div_table, &imx_ccm_lock);
CLK_SET_RATE_GATE  219 drivers/clk/imx/clk-imx6ul.c 		 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0x70, 19, 2, 0, post_div_table, &imx_ccm_lock);
CLK_SET_RATE_GATE  221 drivers/clk/imx/clk-imx6ul.c 		 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0x170, 15, 1, 0, &imx_ccm_lock);
CLK_SET_RATE_GATE  223 drivers/clk/imx/clk-imx6ul.c 		 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0xa0, 19, 2, 0, post_div_table, &imx_ccm_lock);
CLK_SET_RATE_GATE  225 drivers/clk/imx/clk-imx6ul.c 		 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0x170, 30, 2, 0, video_div_table, &imx_ccm_lock);
CLK_SET_RATE_GATE  442 drivers/clk/imx/clk-imx7d.c 				CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0x70, 21, 2, 0, test_div_table, &imx_ccm_lock);
CLK_SET_RATE_GATE  444 drivers/clk/imx/clk-imx7d.c 				CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0xf0, 19, 2, 0, test_div_table, &imx_ccm_lock);
CLK_SET_RATE_GATE  446 drivers/clk/imx/clk-imx7d.c 				CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0xf0, 22, 2, 0, post_div_table, &imx_ccm_lock);
CLK_SET_RATE_GATE  448 drivers/clk/imx/clk-imx7d.c 				CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0x130, 19, 2, 0, test_div_table, &imx_ccm_lock);
CLK_SET_RATE_GATE  450 drivers/clk/imx/clk-imx7d.c 				CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0x130, 22, 2, 0, post_div_table, &imx_ccm_lock);
CLK_SET_RATE_GATE   91 drivers/clk/imx/clk-imx7ulp.c 	clks[IMX7ULP_CLK_APLL_PRE_DIV]	= imx_clk_hw_divider_flags("apll_pre_div", "apll_pre_sel", base + 0x508,	8,	3,	CLK_SET_RATE_GATE);
CLK_SET_RATE_GATE   92 drivers/clk/imx/clk-imx7ulp.c 	clks[IMX7ULP_CLK_SPLL_PRE_DIV]	= imx_clk_hw_divider_flags("spll_pre_div", "spll_pre_sel", base + 0x608,	8,	3,	CLK_SET_RATE_GATE);
CLK_SET_RATE_GATE  116 drivers/clk/imx/clk-imx7ulp.c 	clks[IMX7ULP_CLK_SPLL_BUS_CLK]	= imx_clk_divider_gate("spll_bus_clk", "spll_sel", CLK_SET_RATE_GATE, base + 0x604, 8, 3, 0, ulp_div_table, &imx_ccm_lock);
CLK_SET_RATE_GATE  192 drivers/clk/imx/clk-pfdv2.c 	init.flags = CLK_SET_RATE_GATE;
CLK_SET_RATE_GATE  227 drivers/clk/imx/clk-pllv4.c 	init.flags = CLK_SET_RATE_GATE;
CLK_SET_RATE_GATE  686 drivers/clk/ingenic/cgu.c 		clk_init.flags |= CLK_SET_RATE_GATE;
CLK_SET_RATE_GATE 1836 drivers/clk/meson/meson8b.c 		.flags = CLK_SET_RATE_GATE | CLK_SET_RATE_PARENT,
CLK_SET_RATE_GATE 1891 drivers/clk/meson/meson8b.c 		.flags = CLK_SET_RATE_GATE | CLK_SET_RATE_PARENT,
CLK_SET_RATE_GATE   53 drivers/clk/microchip/clk-pic32mzda.c 			.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE,\
CLK_SET_RATE_GATE  237 drivers/clk/nxp/clk-lpc32xx.c 		CLK_SET_RATE_GATE | CLK_SET_RATE_PARENT, LPC32XX_CLK_USB_DIV),
CLK_SET_RATE_GATE 1131 drivers/clk/qcom/gcc-ipq806x.c 			.flags = CLK_SET_RATE_GATE,
CLK_SET_RATE_GATE 1180 drivers/clk/qcom/gcc-ipq806x.c 			.flags = CLK_SET_RATE_GATE,
CLK_SET_RATE_GATE 1587 drivers/clk/qcom/gcc-ipq806x.c 			.flags = CLK_SET_RATE_GATE,
CLK_SET_RATE_GATE 1679 drivers/clk/qcom/gcc-ipq806x.c 			.flags = CLK_SET_RATE_GATE,
CLK_SET_RATE_GATE 1771 drivers/clk/qcom/gcc-ipq806x.c 			.flags = CLK_SET_RATE_GATE,
CLK_SET_RATE_GATE 1868 drivers/clk/qcom/gcc-ipq806x.c 			.flags = CLK_SET_RATE_GATE,
CLK_SET_RATE_GATE 2005 drivers/clk/qcom/gcc-ipq806x.c 			.flags = CLK_SET_RATE_GATE,
CLK_SET_RATE_GATE 2075 drivers/clk/qcom/gcc-ipq806x.c 			.flags = CLK_SET_RATE_GATE,
CLK_SET_RATE_GATE 2145 drivers/clk/qcom/gcc-ipq806x.c 			.flags = CLK_SET_RATE_GATE,
CLK_SET_RATE_GATE 2209 drivers/clk/qcom/gcc-ipq806x.c 			.flags = CLK_SET_RATE_GATE,
CLK_SET_RATE_GATE  779 drivers/clk/qcom/gcc-mdm9615.c 			.flags = CLK_SET_RATE_GATE,
CLK_SET_RATE_GATE  828 drivers/clk/qcom/gcc-mdm9615.c 			.flags = CLK_SET_RATE_GATE,
CLK_SET_RATE_GATE 1043 drivers/clk/qcom/gcc-mdm9615.c 			.flags = CLK_SET_RATE_GATE,
CLK_SET_RATE_GATE 1092 drivers/clk/qcom/gcc-mdm9615.c 			.flags = CLK_SET_RATE_GATE,
CLK_SET_RATE_GATE 1147 drivers/clk/qcom/gcc-mdm9615.c 			.flags = CLK_SET_RATE_GATE,
CLK_SET_RATE_GATE 1202 drivers/clk/qcom/gcc-mdm9615.c 			.flags = CLK_SET_RATE_GATE,
CLK_SET_RATE_GATE 1257 drivers/clk/qcom/gcc-mdm9615.c 			.flags = CLK_SET_RATE_GATE,
CLK_SET_RATE_GATE 1393 drivers/clk/qcom/gcc-msm8660.c 			.flags = CLK_SET_RATE_GATE,
CLK_SET_RATE_GATE 1442 drivers/clk/qcom/gcc-msm8660.c 			.flags = CLK_SET_RATE_GATE,
CLK_SET_RATE_GATE 1798 drivers/clk/qcom/gcc-msm8660.c 			.flags = CLK_SET_RATE_GATE,
CLK_SET_RATE_GATE 1852 drivers/clk/qcom/gcc-msm8660.c 			.flags = CLK_SET_RATE_GATE,
CLK_SET_RATE_GATE 1901 drivers/clk/qcom/gcc-msm8660.c 			.flags = CLK_SET_RATE_GATE,
CLK_SET_RATE_GATE 1968 drivers/clk/qcom/gcc-msm8660.c 			.flags = CLK_SET_RATE_GATE,
CLK_SET_RATE_GATE 1619 drivers/clk/qcom/gcc-msm8960.c 			.flags = CLK_SET_RATE_GATE,
CLK_SET_RATE_GATE 1668 drivers/clk/qcom/gcc-msm8960.c 			.flags = CLK_SET_RATE_GATE,
CLK_SET_RATE_GATE 2027 drivers/clk/qcom/gcc-msm8960.c 			.flags = CLK_SET_RATE_GATE,
CLK_SET_RATE_GATE 2081 drivers/clk/qcom/gcc-msm8960.c 			.flags = CLK_SET_RATE_GATE,
CLK_SET_RATE_GATE 2130 drivers/clk/qcom/gcc-msm8960.c 			.flags = CLK_SET_RATE_GATE,
CLK_SET_RATE_GATE 2179 drivers/clk/qcom/gcc-msm8960.c 			.flags = CLK_SET_RATE_GATE,
CLK_SET_RATE_GATE 2228 drivers/clk/qcom/gcc-msm8960.c 			.flags = CLK_SET_RATE_GATE,
CLK_SET_RATE_GATE 2323 drivers/clk/qcom/gcc-msm8960.c 			.flags = CLK_SET_RATE_GATE,
CLK_SET_RATE_GATE 2390 drivers/clk/qcom/gcc-msm8960.c 			.flags = CLK_SET_RATE_GATE,
CLK_SET_RATE_GATE 2878 drivers/clk/qcom/gcc-msm8960.c 			.flags = CLK_SET_RATE_GATE,
CLK_SET_RATE_GATE 2940 drivers/clk/qcom/gcc-msm8960.c 			.flags = CLK_SET_RATE_GATE,
CLK_SET_RATE_GATE  136 drivers/clk/qcom/lcc-ipq806x.c 			.flags = CLK_SET_RATE_GATE,
CLK_SET_RATE_GATE  250 drivers/clk/qcom/lcc-ipq806x.c 			.flags = CLK_SET_RATE_GATE,
CLK_SET_RATE_GATE  330 drivers/clk/qcom/lcc-ipq806x.c 			.flags = CLK_SET_RATE_GATE,
CLK_SET_RATE_GATE  119 drivers/clk/qcom/lcc-mdm9615.c 			.flags = CLK_SET_RATE_GATE,
CLK_SET_RATE_GATE  225 drivers/clk/qcom/lcc-mdm9615.c 			.flags = CLK_SET_RATE_GATE,		\
CLK_SET_RATE_GATE  369 drivers/clk/qcom/lcc-mdm9615.c 			.flags = CLK_SET_RATE_GATE,
CLK_SET_RATE_GATE  437 drivers/clk/qcom/lcc-mdm9615.c 			.flags = CLK_SET_RATE_GATE,
CLK_SET_RATE_GATE  117 drivers/clk/qcom/lcc-msm8960.c 			.flags = CLK_SET_RATE_GATE,
CLK_SET_RATE_GATE  223 drivers/clk/qcom/lcc-msm8960.c 			.flags = CLK_SET_RATE_GATE,		\
CLK_SET_RATE_GATE  367 drivers/clk/qcom/lcc-msm8960.c 			.flags = CLK_SET_RATE_GATE,
CLK_SET_RATE_GATE  435 drivers/clk/qcom/lcc-msm8960.c 			.flags = CLK_SET_RATE_GATE,
CLK_SET_RATE_GATE  470 drivers/clk/sirf/clk-common.c 	.flags = CLK_SET_RATE_GATE,
CLK_SET_RATE_GATE  947 drivers/clk/tegra/clk-tegra114.c 			     CLK_SET_RATE_GATE, &pll_m_params, NULL);
CLK_SET_RATE_GATE 1080 drivers/clk/tegra/clk-tegra124.c 			     CLK_SET_RATE_GATE, &pll_m_params, NULL);
CLK_SET_RATE_GATE  645 drivers/clk/tegra/clk-tegra20.c 			    CLK_SET_RATE_GATE, &pll_m_params, NULL);
CLK_SET_RATE_GATE 3097 drivers/clk/tegra/clk-tegra210.c 			     CLK_SET_RATE_GATE, &pll_m_params, NULL);
CLK_SET_RATE_GATE 3103 drivers/clk/tegra/clk-tegra210.c 			     CLK_SET_RATE_GATE, &pll_mb_params, NULL);
CLK_SET_RATE_GATE  836 drivers/clk/tegra/clk-tegra30.c 			    CLK_SET_RATE_GATE, &pll_m_params, NULL);
CLK_SET_RATE_GATE  152 drivers/clk/ux500/u8500_of_clk.c 				CLK_SET_RATE_GATE);
CLK_SET_RATE_GATE  159 drivers/clk/ux500/u8500_of_clk.c 				CLK_SET_RATE_GATE);
CLK_SET_RATE_GATE  163 drivers/clk/ux500/u8500_of_clk.c 				CLK_SET_RATE_GATE);
CLK_SET_RATE_GATE  167 drivers/clk/ux500/u8500_of_clk.c 				CLK_SET_RATE_GATE);
CLK_SET_RATE_GATE  174 drivers/clk/ux500/u8500_of_clk.c 				CLK_SET_RATE_GATE);
CLK_SET_RATE_GATE  193 drivers/clk/ux500/u8500_of_clk.c 				CLK_SET_RATE_GATE);
CLK_SET_RATE_GATE  212 drivers/clk/ux500/u8500_of_clk.c 					100000000, CLK_SET_RATE_GATE);
CLK_SET_RATE_GATE  216 drivers/clk/ux500/u8500_of_clk.c 				PRCMU_PLLDSI, 0, CLK_SET_RATE_GATE);
CLK_SET_RATE_GATE  220 drivers/clk/ux500/u8500_of_clk.c 				PRCMU_DSI0CLK, 0, CLK_SET_RATE_GATE);
CLK_SET_RATE_GATE  224 drivers/clk/ux500/u8500_of_clk.c 				PRCMU_DSI1CLK, 0, CLK_SET_RATE_GATE);
CLK_SET_RATE_GATE  228 drivers/clk/ux500/u8500_of_clk.c 				PRCMU_DSI0ESCCLK, 0, CLK_SET_RATE_GATE);
CLK_SET_RATE_GATE  232 drivers/clk/ux500/u8500_of_clk.c 				PRCMU_DSI1ESCCLK, 0, CLK_SET_RATE_GATE);
CLK_SET_RATE_GATE  236 drivers/clk/ux500/u8500_of_clk.c 				PRCMU_DSI2ESCCLK, 0, CLK_SET_RATE_GATE);
CLK_SET_RATE_GATE  439 drivers/clk/ux500/u8500_of_clk.c 			bases[CLKRST1_INDEX], BIT(0), CLK_SET_RATE_GATE);
CLK_SET_RATE_GATE  443 drivers/clk/ux500/u8500_of_clk.c 			bases[CLKRST1_INDEX], BIT(1), CLK_SET_RATE_GATE);
CLK_SET_RATE_GATE  447 drivers/clk/ux500/u8500_of_clk.c 			bases[CLKRST1_INDEX], BIT(2), CLK_SET_RATE_GATE);
CLK_SET_RATE_GATE  451 drivers/clk/ux500/u8500_of_clk.c 			bases[CLKRST1_INDEX], BIT(3), CLK_SET_RATE_GATE);
CLK_SET_RATE_GATE  455 drivers/clk/ux500/u8500_of_clk.c 			bases[CLKRST1_INDEX], BIT(4), CLK_SET_RATE_GATE);
CLK_SET_RATE_GATE  459 drivers/clk/ux500/u8500_of_clk.c 			bases[CLKRST1_INDEX], BIT(5), CLK_SET_RATE_GATE);
CLK_SET_RATE_GATE  463 drivers/clk/ux500/u8500_of_clk.c 			bases[CLKRST1_INDEX], BIT(6), CLK_SET_RATE_GATE);
CLK_SET_RATE_GATE  467 drivers/clk/ux500/u8500_of_clk.c 			bases[CLKRST1_INDEX], BIT(8), CLK_SET_RATE_GATE);
CLK_SET_RATE_GATE  471 drivers/clk/ux500/u8500_of_clk.c 			bases[CLKRST1_INDEX], BIT(9), CLK_SET_RATE_GATE);
CLK_SET_RATE_GATE  475 drivers/clk/ux500/u8500_of_clk.c 			bases[CLKRST1_INDEX], BIT(10), CLK_SET_RATE_GATE);
CLK_SET_RATE_GATE  480 drivers/clk/ux500/u8500_of_clk.c 			bases[CLKRST2_INDEX], BIT(0), CLK_SET_RATE_GATE);
CLK_SET_RATE_GATE  484 drivers/clk/ux500/u8500_of_clk.c 			bases[CLKRST2_INDEX], BIT(2), CLK_SET_RATE_GATE);
CLK_SET_RATE_GATE  488 drivers/clk/ux500/u8500_of_clk.c 			bases[CLKRST2_INDEX], BIT(3), CLK_SET_RATE_GATE);
CLK_SET_RATE_GATE  492 drivers/clk/ux500/u8500_of_clk.c 			bases[CLKRST2_INDEX], BIT(4), CLK_SET_RATE_GATE);
CLK_SET_RATE_GATE  496 drivers/clk/ux500/u8500_of_clk.c 			bases[CLKRST2_INDEX], BIT(5), CLK_SET_RATE_GATE);
CLK_SET_RATE_GATE  502 drivers/clk/ux500/u8500_of_clk.c 			CLK_SET_RATE_GATE|CLK_SET_RATE_PARENT);
CLK_SET_RATE_GATE  507 drivers/clk/ux500/u8500_of_clk.c 			CLK_SET_RATE_GATE|CLK_SET_RATE_PARENT);
CLK_SET_RATE_GATE  512 drivers/clk/ux500/u8500_of_clk.c 			bases[CLKRST3_INDEX], BIT(1), CLK_SET_RATE_GATE);
CLK_SET_RATE_GATE  516 drivers/clk/ux500/u8500_of_clk.c 			bases[CLKRST3_INDEX], BIT(2), CLK_SET_RATE_GATE);
CLK_SET_RATE_GATE  520 drivers/clk/ux500/u8500_of_clk.c 			bases[CLKRST3_INDEX], BIT(3), CLK_SET_RATE_GATE);
CLK_SET_RATE_GATE  524 drivers/clk/ux500/u8500_of_clk.c 			bases[CLKRST3_INDEX], BIT(4), CLK_SET_RATE_GATE);
CLK_SET_RATE_GATE  528 drivers/clk/ux500/u8500_of_clk.c 			bases[CLKRST3_INDEX], BIT(5), CLK_SET_RATE_GATE);
CLK_SET_RATE_GATE  532 drivers/clk/ux500/u8500_of_clk.c 			bases[CLKRST3_INDEX], BIT(6), CLK_SET_RATE_GATE);
CLK_SET_RATE_GATE  536 drivers/clk/ux500/u8500_of_clk.c 			bases[CLKRST3_INDEX], BIT(7), CLK_SET_RATE_GATE);
CLK_SET_RATE_GATE  541 drivers/clk/ux500/u8500_of_clk.c 			bases[CLKRST6_INDEX], BIT(0), CLK_SET_RATE_GATE);
CLK_SET_RATE_GATE  392 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 		.flags = CLK_SET_RATE_GATE,
CLK_SET_RATE_GATE  241 drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c 	.flags = CLK_SET_RATE_GATE,
CLK_SET_RATE_GATE  326 drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c 	.flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
CLK_SET_RATE_GATE  483 drivers/media/platform/atmel/atmel-isc-base.c 	init.flags		= CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE;
CLK_SET_RATE_GATE 2162 sound/soc/codecs/da7219.c 		init.flags = CLK_GET_RATE_NOCACHE | CLK_SET_RATE_GATE;
CLK_SET_RATE_GATE  330 sound/soc/intel/skylake/skl-ssp-clk.c 	init.flags = CLK_SET_RATE_GATE;