icache_line_size 327 arch/arm64/include/asm/assembler.h .macro icache_line_size, reg, tmp icache_line_size 422 arch/arm64/include/asm/assembler.h icache_line_size \tmp1, \tmp2 icache_line_size 23 arch/nios2/include/asm/cpuinfo.h u32 icache_line_size; icache_line_size 80 arch/nios2/kernel/cpuinfo.c cpuinfo.icache_line_size = fcpu(cpu, "icache-line-size"); icache_line_size 155 arch/nios2/kernel/cpuinfo.c cpuinfo.icache_line_size); icache_line_size 57 arch/nios2/mm/cacheflush.c start &= ~(cpuinfo.icache_line_size - 1); icache_line_size 58 arch/nios2/mm/cacheflush.c end += (cpuinfo.icache_line_size - 1); icache_line_size 59 arch/nios2/mm/cacheflush.c end &= ~(cpuinfo.icache_line_size - 1); icache_line_size 64 arch/nios2/mm/cacheflush.c for (addr = start; addr < end; addr += cpuinfo.icache_line_size) { icache_line_size 72 arch/powerpc/include/asm/vdso_datapage.h __u32 icache_line_size; /* L1 i-cache line size 0x6C */ icache_line_size 720 arch/powerpc/kernel/vdso.c vdso_data->icache_line_size = ppc64_caches.l1i.line_size; icache_line_size 25 arch/sparc/include/asm/cpudata_64.h unsigned int icache_line_size; icache_line_size 831 arch/sparc/kernel/mdesc.c c->icache_line_size = *line_size; icache_line_size 543 arch/sparc/kernel/prom_64.c cpu_data(cpuid).icache_line_size = icache_line_size 571 arch/sparc/kernel/prom_64.c cpu_data(cpuid).icache_line_size = icache_line_size 150 arch/sparc/kernel/ptrace_64.c unsigned long icache_line_size; icache_line_size 152 arch/sparc/kernel/ptrace_64.c icache_line_size = local_cpu_data().icache_line_size; icache_line_size 154 arch/sparc/kernel/ptrace_64.c for (; start < end; start += icache_line_size) icache_line_size 192 arch/sparc/kernel/sysfs.c SHOW_CPUDATA_UINT_NAME(l1_icache_line_size, icache_line_size); icache_line_size 989 arch/sparc/kernel/traps_64.c unsigned int icache_size, icache_line_size; icache_line_size 993 arch/sparc/kernel/traps_64.c icache_line_size = local_cpu_data().icache_line_size; icache_line_size 996 arch/sparc/kernel/traps_64.c for (addr = 0; addr < icache_size; addr += icache_line_size) {