CLK_RESET_SOURCE_CSITE 1154 drivers/clk/tegra/clk-tegra30.c 				readl(clk_base + CLK_RESET_SOURCE_CSITE);
CLK_RESET_SOURCE_CSITE 1155 drivers/clk/tegra/clk-tegra30.c 	writel(3 << 30, clk_base + CLK_RESET_SOURCE_CSITE);
CLK_RESET_SOURCE_CSITE 1204 drivers/clk/tegra/clk-tegra30.c 					clk_base + CLK_RESET_SOURCE_CSITE);