CLK_OPS_PARENT_ENABLE 1289 drivers/clk/clk-stm32mp1.c 	     COMPOSITE(_id, _name, _parents, CLK_OPS_PARENT_ENABLE |\
CLK_OPS_PARENT_ENABLE 1676 drivers/clk/clk-stm32mp1.c 	MUX(NO_ID, "ref1", ref12_parents, CLK_OPS_PARENT_ENABLE, RCC_RCK12SELR,
CLK_OPS_PARENT_ENABLE 1679 drivers/clk/clk-stm32mp1.c 	MUX(NO_ID, "ref3", ref3_parents, CLK_OPS_PARENT_ENABLE, RCC_RCK3SELR,
CLK_OPS_PARENT_ENABLE 1682 drivers/clk/clk-stm32mp1.c 	MUX(NO_ID, "ref4", ref4_parents, CLK_OPS_PARENT_ENABLE, RCC_RCK4SELR,
CLK_OPS_PARENT_ENABLE 1743 drivers/clk/clk-stm32mp1.c 	MUX(CK_PER, "ck_per", per_src, CLK_OPS_PARENT_ENABLE,
CLK_OPS_PARENT_ENABLE 1746 drivers/clk/clk-stm32mp1.c 	MUX(CK_MPU, "ck_mpu", cpu_src, CLK_OPS_PARENT_ENABLE |
CLK_OPS_PARENT_ENABLE 1750 drivers/clk/clk-stm32mp1.c 		   CLK_OPS_PARENT_ENABLE,
CLK_OPS_PARENT_ENABLE 1756 drivers/clk/clk-stm32mp1.c 		   CLK_OPS_PARENT_ENABLE,
CLK_OPS_PARENT_ENABLE 1961 drivers/clk/clk-stm32mp1.c 	COMPOSITE(ETHPTP_K, "ethptp_k", eth_src, CLK_OPS_PARENT_ENABLE |
CLK_OPS_PARENT_ENABLE 1970 drivers/clk/clk-stm32mp1.c 	COMPOSITE(RTC, "ck_rtc", rtc_src, CLK_OPS_PARENT_ENABLE |
CLK_OPS_PARENT_ENABLE 1977 drivers/clk/clk-stm32mp1.c 	COMPOSITE(CK_MCO1, "ck_mco1", mco1_src, CLK_OPS_PARENT_ENABLE |
CLK_OPS_PARENT_ENABLE 1983 drivers/clk/clk-stm32mp1.c 	COMPOSITE(CK_MCO2, "ck_mco2", mco2_src, CLK_OPS_PARENT_ENABLE |
CLK_OPS_PARENT_ENABLE 1993 drivers/clk/clk-stm32mp1.c 	COMPOSITE(CK_TRACE, "ck_trace", ck_trace_src, CLK_OPS_PARENT_ENABLE,
CLK_OPS_PARENT_ENABLE 1234 drivers/clk/clk.c 	if (core->flags & CLK_OPS_PARENT_ENABLE)
CLK_OPS_PARENT_ENABLE 1266 drivers/clk/clk.c 	if (core->flags & CLK_OPS_PARENT_ENABLE)
CLK_OPS_PARENT_ENABLE 1747 drivers/clk/clk.c 	if (core->flags & CLK_OPS_PARENT_ENABLE) {
CLK_OPS_PARENT_ENABLE 1780 drivers/clk/clk.c 	if (core->flags & CLK_OPS_PARENT_ENABLE) {
CLK_OPS_PARENT_ENABLE 2059 drivers/clk/clk.c 	if (core->flags & CLK_OPS_PARENT_ENABLE)
CLK_OPS_PARENT_ENABLE 2080 drivers/clk/clk.c 	if (core->flags & CLK_OPS_PARENT_ENABLE)
CLK_OPS_PARENT_ENABLE 3019 drivers/clk/clk.c 	ENTRY(CLK_OPS_PARENT_ENABLE),
CLK_OPS_PARENT_ENABLE  720 drivers/clk/imx/clk-imx7d.c 	hws[IMX7D_IPG_ROOT_CLK] = imx_clk_hw_divider_flags("ipg_root_clk", "ahb_root_clk", base + 0x9080, 0, 2, CLK_IS_CRITICAL | CLK_OPS_PARENT_ENABLE | CLK_SET_RATE_PARENT);
CLK_OPS_PARENT_ENABLE  784 drivers/clk/imx/clk-imx7d.c 	hws[IMX7D_ARM_A7_ROOT_CLK] = imx_clk_hw_gate2_flags("arm_a7_root_clk", "arm_a7_div", base + 0x4000, 0, CLK_OPS_PARENT_ENABLE);
CLK_OPS_PARENT_ENABLE  786 drivers/clk/imx/clk-imx7d.c 	hws[IMX7D_MAIN_AXI_ROOT_CLK] = imx_clk_hw_gate2_flags("main_axi_root_clk", "axi_post_div", base + 0x4040, 0, CLK_IS_CRITICAL | CLK_OPS_PARENT_ENABLE);
CLK_OPS_PARENT_ENABLE  791 drivers/clk/imx/clk-imx7d.c 	hws[IMX7D_DRAM_ROOT_CLK] = imx_clk_hw_gate2_flags("dram_root_clk", "dram_post_div", base + 0x4130, 0, CLK_IS_CRITICAL | CLK_OPS_PARENT_ENABLE);
CLK_OPS_PARENT_ENABLE  792 drivers/clk/imx/clk-imx7d.c 	hws[IMX7D_DRAM_PHYM_ROOT_CLK] = imx_clk_hw_gate2_flags("dram_phym_root_clk", "dram_phym_cg", base + 0x4130, 0, CLK_IS_CRITICAL | CLK_OPS_PARENT_ENABLE);
CLK_OPS_PARENT_ENABLE  793 drivers/clk/imx/clk-imx7d.c 	hws[IMX7D_DRAM_PHYM_ALT_ROOT_CLK] = imx_clk_hw_gate2_flags("dram_phym_alt_root_clk", "dram_phym_alt_post_div", base + 0x4130, 0, CLK_IS_CRITICAL | CLK_OPS_PARENT_ENABLE);
CLK_OPS_PARENT_ENABLE  794 drivers/clk/imx/clk-imx7d.c 	hws[IMX7D_DRAM_ALT_ROOT_CLK] = imx_clk_hw_gate2_flags("dram_alt_root_clk", "dram_alt_post_div", base + 0x4130, 0, CLK_IS_CRITICAL | CLK_OPS_PARENT_ENABLE);
CLK_OPS_PARENT_ENABLE  122 drivers/clk/imx/clk-imx7ulp.c 	clks[IMX7ULP_CLK_DDR_SEL]	= imx_clk_hw_mux_flags("ddr_sel", base + 0x30, 24, 2, ddr_sels, ARRAY_SIZE(ddr_sels), CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE);
CLK_OPS_PARENT_ENABLE  536 drivers/clk/imx/clk-imx8mq.c 	clks[IMX8MQ_CLK_VPU_G1_ROOT] = imx_clk_gate2_flags("vpu_g1_root_clk", "vpu_g1", base + 0x4560, 0, CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE);
CLK_OPS_PARENT_ENABLE  538 drivers/clk/imx/clk-imx8mq.c 	clks[IMX8MQ_CLK_VPU_G2_ROOT] = imx_clk_gate2_flags("vpu_g2_root_clk", "vpu_g2", base + 0x45a0, 0, CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE);
CLK_OPS_PARENT_ENABLE  544 drivers/clk/imx/clk-imx8mq.c 	clks[IMX8MQ_CLK_VPU_DEC_ROOT] = imx_clk_gate2_flags("vpu_dec_root_clk", "vpu_bus", base + 0x4630, 0, CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE);
CLK_OPS_PARENT_ENABLE  268 drivers/clk/imx/clk.h 			CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
CLK_OPS_PARENT_ENABLE  277 drivers/clk/imx/clk.h 			flags | CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
CLK_OPS_PARENT_ENABLE  343 drivers/clk/imx/clk.h 				  CLK_OPS_PARENT_ENABLE, reg, shift, 0x3, 0,
CLK_OPS_PARENT_ENABLE  358 drivers/clk/imx/clk.h 			CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
CLK_OPS_PARENT_ENABLE  367 drivers/clk/imx/clk.h 			flags | CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
CLK_OPS_PARENT_ENABLE  375 drivers/clk/imx/clk.h 			CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
CLK_OPS_PARENT_ENABLE  384 drivers/clk/imx/clk.h 			flags | CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
CLK_OPS_PARENT_ENABLE  402 drivers/clk/imx/clk.h 			CLK_SET_RATE_NO_REPARENT | CLK_OPS_PARENT_ENABLE,
CLK_OPS_PARENT_ENABLE  413 drivers/clk/imx/clk.h 				   CLK_OPS_PARENT_ENABLE,
CLK_OPS_PARENT_ENABLE  433 drivers/clk/imx/clk.h 			flags | CLK_SET_RATE_NO_REPARENT | CLK_OPS_PARENT_ENABLE,
CLK_OPS_PARENT_ENABLE  461 drivers/clk/imx/clk.h 		flags | CLK_SET_RATE_NO_REPARENT | CLK_OPS_PARENT_ENABLE)