hw_mode 63 drivers/crypto/ccree/cc_hash.c int hw_mode; hw_mode 89 drivers/crypto/ccree/cc_hash.c int hw_mode; hw_mode 136 drivers/crypto/ccree/cc_hash.c if (ctx->hw_mode != DRV_CIPHER_XCBC_MAC && hw_mode 137 drivers/crypto/ccree/cc_hash.c ctx->hw_mode != DRV_CIPHER_CMAC) { hw_mode 188 drivers/crypto/ccree/cc_hash.c if (ctx->hw_mode != DRV_CIPHER_XCBC_MAC) { hw_mode 344 drivers/crypto/ccree/cc_hash.c set_hash_cipher_mode(&desc[idx], ctx->hw_mode, ctx->hash_mode); hw_mode 368 drivers/crypto/ccree/cc_hash.c set_cipher_mode(&desc[idx], ctx->hw_mode); hw_mode 378 drivers/crypto/ccree/cc_hash.c set_cipher_mode(&desc[idx], ctx->hw_mode); hw_mode 387 drivers/crypto/ccree/cc_hash.c set_cipher_mode(&desc[idx], ctx->hw_mode); hw_mode 463 drivers/crypto/ccree/cc_hash.c set_hash_cipher_mode(&desc[idx], ctx->hw_mode, ctx->hash_mode); hw_mode 477 drivers/crypto/ccree/cc_hash.c set_hash_cipher_mode(&desc[idx], ctx->hw_mode, ctx->hash_mode); hw_mode 499 drivers/crypto/ccree/cc_hash.c set_cipher_mode(&desc[idx], ctx->hw_mode); hw_mode 527 drivers/crypto/ccree/cc_hash.c set_hash_cipher_mode(&desc[idx], ctx->hw_mode, ctx->hash_mode); hw_mode 536 drivers/crypto/ccree/cc_hash.c set_hash_cipher_mode(&desc[idx], ctx->hw_mode, ctx->hash_mode); hw_mode 599 drivers/crypto/ccree/cc_hash.c set_hash_cipher_mode(&desc[idx], ctx->hw_mode, ctx->hash_mode); hw_mode 608 drivers/crypto/ccree/cc_hash.c set_hash_cipher_mode(&desc[idx], ctx->hw_mode, ctx->hash_mode); hw_mode 672 drivers/crypto/ccree/cc_hash.c set_hash_cipher_mode(&desc[idx], ctx->hw_mode, ctx->hash_mode); hw_mode 769 drivers/crypto/ccree/cc_hash.c set_cipher_mode(&desc[idx], ctx->hw_mode); hw_mode 778 drivers/crypto/ccree/cc_hash.c set_cipher_mode(&desc[idx], ctx->hw_mode); hw_mode 794 drivers/crypto/ccree/cc_hash.c set_cipher_mode(&desc[idx], ctx->hw_mode); hw_mode 852 drivers/crypto/ccree/cc_hash.c set_cipher_mode(&desc[idx], ctx->hw_mode); hw_mode 860 drivers/crypto/ccree/cc_hash.c set_cipher_mode(&desc[idx], ctx->hw_mode); hw_mode 869 drivers/crypto/ccree/cc_hash.c set_cipher_mode(&desc[idx], ctx->hw_mode); hw_mode 878 drivers/crypto/ccree/cc_hash.c set_cipher_mode(&desc[idx], ctx->hw_mode); hw_mode 887 drivers/crypto/ccree/cc_hash.c set_cipher_mode(&desc[idx], ctx->hw_mode); hw_mode 1133 drivers/crypto/ccree/cc_hash.c ctx->hw_mode = cc_alg->hw_mode; hw_mode 1187 drivers/crypto/ccree/cc_hash.c if (ctx->hw_mode == DRV_CIPHER_XCBC_MAC) hw_mode 1196 drivers/crypto/ccree/cc_hash.c set_cipher_mode(&desc[idx], ctx->hw_mode); hw_mode 1232 drivers/crypto/ccree/cc_hash.c if (ctx->hw_mode == DRV_CIPHER_XCBC_MAC) { hw_mode 1297 drivers/crypto/ccree/cc_hash.c if (ctx->hw_mode == DRV_CIPHER_XCBC_MAC) hw_mode 1304 drivers/crypto/ccree/cc_hash.c set_cipher_mode(&desc[idx], ctx->hw_mode); hw_mode 1326 drivers/crypto/ccree/cc_hash.c set_cipher_mode(&desc[idx], ctx->hw_mode); hw_mode 1381 drivers/crypto/ccree/cc_hash.c if (ctx->hw_mode == DRV_CIPHER_XCBC_MAC) { hw_mode 1391 drivers/crypto/ccree/cc_hash.c set_cipher_mode(&desc[idx], ctx->hw_mode); hw_mode 1408 drivers/crypto/ccree/cc_hash.c set_cipher_mode(&desc[idx], ctx->hw_mode); hw_mode 1460 drivers/crypto/ccree/cc_hash.c if (ctx->hw_mode == DRV_CIPHER_XCBC_MAC) { hw_mode 1470 drivers/crypto/ccree/cc_hash.c set_cipher_mode(&desc[idx], ctx->hw_mode); hw_mode 1487 drivers/crypto/ccree/cc_hash.c set_cipher_mode(&desc[idx], ctx->hw_mode); hw_mode 1569 drivers/crypto/ccree/cc_hash.c int hw_mode; hw_mode 1605 drivers/crypto/ccree/cc_hash.c .hw_mode = DRV_HASH_HW_SHA1, hw_mode 1632 drivers/crypto/ccree/cc_hash.c .hw_mode = DRV_HASH_HW_SHA256, hw_mode 1659 drivers/crypto/ccree/cc_hash.c .hw_mode = DRV_HASH_HW_SHA256, hw_mode 1686 drivers/crypto/ccree/cc_hash.c .hw_mode = DRV_HASH_HW_SHA512, hw_mode 1713 drivers/crypto/ccree/cc_hash.c .hw_mode = DRV_HASH_HW_SHA512, hw_mode 1740 drivers/crypto/ccree/cc_hash.c .hw_mode = DRV_HASH_HW_MD5, hw_mode 1765 drivers/crypto/ccree/cc_hash.c .hw_mode = DRV_HASH_HW_SM3, hw_mode 1790 drivers/crypto/ccree/cc_hash.c .hw_mode = DRV_CIPHER_XCBC_MAC, hw_mode 1815 drivers/crypto/ccree/cc_hash.c .hw_mode = DRV_CIPHER_CMAC, hw_mode 1860 drivers/crypto/ccree/cc_hash.c t_crypto_alg->hw_mode = template->hw_mode; hw_mode 2043 drivers/crypto/ccree/cc_hash.c int hw_mode = driver_hash[alg].hw_mode; hw_mode 2072 drivers/crypto/ccree/cc_hash.c if (hw_mode == DRV_CIPHER_XCBC_MAC || hw_mode 2073 drivers/crypto/ccree/cc_hash.c hw_mode == DRV_CIPHER_CMAC) hw_mode 538 drivers/crypto/stm32/stm32-cryp.c u32 cfg, hw_mode; hw_mode 566 drivers/crypto/stm32/stm32-cryp.c hw_mode = stm32_cryp_get_hw_mode(cryp); hw_mode 567 drivers/crypto/stm32/stm32-cryp.c if (hw_mode == CR_AES_UNKNOWN) hw_mode 572 drivers/crypto/stm32/stm32-cryp.c ((hw_mode == CR_AES_ECB) || (hw_mode == CR_AES_CBC))) { hw_mode 583 drivers/crypto/stm32/stm32-cryp.c cfg |= hw_mode; hw_mode 591 drivers/crypto/stm32/stm32-cryp.c switch (hw_mode) { hw_mode 595 drivers/crypto/stm32/stm32-cryp.c if (hw_mode == CR_AES_CCM) hw_mode 150 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c if (crtc->enabled && amdgpu_crtc->enabled && amdgpu_crtc->hw_mode.clock) { hw_mode 152 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c amdgpu_crtc->hw_mode.crtc_htotal * hw_mode 153 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c (amdgpu_crtc->hw_mode.crtc_vblank_end - hw_mode 154 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c amdgpu_crtc->hw_mode.crtc_vdisplay + hw_mode 157 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c vblank_time_us = vblank_in_pixels * 1000 / amdgpu_crtc->hw_mode.clock; hw_mode 176 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c if (crtc->enabled && amdgpu_crtc->enabled && amdgpu_crtc->hw_mode.clock) { hw_mode 177 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c vrefresh = drm_mode_vrefresh(&amdgpu_crtc->hw_mode); hw_mode 423 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h struct drm_display_mode hw_mode; hw_mode 2608 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c amdgpu_crtc->hw_mode = *adjusted_mode; hw_mode 2716 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c amdgpu_crtc->hw_mode = *adjusted_mode; hw_mode 2495 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c amdgpu_crtc->hw_mode = *adjusted_mode; hw_mode 2516 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c amdgpu_crtc->hw_mode = *adjusted_mode; hw_mode 186 drivers/gpu/drm/amd/amdgpu/dce_virtual.c amdgpu_crtc->hw_mode = *adjusted_mode; hw_mode 6244 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c acrtc->hw_mode = new_crtc_state->mode; hw_mode 2092 drivers/gpu/drm/radeon/atombios_crtc.c radeon_crtc->hw_mode = *adjusted_mode; hw_mode 167 drivers/gpu/drm/radeon/r600_dpm.c if (crtc->enabled && radeon_crtc->enabled && radeon_crtc->hw_mode.clock) { hw_mode 169 drivers/gpu/drm/radeon/r600_dpm.c radeon_crtc->hw_mode.crtc_htotal * hw_mode 170 drivers/gpu/drm/radeon/r600_dpm.c (radeon_crtc->hw_mode.crtc_vblank_end - hw_mode 171 drivers/gpu/drm/radeon/r600_dpm.c radeon_crtc->hw_mode.crtc_vdisplay + hw_mode 174 drivers/gpu/drm/radeon/r600_dpm.c vblank_time_us = vblank_in_pixels * 1000 / radeon_crtc->hw_mode.clock; hw_mode 193 drivers/gpu/drm/radeon/r600_dpm.c if (crtc->enabled && radeon_crtc->enabled && radeon_crtc->hw_mode.clock) { hw_mode 194 drivers/gpu/drm/radeon/r600_dpm.c vrefresh = drm_mode_vrefresh(&radeon_crtc->hw_mode); hw_mode 372 drivers/gpu/drm/radeon/radeon_mode.h struct drm_display_mode hw_mode; hw_mode 5194 drivers/gpu/drm/radeon/si.c bool hw_mode = true; hw_mode 5196 drivers/gpu/drm/radeon/si.c if (hw_mode) { hw_mode 365 drivers/net/ethernet/qlogic/qed/qed.h u32 hw_mode; hw_mode 2114 drivers/net/ethernet/qlogic/qed/qed_dev.c p_hwfn->hw_info.hw_mode); hw_mode 2467 drivers/net/ethernet/qlogic/qed/qed_dev.c int hw_mode = 0; hw_mode 2470 drivers/net/ethernet/qlogic/qed/qed_dev.c hw_mode |= 1 << MODE_BB; hw_mode 2472 drivers/net/ethernet/qlogic/qed/qed_dev.c hw_mode |= 1 << MODE_K2; hw_mode 2481 drivers/net/ethernet/qlogic/qed/qed_dev.c hw_mode |= 1 << MODE_PORTS_PER_ENG_1; hw_mode 2484 drivers/net/ethernet/qlogic/qed/qed_dev.c hw_mode |= 1 << MODE_PORTS_PER_ENG_2; hw_mode 2487 drivers/net/ethernet/qlogic/qed/qed_dev.c hw_mode |= 1 << MODE_PORTS_PER_ENG_4; hw_mode 2496 drivers/net/ethernet/qlogic/qed/qed_dev.c hw_mode |= 1 << MODE_MF_SD; hw_mode 2498 drivers/net/ethernet/qlogic/qed/qed_dev.c hw_mode |= 1 << MODE_MF_SI; hw_mode 2500 drivers/net/ethernet/qlogic/qed/qed_dev.c hw_mode |= 1 << MODE_ASIC; hw_mode 2503 drivers/net/ethernet/qlogic/qed/qed_dev.c hw_mode |= 1 << MODE_100G; hw_mode 2505 drivers/net/ethernet/qlogic/qed/qed_dev.c p_hwfn->hw_info.hw_mode = hw_mode; hw_mode 2509 drivers/net/ethernet/qlogic/qed/qed_dev.c p_hwfn->hw_info.hw_mode); hw_mode 2599 drivers/net/ethernet/qlogic/qed/qed_dev.c struct qed_ptt *p_ptt, int hw_mode) hw_mode 2636 drivers/net/ethernet/qlogic/qed/qed_dev.c rc = qed_init_run(p_hwfn, p_ptt, PHASE_ENGINE, ANY_PHASE_ID, hw_mode); hw_mode 2808 drivers/net/ethernet/qlogic/qed/qed_dev.c struct qed_ptt *p_ptt, int hw_mode) hw_mode 2816 drivers/net/ethernet/qlogic/qed/qed_dev.c rc = qed_init_run(p_hwfn, p_ptt, PHASE_PORT, p_hwfn->port_id, hw_mode); hw_mode 2828 drivers/net/ethernet/qlogic/qed/qed_dev.c int hw_mode, hw_mode 2852 drivers/net/ethernet/qlogic/qed/qed_dev.c if (hw_mode & BIT(MODE_MF_SD)) { hw_mode 2865 drivers/net/ethernet/qlogic/qed/qed_dev.c if (hw_mode & BIT(MODE_MF_SI)) { hw_mode 2885 drivers/net/ethernet/qlogic/qed/qed_dev.c rc = qed_init_run(p_hwfn, p_ptt, PHASE_PF, rel_pf_id, hw_mode); hw_mode 2890 drivers/net/ethernet/qlogic/qed/qed_dev.c rc = qed_init_run(p_hwfn, p_ptt, PHASE_QM_PF, rel_pf_id, hw_mode); hw_mode 3108 drivers/net/ethernet/qlogic/qed/qed_dev.c p_hwfn->hw_info.hw_mode); hw_mode 3114 drivers/net/ethernet/qlogic/qed/qed_dev.c p_hwfn->hw_info.hw_mode); hw_mode 3122 drivers/net/ethernet/qlogic/qed/qed_dev.c p_hwfn->hw_info.hw_mode, hw_mode 1698 drivers/net/ethernet/qlogic/qed/qed_mcp.c p_hwfn->mcp_info->func_info.ovlan, p_hwfn->hw_info.hw_mode); hw_mode 837 drivers/net/ethernet/qlogic/qed/qed_sriov.c p_hwfn->hw_info.hw_mode); hw_mode 72 drivers/net/ethernet/ti/davinci_cpdma.c u32 hw_mode; hw_mode 1007 drivers/net/ethernet/ti/davinci_cpdma.c mode = desc_read(prev, hw_mode); hw_mode 1010 drivers/net/ethernet/ti/davinci_cpdma.c desc_write(prev, hw_mode, mode & ~CPDMA_DESC_EOQ); hw_mode 1063 drivers/net/ethernet/ti/davinci_cpdma.c writel_relaxed(mode | len, &desc->hw_mode); hw_mode 1239 drivers/net/ethernet/ti/davinci_cpdma.c status = desc_read(desc, hw_mode); hw_mode 113 drivers/spi/spi-fsl-espi.c u32 hw_mode; hw_mode 330 drivers/spi/spi-fsl-espi.c u32 hw_mode_old = cs->hw_mode; hw_mode 333 drivers/spi/spi-fsl-espi.c cs->hw_mode &= ~(CSMODE_LEN(0xF) | CSMODE_DIV16 | CSMODE_PM(0xF)); hw_mode 335 drivers/spi/spi-fsl-espi.c cs->hw_mode |= CSMODE_LEN(bits_per_word - 1); hw_mode 340 drivers/spi/spi-fsl-espi.c cs->hw_mode |= CSMODE_DIV16; hw_mode 344 drivers/spi/spi-fsl-espi.c cs->hw_mode |= CSMODE_PM(pm); hw_mode 347 drivers/spi/spi-fsl-espi.c if (cs->hw_mode != hw_mode_old) hw_mode 349 drivers/spi/spi-fsl-espi.c cs->hw_mode); hw_mode 493 drivers/spi/spi-fsl-espi.c cs->hw_mode = fsl_espi_read_reg(espi, ESPI_SPMODEx(spi->chip_select)); hw_mode 495 drivers/spi/spi-fsl-espi.c cs->hw_mode &= ~(CSMODE_CP_BEGIN_EDGECLK | CSMODE_CI_INACTIVEHIGH hw_mode 499 drivers/spi/spi-fsl-espi.c cs->hw_mode |= CSMODE_CP_BEGIN_EDGECLK; hw_mode 501 drivers/spi/spi-fsl-espi.c cs->hw_mode |= CSMODE_CI_INACTIVEHIGH; hw_mode 503 drivers/spi/spi-fsl-espi.c cs->hw_mode |= CSMODE_REV; hw_mode 79 drivers/spi/spi-fsl-lib.h u32 hw_mode; /* Holds HW mode register settings */ hw_mode 97 drivers/spi/spi-fsl-spi.c if (cs->hw_mode == mpc8xxx_spi_read_reg(mode)) hw_mode 104 drivers/spi/spi-fsl-spi.c mpc8xxx_spi_write_reg(mode, cs->hw_mode & ~SPMODE_ENABLE); hw_mode 110 drivers/spi/spi-fsl-spi.c mpc8xxx_spi_write_reg(mode, cs->hw_mode); hw_mode 265 drivers/spi/spi-fsl-spi.c cs->hw_mode &= ~(SPMODE_LEN(0xF) | SPMODE_DIV16 hw_mode 268 drivers/spi/spi-fsl-spi.c cs->hw_mode |= SPMODE_LEN(bits_per_word); hw_mode 271 drivers/spi/spi-fsl-spi.c cs->hw_mode |= SPMODE_DIV16; hw_mode 284 drivers/spi/spi-fsl-spi.c cs->hw_mode |= SPMODE_PM(pm); hw_mode 446 drivers/spi/spi-fsl-spi.c u32 hw_mode; hw_mode 462 drivers/spi/spi-fsl-spi.c hw_mode = cs->hw_mode; /* Save original settings */ hw_mode 463 drivers/spi/spi-fsl-spi.c cs->hw_mode = mpc8xxx_spi_read_reg(®_base->mode); hw_mode 465 drivers/spi/spi-fsl-spi.c cs->hw_mode &= ~(SPMODE_CP_BEGIN_EDGECLK | SPMODE_CI_INACTIVEHIGH hw_mode 469 drivers/spi/spi-fsl-spi.c cs->hw_mode |= SPMODE_CP_BEGIN_EDGECLK; hw_mode 471 drivers/spi/spi-fsl-spi.c cs->hw_mode |= SPMODE_CI_INACTIVEHIGH; hw_mode 473 drivers/spi/spi-fsl-spi.c cs->hw_mode |= SPMODE_REV; hw_mode 475 drivers/spi/spi-fsl-spi.c cs->hw_mode |= SPMODE_LOOP; hw_mode 479 drivers/spi/spi-fsl-spi.c cs->hw_mode = hw_mode; /* Restore settings */ hw_mode 158 drivers/spi/spi-sprd.c u32 hw_mode; hw_mode 419 drivers/spi/spi-sprd.c if (ss->hw_mode & SPI_3WIRE || ss->hw_mode & SPI_TX_DUAL) hw_mode 430 drivers/spi/spi-sprd.c if (ss->hw_mode & SPI_3WIRE || ss->hw_mode & SPI_TX_DUAL) hw_mode 603 drivers/spi/spi-sprd.c if (ss->hw_mode & SPI_3WIRE || ss->hw_mode & SPI_TX_DUAL) hw_mode 612 drivers/spi/spi-sprd.c if (ss->hw_mode & SPI_3WIRE || ss->hw_mode & SPI_TX_DUAL) hw_mode 680 drivers/spi/spi-sprd.c val |= ss->hw_mode & SPI_CPHA ? SPRD_SPI_NG_RX : SPRD_SPI_NG_TX; hw_mode 681 drivers/spi/spi-sprd.c val |= ss->hw_mode & SPI_CPOL ? SPRD_SPI_SCK_REV : 0; hw_mode 703 drivers/spi/spi-sprd.c if (ss->hw_mode & SPI_3WIRE) hw_mode 708 drivers/spi/spi-sprd.c if (ss->hw_mode & SPI_TX_DUAL) hw_mode 727 drivers/spi/spi-sprd.c ss->hw_mode = sdev->mode; hw_mode 51 drivers/usb/dwc3/core.c unsigned int hw_mode; hw_mode 57 drivers/usb/dwc3/core.c hw_mode = DWC3_GHWPARAMS0_MODE(dwc->hwparams.hwparams0); hw_mode 59 drivers/usb/dwc3/core.c switch (hw_mode) { hw_mode 1688 drivers/usb/host/imx21-hcd.c u32 hw_mode = USBOTG_HWMODE_CRECFG_HOST; hw_mode 1691 drivers/usb/host/imx21-hcd.c hw_mode |= ((imx21->pdata->host_xcvr << USBOTG_HWMODE_HOSTXCVR_SHIFT) & hw_mode 1693 drivers/usb/host/imx21-hcd.c hw_mode |= ((imx21->pdata->otg_xcvr << USBOTG_HWMODE_OTGXCVR_SHIFT) & hw_mode 1710 drivers/usb/host/imx21-hcd.c writel(hw_mode, imx21->regs + USBOTG_HWMODE);