hpd_regs           72 drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c 	(enc110->hpd_regs->reg)
hpd_regs          680 drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c 	const struct dce110_link_enc_hpd_registers *hpd_regs)
hpd_regs          730 drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c 	enc110->hpd_regs = hpd_regs;
hpd_regs          160 drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.h 	const struct dce110_link_enc_hpd_registers *hpd_regs;
hpd_regs          170 drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.h 	const struct dce110_link_enc_hpd_registers *hpd_regs);
hpd_regs          205 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c 		hpd_regs(0),
hpd_regs          206 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c 		hpd_regs(1),
hpd_regs          207 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c 		hpd_regs(2),
hpd_regs          208 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c 		hpd_regs(3),
hpd_regs          209 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c 		hpd_regs(4),
hpd_regs          210 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c 		hpd_regs(5)
hpd_regs          234 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c 		hpd_regs(0),
hpd_regs          235 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c 		hpd_regs(1),
hpd_regs          236 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c 		hpd_regs(2),
hpd_regs          237 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c 		hpd_regs(3),
hpd_regs          238 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c 		hpd_regs(4),
hpd_regs          239 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c 		hpd_regs(5)
hpd_regs          239 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 		hpd_regs(0),
hpd_regs          240 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 		hpd_regs(1),
hpd_regs          241 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 		hpd_regs(2),
hpd_regs          242 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 		hpd_regs(3),
hpd_regs          243 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 		hpd_regs(4),
hpd_regs          244 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 		hpd_regs(5)
hpd_regs          248 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c 		hpd_regs(0),
hpd_regs          249 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c 		hpd_regs(1),
hpd_regs          250 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c 		hpd_regs(2),
hpd_regs          251 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c 		hpd_regs(3),
hpd_regs          252 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c 		hpd_regs(4),
hpd_regs          253 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c 		hpd_regs(5)
hpd_regs          222 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c 		hpd_regs(0),
hpd_regs          223 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c 		hpd_regs(1),
hpd_regs          224 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c 		hpd_regs(2),
hpd_regs          225 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c 		hpd_regs(3),
hpd_regs          226 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c 		hpd_regs(4),
hpd_regs          227 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c 		hpd_regs(5)
hpd_regs          670 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c 	const struct dcn10_link_enc_hpd_registers *hpd_regs,
hpd_regs          722 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c 	enc10->hpd_regs = hpd_regs;
hpd_regs         1338 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c 	(enc10->hpd_regs->reg)
hpd_regs          398 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.h 	const struct dcn10_link_enc_hpd_registers *hpd_regs;
hpd_regs          410 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.h 	const struct dcn10_link_enc_hpd_registers *hpd_regs,
hpd_regs          295 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c 		hpd_regs(0),
hpd_regs          296 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c 		hpd_regs(1),
hpd_regs          297 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c 		hpd_regs(2),
hpd_regs          298 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c 		hpd_regs(3)
hpd_regs          354 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c 	const struct dcn10_link_enc_hpd_registers *hpd_regs,
hpd_regs          407 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c 	enc10->hpd_regs = hpd_regs;
hpd_regs          169 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.h 	const struct dcn10_link_enc_hpd_registers *hpd_regs,
hpd_regs          587 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		hpd_regs(0),
hpd_regs          588 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		hpd_regs(1),
hpd_regs          589 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		hpd_regs(2),
hpd_regs          590 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		hpd_regs(3),
hpd_regs          591 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		hpd_regs(4),
hpd_regs          592 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		hpd_regs(5)
hpd_regs           63 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c static const struct hpd_registers hpd_regs[] = {
hpd_regs           64 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c 	hpd_regs(0),
hpd_regs           65 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c 	hpd_regs(1),
hpd_regs           66 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c 	hpd_regs(2),
hpd_regs           67 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c 	hpd_regs(3),
hpd_regs           68 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c 	hpd_regs(4),
hpd_regs           69 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c 	hpd_regs(5)
hpd_regs          145 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c 	hpd->regs = &hpd_regs[en];
hpd_regs          148 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c 	hpd->base.regs = &hpd_regs[en].gpio;
hpd_regs           76 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c static const struct hpd_registers hpd_regs[] = {
hpd_regs           77 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c 	hpd_regs(0),
hpd_regs           78 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c 	hpd_regs(1),
hpd_regs           79 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c 	hpd_regs(2),
hpd_regs           80 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c 	hpd_regs(3),
hpd_regs           81 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c 	hpd_regs(4),
hpd_regs           82 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c 	hpd_regs(5)
hpd_regs          158 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c 	hpd->regs = &hpd_regs[en];
hpd_regs          161 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c 	hpd->base.regs = &hpd_regs[en].gpio;
hpd_regs           63 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c static const struct hpd_registers hpd_regs[] = {
hpd_regs           64 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c 	hpd_regs(1),
hpd_regs           65 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c 	hpd_regs(2),
hpd_regs           66 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c 	hpd_regs(3),
hpd_regs           67 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c 	hpd_regs(4),
hpd_regs           68 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c 	hpd_regs(5),
hpd_regs           69 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c 	hpd_regs(6)
hpd_regs          145 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c 	hpd->regs = &hpd_regs[en];
hpd_regs          148 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c 	hpd->base.regs = &hpd_regs[en].gpio;
hpd_regs           72 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c static const struct hpd_registers hpd_regs[] = {
hpd_regs           73 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c 	hpd_regs(0),
hpd_regs           74 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c 	hpd_regs(1),
hpd_regs           75 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c 	hpd_regs(2),
hpd_regs           76 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c 	hpd_regs(3),
hpd_regs           77 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c 	hpd_regs(4),
hpd_regs           78 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c 	hpd_regs(5)
hpd_regs          190 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c 	hpd->regs = &hpd_regs[en];
hpd_regs          193 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c 	hpd->base.regs = &hpd_regs[en].gpio;
hpd_regs           83 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c static const struct hpd_registers hpd_regs[] = {
hpd_regs           84 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c 	hpd_regs(0),
hpd_regs           85 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c 	hpd_regs(1),
hpd_regs           86 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c 	hpd_regs(2),
hpd_regs           87 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c 	hpd_regs(3),
hpd_regs           88 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c 	hpd_regs(4),
hpd_regs           89 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c 	hpd_regs(5),
hpd_regs          197 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c 	hpd->regs = &hpd_regs[en];
hpd_regs          200 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c 	hpd->base.regs = &hpd_regs[en].gpio;
hpd_regs           81 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c static const struct hpd_registers hpd_regs[] = {
hpd_regs           82 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c 	hpd_regs(0),
hpd_regs           83 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c 	hpd_regs(1),
hpd_regs           84 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c 	hpd_regs(2),
hpd_regs           85 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c 	hpd_regs(3),
hpd_regs           86 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c 	hpd_regs(4),
hpd_regs          199 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c 	hpd->regs = &hpd_regs[en];
hpd_regs          202 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c 	hpd->base.regs = &hpd_regs[en].gpio;
hpd_regs          149 drivers/gpu/drm/msm/hdmi/hdmi.c 	hdmi->hpd_regs = devm_kcalloc(&pdev->dev,
hpd_regs          151 drivers/gpu/drm/msm/hdmi/hdmi.c 				      sizeof(hdmi->hpd_regs[0]),
hpd_regs          153 drivers/gpu/drm/msm/hdmi/hdmi.c 	if (!hdmi->hpd_regs) {
hpd_regs          169 drivers/gpu/drm/msm/hdmi/hdmi.c 		hdmi->hpd_regs[i] = reg;
hpd_regs           57 drivers/gpu/drm/msm/hdmi/hdmi.h 	struct regulator **hpd_regs;
hpd_regs          153 drivers/gpu/drm/msm/hdmi/hdmi_connector.c 		ret = regulator_enable(hdmi->hpd_regs[i]);
hpd_regs          229 drivers/gpu/drm/msm/hdmi/hdmi_connector.c 		ret = regulator_disable(hdmi->hpd_regs[i]);