hisi_uncore_pmu_counter_valid   70 drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c 	if (!hisi_uncore_pmu_counter_valid(ddrc_pmu, idx)) {
hisi_uncore_pmu_counter_valid   83 drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c 	if (!hisi_uncore_pmu_counter_valid(ddrc_pmu, idx)) {
hisi_uncore_pmu_counter_valid   55 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	if (!hisi_uncore_pmu_counter_valid(hha_pmu, idx)) {
hisi_uncore_pmu_counter_valid   69 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	if (!hisi_uncore_pmu_counter_valid(hha_pmu, idx)) {
hisi_uncore_pmu_counter_valid   54 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c 	if (!hisi_uncore_pmu_counter_valid(l3c_pmu, idx)) {
hisi_uncore_pmu_counter_valid   68 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c 	if (!hisi_uncore_pmu_counter_valid(l3c_pmu, idx)) {
hisi_uncore_pmu_counter_valid  118 drivers/perf/hisilicon/hisi_uncore_pmu.c 	if (!hisi_uncore_pmu_counter_valid(hisi_pmu, idx)) {
hisi_uncore_pmu_counter_valid   79 drivers/perf/hisilicon/hisi_uncore_pmu.h int hisi_uncore_pmu_counter_valid(struct hisi_pmu *hisi_pmu, int idx);