hifn_write_1      673 drivers/crypto/hifn_795x.c 	hifn_write_1(dev, HIFN_1_DMA_CSR,
hifn_write_1      677 drivers/crypto/hifn_795x.c 	hifn_write_1(dev, HIFN_1_DMA_IER, 0);
hifn_write_1      687 drivers/crypto/hifn_795x.c 	hifn_write_1(dev, HIFN_1_DMA_CNFG, HIFN_DMACNFG_MSTRESET |
hifn_write_1      695 drivers/crypto/hifn_795x.c 		hifn_write_1(dev, HIFN_1_DMA_CNFG, HIFN_DMACNFG_MODE);
hifn_write_1      698 drivers/crypto/hifn_795x.c 		hifn_write_1(dev, HIFN_1_DMA_CNFG, HIFN_DMACNFG_MODE |
hifn_write_1      703 drivers/crypto/hifn_795x.c 	hifn_write_1(dev, HIFN_1_DMA_CNFG, HIFN_DMACNFG_MSTRESET |
hifn_write_1      802 drivers/crypto/hifn_795x.c 	hifn_write_1(dev, HIFN_1_PUB_RESET, hifn_read_1(dev, HIFN_1_PUB_RESET) |
hifn_write_1      815 drivers/crypto/hifn_795x.c 		hifn_write_1(dev, HIFN_1_PUB_IEN, HIFN_PUBIEN_DONE);
hifn_write_1      817 drivers/crypto/hifn_795x.c 		hifn_write_1(dev, HIFN_1_DMA_IER, dev->dmareg);
hifn_write_1      824 drivers/crypto/hifn_795x.c 	hifn_write_1(dev, HIFN_1_RNG_CONFIG,
hifn_write_1      857 drivers/crypto/hifn_795x.c 	hifn_write_1(dev, HIFN_1_DMA_CNFG,
hifn_write_1      863 drivers/crypto/hifn_795x.c 	hifn_write_1(dev, HIFN_1_UNLOCK_SECRET2, 0);
hifn_write_1      868 drivers/crypto/hifn_795x.c 		hifn_write_1(dev, HIFN_1_UNLOCK_SECRET2, addr);
hifn_write_1      872 drivers/crypto/hifn_795x.c 	hifn_write_1(dev, HIFN_1_DMA_CNFG, dmacfg);
hifn_write_1      949 drivers/crypto/hifn_795x.c 	hifn_write_1(dev, HIFN_1_PLL, pllcfg |
hifn_write_1      956 drivers/crypto/hifn_795x.c 	hifn_write_1(dev, HIFN_1_PLL, pllcfg |
hifn_write_1      960 drivers/crypto/hifn_795x.c 	hifn_write_1(dev, HIFN_1_PLL, pllcfg |
hifn_write_1      982 drivers/crypto/hifn_795x.c 	hifn_write_1(dev, HIFN_1_DMA_CRAR, dptr +
hifn_write_1      984 drivers/crypto/hifn_795x.c 	hifn_write_1(dev, HIFN_1_DMA_SRAR, dptr +
hifn_write_1      986 drivers/crypto/hifn_795x.c 	hifn_write_1(dev, HIFN_1_DMA_DRAR, dptr +
hifn_write_1      988 drivers/crypto/hifn_795x.c 	hifn_write_1(dev, HIFN_1_DMA_RRAR, dptr +
hifn_write_1      993 drivers/crypto/hifn_795x.c 	hifn_write_1(dev, HIFN_1_DMA_CSR,
hifn_write_1     1007 drivers/crypto/hifn_795x.c 	hifn_write_1(dev, HIFN_1_DMA_CSR,
hifn_write_1     1029 drivers/crypto/hifn_795x.c 	hifn_write_1(dev, HIFN_1_DMA_IER, dev->dmareg);
hifn_write_1     1042 drivers/crypto/hifn_795x.c 	hifn_write_1(dev, HIFN_1_DMA_CNFG, HIFN_DMACNFG_MSTRESET |
hifn_write_1     1094 drivers/crypto/hifn_795x.c 		hifn_write_1(dev, HIFN_1_DMA_IER, dev->dmareg);
hifn_write_1     1221 drivers/crypto/hifn_795x.c 		hifn_write_1(dev, HIFN_1_DMA_CSR, HIFN_DMACSR_C_CTRL_ENA);
hifn_write_1     1256 drivers/crypto/hifn_795x.c 		hifn_write_1(dev, HIFN_1_DMA_CSR, HIFN_DMACSR_S_CTRL_ENA);
hifn_write_1     1283 drivers/crypto/hifn_795x.c 		hifn_write_1(dev, HIFN_1_DMA_CSR, HIFN_DMACSR_R_CTRL_ENA);
hifn_write_1     1312 drivers/crypto/hifn_795x.c 		hifn_write_1(dev, HIFN_1_DMA_CSR, HIFN_DMACSR_D_CTRL_ENA);
hifn_write_1     1803 drivers/crypto/hifn_795x.c 			hifn_write_1(dev, HIFN_1_DMA_CSR, r);
hifn_write_1     1863 drivers/crypto/hifn_795x.c 	hifn_write_1(dev, HIFN_1_DMA_CSR, dmacsr & dev->dmareg);
hifn_write_1     1868 drivers/crypto/hifn_795x.c 		hifn_write_1(dev, HIFN_1_PUB_STATUS,
hifn_write_1     1881 drivers/crypto/hifn_795x.c 		hifn_write_1(dev, HIFN_1_DMA_CSR, dmacsr & (HIFN_DMACSR_R_OVER |
hifn_write_1     1901 drivers/crypto/hifn_795x.c 		hifn_write_1(dev, HIFN_1_DMA_IER, dev->dmareg);