hdq_data 82 drivers/w1/masters/omap_hdq.c static inline u8 hdq_reg_in(struct hdq_data *hdq_data, u32 offset) hdq_data 84 drivers/w1/masters/omap_hdq.c return __raw_readl(hdq_data->hdq_base + offset); hdq_data 87 drivers/w1/masters/omap_hdq.c static inline void hdq_reg_out(struct hdq_data *hdq_data, u32 offset, u8 val) hdq_data 89 drivers/w1/masters/omap_hdq.c __raw_writel(val, hdq_data->hdq_base + offset); hdq_data 92 drivers/w1/masters/omap_hdq.c static inline u8 hdq_reg_merge(struct hdq_data *hdq_data, u32 offset, hdq_data 95 drivers/w1/masters/omap_hdq.c u8 new_val = (__raw_readl(hdq_data->hdq_base + offset) & ~mask) hdq_data 97 drivers/w1/masters/omap_hdq.c __raw_writel(new_val, hdq_data->hdq_base + offset); hdq_data 102 drivers/w1/masters/omap_hdq.c static void hdq_disable_interrupt(struct hdq_data *hdq_data, u32 offset, hdq_data 107 drivers/w1/masters/omap_hdq.c ie = readl(hdq_data->hdq_base + offset); hdq_data 108 drivers/w1/masters/omap_hdq.c writel(ie & mask, hdq_data->hdq_base + offset); hdq_data 117 drivers/w1/masters/omap_hdq.c static int hdq_wait_for_flag(struct hdq_data *hdq_data, u32 offset, hdq_data 125 drivers/w1/masters/omap_hdq.c while (((*status = hdq_reg_in(hdq_data, offset)) & flag) hdq_data 133 drivers/w1/masters/omap_hdq.c while (!((*status = hdq_reg_in(hdq_data, offset)) & flag) hdq_data 146 drivers/w1/masters/omap_hdq.c static int hdq_write_byte(struct hdq_data *hdq_data, u8 val, u8 *status) hdq_data 154 drivers/w1/masters/omap_hdq.c spin_lock_irqsave(&hdq_data->hdq_spinlock, irqflags); hdq_data 156 drivers/w1/masters/omap_hdq.c hdq_reg_in(hdq_data, OMAP_HDQ_INT_STATUS); hdq_data 158 drivers/w1/masters/omap_hdq.c hdq_data->hdq_irqstatus = 0; hdq_data 159 drivers/w1/masters/omap_hdq.c spin_unlock_irqrestore(&hdq_data->hdq_spinlock, irqflags); hdq_data 161 drivers/w1/masters/omap_hdq.c hdq_reg_out(hdq_data, OMAP_HDQ_TX_DATA, val); hdq_data 164 drivers/w1/masters/omap_hdq.c hdq_reg_merge(hdq_data, OMAP_HDQ_CTRL_STATUS, OMAP_HDQ_CTRL_STATUS_GO, hdq_data 168 drivers/w1/masters/omap_hdq.c hdq_data->hdq_irqstatus, OMAP_HDQ_TIMEOUT); hdq_data 170 drivers/w1/masters/omap_hdq.c dev_dbg(hdq_data->dev, "TX wait elapsed\n"); hdq_data 175 drivers/w1/masters/omap_hdq.c *status = hdq_data->hdq_irqstatus; hdq_data 178 drivers/w1/masters/omap_hdq.c dev_dbg(hdq_data->dev, "timeout waiting for" hdq_data 185 drivers/w1/masters/omap_hdq.c ret = hdq_wait_for_flag(hdq_data, OMAP_HDQ_CTRL_STATUS, hdq_data 189 drivers/w1/masters/omap_hdq.c dev_dbg(hdq_data->dev, "timeout waiting GO bit" hdq_data 200 drivers/w1/masters/omap_hdq.c struct hdq_data *hdq_data = _hdq; hdq_data 203 drivers/w1/masters/omap_hdq.c spin_lock_irqsave(&hdq_data->hdq_spinlock, irqflags); hdq_data 204 drivers/w1/masters/omap_hdq.c hdq_data->hdq_irqstatus = hdq_reg_in(hdq_data, OMAP_HDQ_INT_STATUS); hdq_data 205 drivers/w1/masters/omap_hdq.c spin_unlock_irqrestore(&hdq_data->hdq_spinlock, irqflags); hdq_data 206 drivers/w1/masters/omap_hdq.c dev_dbg(hdq_data->dev, "hdq_isr: %x", hdq_data->hdq_irqstatus); hdq_data 208 drivers/w1/masters/omap_hdq.c if (hdq_data->hdq_irqstatus & hdq_data 240 drivers/w1/masters/omap_hdq.c static int _omap_hdq_reset(struct hdq_data *hdq_data) hdq_data 245 drivers/w1/masters/omap_hdq.c hdq_reg_out(hdq_data, OMAP_HDQ_SYSCONFIG, hdq_data 253 drivers/w1/masters/omap_hdq.c hdq_reg_out(hdq_data, OMAP_HDQ_CTRL_STATUS, hdq_data 258 drivers/w1/masters/omap_hdq.c ret = hdq_wait_for_flag(hdq_data, OMAP_HDQ_SYSSTATUS, hdq_data 261 drivers/w1/masters/omap_hdq.c dev_dbg(hdq_data->dev, "timeout waiting HDQ reset, %x", hdq_data 264 drivers/w1/masters/omap_hdq.c hdq_reg_out(hdq_data, OMAP_HDQ_CTRL_STATUS, hdq_data 267 drivers/w1/masters/omap_hdq.c hdq_data->mode); hdq_data 268 drivers/w1/masters/omap_hdq.c hdq_reg_out(hdq_data, OMAP_HDQ_SYSCONFIG, hdq_data 276 drivers/w1/masters/omap_hdq.c static int omap_hdq_break(struct hdq_data *hdq_data) hdq_data 282 drivers/w1/masters/omap_hdq.c ret = mutex_lock_interruptible(&hdq_data->hdq_mutex); hdq_data 284 drivers/w1/masters/omap_hdq.c dev_dbg(hdq_data->dev, "Could not acquire mutex\n"); hdq_data 289 drivers/w1/masters/omap_hdq.c spin_lock_irqsave(&hdq_data->hdq_spinlock, irqflags); hdq_data 291 drivers/w1/masters/omap_hdq.c hdq_reg_in(hdq_data, OMAP_HDQ_INT_STATUS); hdq_data 293 drivers/w1/masters/omap_hdq.c hdq_data->hdq_irqstatus = 0; hdq_data 294 drivers/w1/masters/omap_hdq.c spin_unlock_irqrestore(&hdq_data->hdq_spinlock, irqflags); hdq_data 297 drivers/w1/masters/omap_hdq.c hdq_reg_merge(hdq_data, OMAP_HDQ_CTRL_STATUS, hdq_data 304 drivers/w1/masters/omap_hdq.c hdq_data->hdq_irqstatus, OMAP_HDQ_TIMEOUT); hdq_data 306 drivers/w1/masters/omap_hdq.c dev_dbg(hdq_data->dev, "break wait elapsed\n"); hdq_data 311 drivers/w1/masters/omap_hdq.c tmp_status = hdq_data->hdq_irqstatus; hdq_data 314 drivers/w1/masters/omap_hdq.c dev_dbg(hdq_data->dev, "timeout waiting for TIMEOUT, %x", hdq_data 324 drivers/w1/masters/omap_hdq.c if (!(hdq_reg_in(hdq_data, OMAP_HDQ_CTRL_STATUS) & hdq_data 326 drivers/w1/masters/omap_hdq.c dev_dbg(hdq_data->dev, "Presence bit not set\n"); hdq_data 335 drivers/w1/masters/omap_hdq.c ret = hdq_wait_for_flag(hdq_data, OMAP_HDQ_CTRL_STATUS, hdq_data 340 drivers/w1/masters/omap_hdq.c dev_dbg(hdq_data->dev, "timeout waiting INIT&GO bits" hdq_data 344 drivers/w1/masters/omap_hdq.c mutex_unlock(&hdq_data->hdq_mutex); hdq_data 349 drivers/w1/masters/omap_hdq.c static int hdq_read_byte(struct hdq_data *hdq_data, u8 *val) hdq_data 354 drivers/w1/masters/omap_hdq.c ret = mutex_lock_interruptible(&hdq_data->hdq_mutex); hdq_data 360 drivers/w1/masters/omap_hdq.c if (!hdq_data->hdq_usecount) { hdq_data 365 drivers/w1/masters/omap_hdq.c if (!(hdq_data->hdq_irqstatus & OMAP_HDQ_INT_STATUS_RXCOMPLETE)) { hdq_data 366 drivers/w1/masters/omap_hdq.c hdq_reg_merge(hdq_data, OMAP_HDQ_CTRL_STATUS, hdq_data 373 drivers/w1/masters/omap_hdq.c (hdq_data->hdq_irqstatus hdq_data 377 drivers/w1/masters/omap_hdq.c hdq_reg_merge(hdq_data, OMAP_HDQ_CTRL_STATUS, 0, hdq_data 379 drivers/w1/masters/omap_hdq.c status = hdq_data->hdq_irqstatus; hdq_data 382 drivers/w1/masters/omap_hdq.c dev_dbg(hdq_data->dev, "timeout waiting for" hdq_data 389 drivers/w1/masters/omap_hdq.c *val = hdq_reg_in(hdq_data, OMAP_HDQ_RX_DATA); hdq_data 391 drivers/w1/masters/omap_hdq.c mutex_unlock(&hdq_data->hdq_mutex); hdq_data 398 drivers/w1/masters/omap_hdq.c static int omap_hdq_get(struct hdq_data *hdq_data) hdq_data 402 drivers/w1/masters/omap_hdq.c ret = mutex_lock_interruptible(&hdq_data->hdq_mutex); hdq_data 408 drivers/w1/masters/omap_hdq.c if (OMAP_HDQ_MAX_USER == hdq_data->hdq_usecount) { hdq_data 409 drivers/w1/masters/omap_hdq.c dev_dbg(hdq_data->dev, "attempt to exceed the max use count"); hdq_data 413 drivers/w1/masters/omap_hdq.c hdq_data->hdq_usecount++; hdq_data 415 drivers/w1/masters/omap_hdq.c if (1 == hdq_data->hdq_usecount) { hdq_data 417 drivers/w1/masters/omap_hdq.c pm_runtime_get_sync(hdq_data->dev); hdq_data 420 drivers/w1/masters/omap_hdq.c if (!(hdq_reg_in(hdq_data, OMAP_HDQ_SYSSTATUS) & hdq_data 422 drivers/w1/masters/omap_hdq.c ret = _omap_hdq_reset(hdq_data); hdq_data 425 drivers/w1/masters/omap_hdq.c hdq_data->hdq_usecount--; hdq_data 428 drivers/w1/masters/omap_hdq.c hdq_reg_out(hdq_data, OMAP_HDQ_CTRL_STATUS, hdq_data 431 drivers/w1/masters/omap_hdq.c hdq_data->mode); hdq_data 432 drivers/w1/masters/omap_hdq.c hdq_reg_out(hdq_data, OMAP_HDQ_SYSCONFIG, hdq_data 434 drivers/w1/masters/omap_hdq.c hdq_reg_in(hdq_data, OMAP_HDQ_INT_STATUS); hdq_data 440 drivers/w1/masters/omap_hdq.c mutex_unlock(&hdq_data->hdq_mutex); hdq_data 446 drivers/w1/masters/omap_hdq.c static int omap_hdq_put(struct hdq_data *hdq_data) hdq_data 450 drivers/w1/masters/omap_hdq.c ret = mutex_lock_interruptible(&hdq_data->hdq_mutex); hdq_data 454 drivers/w1/masters/omap_hdq.c hdq_reg_out(hdq_data, OMAP_HDQ_SYSCONFIG, hdq_data 456 drivers/w1/masters/omap_hdq.c if (0 == hdq_data->hdq_usecount) { hdq_data 457 drivers/w1/masters/omap_hdq.c dev_dbg(hdq_data->dev, "attempt to decrement use count" hdq_data 461 drivers/w1/masters/omap_hdq.c hdq_data->hdq_usecount--; hdq_data 463 drivers/w1/masters/omap_hdq.c if (0 == hdq_data->hdq_usecount) hdq_data 464 drivers/w1/masters/omap_hdq.c pm_runtime_put_sync(hdq_data->dev); hdq_data 466 drivers/w1/masters/omap_hdq.c mutex_unlock(&hdq_data->hdq_mutex); hdq_data 480 drivers/w1/masters/omap_hdq.c struct hdq_data *hdq_data = _hdq; hdq_data 487 drivers/w1/masters/omap_hdq.c err = mutex_lock_interruptible(&hdq_data->hdq_mutex); hdq_data 489 drivers/w1/masters/omap_hdq.c dev_dbg(hdq_data->dev, "Could not acquire mutex\n"); hdq_data 493 drivers/w1/masters/omap_hdq.c hdq_data->hdq_irqstatus = 0; hdq_data 498 drivers/w1/masters/omap_hdq.c (hdq_data->hdq_irqstatus hdq_data 502 drivers/w1/masters/omap_hdq.c dev_dbg(hdq_data->dev, "RX wait elapsed\n"); hdq_data 507 drivers/w1/masters/omap_hdq.c hdq_data->hdq_irqstatus = 0; hdq_data 512 drivers/w1/masters/omap_hdq.c (hdq_data->hdq_irqstatus hdq_data 516 drivers/w1/masters/omap_hdq.c dev_dbg(hdq_data->dev, "RX wait elapsed\n"); hdq_data 538 drivers/w1/masters/omap_hdq.c (hdq_data->hdq_irqstatus hdq_data 542 drivers/w1/masters/omap_hdq.c dev_dbg(hdq_data->dev, "TX wait elapsed\n"); hdq_data 550 drivers/w1/masters/omap_hdq.c mutex_unlock(&hdq_data->hdq_mutex); hdq_data 568 drivers/w1/masters/omap_hdq.c struct hdq_data *hdq_data = _hdq; hdq_data 573 drivers/w1/masters/omap_hdq.c if (hdq_data->init_trans == 0) hdq_data 574 drivers/w1/masters/omap_hdq.c omap_hdq_get(hdq_data); hdq_data 576 drivers/w1/masters/omap_hdq.c ret = hdq_read_byte(hdq_data, &val); hdq_data 578 drivers/w1/masters/omap_hdq.c ret = mutex_lock_interruptible(&hdq_data->hdq_mutex); hdq_data 580 drivers/w1/masters/omap_hdq.c dev_dbg(hdq_data->dev, "Could not acquire mutex\n"); hdq_data 583 drivers/w1/masters/omap_hdq.c hdq_data->init_trans = 0; hdq_data 584 drivers/w1/masters/omap_hdq.c mutex_unlock(&hdq_data->hdq_mutex); hdq_data 585 drivers/w1/masters/omap_hdq.c omap_hdq_put(hdq_data); hdq_data 589 drivers/w1/masters/omap_hdq.c hdq_disable_interrupt(hdq_data, OMAP_HDQ_CTRL_STATUS, hdq_data 593 drivers/w1/masters/omap_hdq.c if (hdq_data->init_trans) { hdq_data 594 drivers/w1/masters/omap_hdq.c ret = mutex_lock_interruptible(&hdq_data->hdq_mutex); hdq_data 596 drivers/w1/masters/omap_hdq.c dev_dbg(hdq_data->dev, "Could not acquire mutex\n"); hdq_data 599 drivers/w1/masters/omap_hdq.c hdq_data->init_trans = 0; hdq_data 600 drivers/w1/masters/omap_hdq.c mutex_unlock(&hdq_data->hdq_mutex); hdq_data 601 drivers/w1/masters/omap_hdq.c omap_hdq_put(hdq_data); hdq_data 610 drivers/w1/masters/omap_hdq.c struct hdq_data *hdq_data = _hdq; hdq_data 615 drivers/w1/masters/omap_hdq.c if (hdq_data->init_trans == 0) hdq_data 616 drivers/w1/masters/omap_hdq.c omap_hdq_get(hdq_data); hdq_data 624 drivers/w1/masters/omap_hdq.c omap_hdq_break(hdq_data); hdq_data 626 drivers/w1/masters/omap_hdq.c ret = mutex_lock_interruptible(&hdq_data->hdq_mutex); hdq_data 628 drivers/w1/masters/omap_hdq.c dev_dbg(hdq_data->dev, "Could not acquire mutex\n"); hdq_data 631 drivers/w1/masters/omap_hdq.c hdq_data->init_trans++; hdq_data 632 drivers/w1/masters/omap_hdq.c mutex_unlock(&hdq_data->hdq_mutex); hdq_data 634 drivers/w1/masters/omap_hdq.c ret = hdq_write_byte(hdq_data, byte, &status); hdq_data 636 drivers/w1/masters/omap_hdq.c dev_dbg(hdq_data->dev, "TX failure:Ctrl status %x\n", status); hdq_data 641 drivers/w1/masters/omap_hdq.c if (hdq_data->init_trans > 1) { hdq_data 642 drivers/w1/masters/omap_hdq.c omap_hdq_put(hdq_data); hdq_data 643 drivers/w1/masters/omap_hdq.c ret = mutex_lock_interruptible(&hdq_data->hdq_mutex); hdq_data 645 drivers/w1/masters/omap_hdq.c dev_dbg(hdq_data->dev, "Could not acquire mutex\n"); hdq_data 648 drivers/w1/masters/omap_hdq.c hdq_data->init_trans = 0; hdq_data 649 drivers/w1/masters/omap_hdq.c mutex_unlock(&hdq_data->hdq_mutex); hdq_data 662 drivers/w1/masters/omap_hdq.c struct hdq_data *hdq_data; hdq_data 667 drivers/w1/masters/omap_hdq.c hdq_data = devm_kzalloc(dev, sizeof(*hdq_data), GFP_KERNEL); hdq_data 668 drivers/w1/masters/omap_hdq.c if (!hdq_data) { hdq_data 673 drivers/w1/masters/omap_hdq.c hdq_data->dev = dev; hdq_data 674 drivers/w1/masters/omap_hdq.c platform_set_drvdata(pdev, hdq_data); hdq_data 676 drivers/w1/masters/omap_hdq.c hdq_data->hdq_base = devm_platform_ioremap_resource(pdev, 0); hdq_data 677 drivers/w1/masters/omap_hdq.c if (IS_ERR(hdq_data->hdq_base)) hdq_data 678 drivers/w1/masters/omap_hdq.c return PTR_ERR(hdq_data->hdq_base); hdq_data 680 drivers/w1/masters/omap_hdq.c hdq_data->hdq_usecount = 0; hdq_data 681 drivers/w1/masters/omap_hdq.c hdq_data->rrw = 0; hdq_data 682 drivers/w1/masters/omap_hdq.c mutex_init(&hdq_data->hdq_mutex); hdq_data 691 drivers/w1/masters/omap_hdq.c ret = _omap_hdq_reset(hdq_data); hdq_data 697 drivers/w1/masters/omap_hdq.c rev = hdq_reg_in(hdq_data, OMAP_HDQ_REVISION); hdq_data 701 drivers/w1/masters/omap_hdq.c spin_lock_init(&hdq_data->hdq_spinlock); hdq_data 710 drivers/w1/masters/omap_hdq.c ret = devm_request_irq(dev, irq, hdq_isr, 0, "omap_hdq", hdq_data); hdq_data 716 drivers/w1/masters/omap_hdq.c omap_hdq_break(hdq_data); hdq_data 722 drivers/w1/masters/omap_hdq.c hdq_data->mode = 0; hdq_data 725 drivers/w1/masters/omap_hdq.c hdq_data->mode = 1; hdq_data 729 drivers/w1/masters/omap_hdq.c omap_w1_master.data = hdq_data; hdq_data 749 drivers/w1/masters/omap_hdq.c struct hdq_data *hdq_data = platform_get_drvdata(pdev); hdq_data 751 drivers/w1/masters/omap_hdq.c mutex_lock(&hdq_data->hdq_mutex); hdq_data 753 drivers/w1/masters/omap_hdq.c if (hdq_data->hdq_usecount) { hdq_data 755 drivers/w1/masters/omap_hdq.c mutex_unlock(&hdq_data->hdq_mutex); hdq_data 759 drivers/w1/masters/omap_hdq.c mutex_unlock(&hdq_data->hdq_mutex);