hdmi_read_reg     277 drivers/gpu/drm/omapdrm/dss/hdmi.h 	hdmi_write_reg(base, idx, FLD_MOD(hdmi_read_reg(base, idx),\
hdmi_read_reg     280 drivers/gpu/drm/omapdrm/dss/hdmi.h 	FLD_GET(hdmi_read_reg(base, idx), start, end)
hdmi_read_reg      90 drivers/gpu/drm/omapdrm/dss/hdmi4.c 		u32 intr4 = hdmi_read_reg(hdmi->core.base, HDMI_CORE_SYS_INTR4);
hdmi_read_reg      70 drivers/gpu/drm/omapdrm/dss/hdmi4_cec.c 	u32 cnt = hdmi_read_reg(core->base, HDMI_CEC_RX_COUNT) & 0xff;
hdmi_read_reg      83 drivers/gpu/drm/omapdrm/dss/hdmi4_cec.c 			msg.msg[0] = hdmi_read_reg(core->base,
hdmi_read_reg      85 drivers/gpu/drm/omapdrm/dss/hdmi4_cec.c 			msg.msg[1] = hdmi_read_reg(core->base,
hdmi_read_reg      91 drivers/gpu/drm/omapdrm/dss/hdmi4_cec.c 					hdmi_read_reg(core->base, reg);
hdmi_read_reg      99 drivers/gpu/drm/omapdrm/dss/hdmi4_cec.c 		while (hdmi_read_reg(core->base, HDMI_CEC_RX_CONTROL) & 1)
hdmi_read_reg     105 drivers/gpu/drm/omapdrm/dss/hdmi4_cec.c 		cnt = hdmi_read_reg(core->base, HDMI_CEC_RX_COUNT) & 0xff;
hdmi_read_reg     111 drivers/gpu/drm/omapdrm/dss/hdmi4_cec.c 	u32 stat0 = hdmi_read_reg(core->base, HDMI_CEC_INT_STATUS_0);
hdmi_read_reg     112 drivers/gpu/drm/omapdrm/dss/hdmi4_cec.c 	u32 stat1 = hdmi_read_reg(core->base, HDMI_CEC_INT_STATUS_1);
hdmi_read_reg     122 drivers/gpu/drm/omapdrm/dss/hdmi4_cec.c 		u32 dbg3 = hdmi_read_reg(core->base, HDMI_CEC_DBG_3);
hdmi_read_reg     142 drivers/gpu/drm/omapdrm/dss/hdmi4_cec.c 		temp = hdmi_read_reg(core->base, HDMI_CEC_DBG_3);
hdmi_read_reg     159 drivers/gpu/drm/omapdrm/dss/hdmi4_cec.c 		temp = hdmi_read_reg(core->base, HDMI_CEC_RX_CONTROL);
hdmi_read_reg     208 drivers/gpu/drm/omapdrm/dss/hdmi4_cec.c 		hdmi_read_reg(core->base, HDMI_CEC_INT_STATUS_1));
hdmi_read_reg     210 drivers/gpu/drm/omapdrm/dss/hdmi4_cec.c 		hdmi_read_reg(core->base, HDMI_CEC_INT_STATUS_0));
hdmi_read_reg     233 drivers/gpu/drm/omapdrm/dss/hdmi4_cec.c 	temp = hdmi_read_reg(core->base, HDMI_CEC_SETUP);
hdmi_read_reg     243 drivers/gpu/drm/omapdrm/dss/hdmi4_cec.c 		temp = hdmi_read_reg(core->base, HDMI_CEC_INT_STATUS_1);
hdmi_read_reg     267 drivers/gpu/drm/omapdrm/dss/hdmi4_cec.c 		v = hdmi_read_reg(core->base, HDMI_CEC_CA_7_0);
hdmi_read_reg     271 drivers/gpu/drm/omapdrm/dss/hdmi4_cec.c 		v = hdmi_read_reg(core->base, HDMI_CEC_CA_15_8);
hdmi_read_reg     226 drivers/gpu/drm/omapdrm/dss/hdmi4_core.c 	r = hdmi_read_reg(core_sys_base, HDMI_CORE_SYS_SYS_CTRL1);
hdmi_read_reg     237 drivers/gpu/drm/omapdrm/dss/hdmi4_core.c 	r = hdmi_read_reg(core_sys_base, HDMI_CORE_SYS_VID_MODE);
hdmi_read_reg     250 drivers/gpu/drm/omapdrm/dss/hdmi4_core.c 	r = hdmi_read_reg(core_av_base, HDMI_CORE_AV_HDMI_CTRL);
hdmi_read_reg     354 drivers/gpu/drm/omapdrm/dss/hdmi4_core.c 		hdmi_read_reg(core->base, r))
hdmi_read_reg     356 drivers/gpu/drm/omapdrm/dss/hdmi4_core.c 		hdmi_read_reg(hdmi_av_base(core), r))
hdmi_read_reg     359 drivers/gpu/drm/omapdrm/dss/hdmi4_core.c 		hdmi_read_reg(hdmi_av_base(core), CORE_REG(i, r)))
hdmi_read_reg     548 drivers/gpu/drm/omapdrm/dss/hdmi4_core.c 	r = hdmi_read_reg(av_base, HDMI_CORE_AV_ACR_CTRL);
hdmi_read_reg     586 drivers/gpu/drm/omapdrm/dss/hdmi4_core.c 	r = hdmi_read_reg(av_base, HDMI_CORE_AV_I2S_IN_CTRL);
hdmi_read_reg     599 drivers/gpu/drm/omapdrm/dss/hdmi4_core.c 	r = hdmi_read_reg(av_base, HDMI_CORE_AV_AUD_MODE);
hdmi_read_reg      88 drivers/gpu/drm/omapdrm/dss/hdmi5.c 		v = hdmi_read_reg(hdmi->phy.base, HDMI_TXPHY_PAD_CFG_CTRL);
hdmi_read_reg     222 drivers/gpu/drm/omapdrm/dss/hdmi5_core.c 		hdmi_read_reg(core->base, r))
hdmi_read_reg     328 drivers/gpu/drm/omapdrm/dss/hdmi5_core.c 	r = hdmi_read_reg(base, HDMI_CORE_FC_INVIDCONF);
hdmi_read_reg      22 drivers/gpu/drm/omapdrm/dss/hdmi_phy.c 		hdmi_read_reg(phy->base, r))
hdmi_read_reg     132 drivers/gpu/drm/omapdrm/dss/hdmi_phy.c 	hdmi_read_reg(phy->base, HDMI_TXPHY_TX_CTRL);
hdmi_read_reg      26 drivers/gpu/drm/omapdrm/dss/hdmi_pll.c 		hdmi_read_reg(pll->base, r))
hdmi_read_reg      22 drivers/gpu/drm/omapdrm/dss/hdmi_wp.c #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, hdmi_read_reg(wp->base, r))
hdmi_read_reg      46 drivers/gpu/drm/omapdrm/dss/hdmi_wp.c 	return hdmi_read_reg(wp->base, HDMI_WP_IRQSTATUS);
hdmi_read_reg      53 drivers/gpu/drm/omapdrm/dss/hdmi_wp.c 	hdmi_read_reg(wp->base, HDMI_WP_IRQSTATUS);
hdmi_read_reg     122 drivers/gpu/drm/omapdrm/dss/hdmi_wp.c 		v = hdmi_read_reg(wp->base, HDMI_WP_IRQSTATUS_RAW);
hdmi_read_reg     153 drivers/gpu/drm/omapdrm/dss/hdmi_wp.c 	r = hdmi_read_reg(wp->base, HDMI_WP_VIDEO_CFG);
hdmi_read_reg     232 drivers/gpu/drm/omapdrm/dss/hdmi_wp.c 	r = hdmi_read_reg(wp->base, HDMI_WP_AUDIO_CFG);
hdmi_read_reg     253 drivers/gpu/drm/omapdrm/dss/hdmi_wp.c 	r = hdmi_read_reg(wp->base, HDMI_WP_AUDIO_CFG2);
hdmi_read_reg     258 drivers/gpu/drm/omapdrm/dss/hdmi_wp.c 	r = hdmi_read_reg(wp->base, HDMI_WP_AUDIO_CTRL);
hdmi_read_reg     259 drivers/video/fbdev/omap2/omapfb/dss/hdmi.h 	hdmi_write_reg(base, idx, FLD_MOD(hdmi_read_reg(base, idx),\
hdmi_read_reg     262 drivers/video/fbdev/omap2/omapfb/dss/hdmi.h 	FLD_GET(hdmi_read_reg(base, idx), start, end)
hdmi_read_reg     227 drivers/video/fbdev/omap2/omapfb/dss/hdmi4_core.c 	r = hdmi_read_reg(core_sys_base, HDMI_CORE_SYS_SYS_CTRL1);
hdmi_read_reg     238 drivers/video/fbdev/omap2/omapfb/dss/hdmi4_core.c 	r = hdmi_read_reg(core_sys_base, HDMI_CORE_SYS_VID_MODE);
hdmi_read_reg     251 drivers/video/fbdev/omap2/omapfb/dss/hdmi4_core.c 	r = hdmi_read_reg(core_av_base, HDMI_CORE_AV_HDMI_CTRL);
hdmi_read_reg     358 drivers/video/fbdev/omap2/omapfb/dss/hdmi4_core.c 		hdmi_read_reg(core->base, r))
hdmi_read_reg     360 drivers/video/fbdev/omap2/omapfb/dss/hdmi4_core.c 		hdmi_read_reg(hdmi_av_base(core), r))
hdmi_read_reg     363 drivers/video/fbdev/omap2/omapfb/dss/hdmi4_core.c 		hdmi_read_reg(hdmi_av_base(core), CORE_REG(i, r)))
hdmi_read_reg     552 drivers/video/fbdev/omap2/omapfb/dss/hdmi4_core.c 	r = hdmi_read_reg(av_base, HDMI_CORE_AV_ACR_CTRL);
hdmi_read_reg     590 drivers/video/fbdev/omap2/omapfb/dss/hdmi4_core.c 	r = hdmi_read_reg(av_base, HDMI_CORE_AV_I2S_IN_CTRL);
hdmi_read_reg     603 drivers/video/fbdev/omap2/omapfb/dss/hdmi4_core.c 	r = hdmi_read_reg(av_base, HDMI_CORE_AV_AUD_MODE);
hdmi_read_reg      88 drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c 		v = hdmi_read_reg(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL);
hdmi_read_reg     223 drivers/video/fbdev/omap2/omapfb/dss/hdmi5_core.c 		hdmi_read_reg(core->base, r))
hdmi_read_reg     319 drivers/video/fbdev/omap2/omapfb/dss/hdmi5_core.c 	r = hdmi_read_reg(base, HDMI_CORE_FC_INVIDCONF);
hdmi_read_reg      31 drivers/video/fbdev/omap2/omapfb/dss/hdmi_phy.c 		hdmi_read_reg(phy->base, r))
hdmi_read_reg     141 drivers/video/fbdev/omap2/omapfb/dss/hdmi_phy.c 	hdmi_read_reg(phy->base, HDMI_TXPHY_TX_CTRL);
hdmi_read_reg      26 drivers/video/fbdev/omap2/omapfb/dss/hdmi_pll.c 		hdmi_read_reg(pll->base, r))
hdmi_read_reg      23 drivers/video/fbdev/omap2/omapfb/dss/hdmi_wp.c #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, hdmi_read_reg(wp->base, r))
hdmi_read_reg      47 drivers/video/fbdev/omap2/omapfb/dss/hdmi_wp.c 	return hdmi_read_reg(wp->base, HDMI_WP_IRQSTATUS);
hdmi_read_reg      54 drivers/video/fbdev/omap2/omapfb/dss/hdmi_wp.c 	hdmi_read_reg(wp->base, HDMI_WP_IRQSTATUS);
hdmi_read_reg     123 drivers/video/fbdev/omap2/omapfb/dss/hdmi_wp.c 		v = hdmi_read_reg(wp->base, HDMI_WP_IRQSTATUS_RAW);
hdmi_read_reg     154 drivers/video/fbdev/omap2/omapfb/dss/hdmi_wp.c 	r = hdmi_read_reg(wp->base, HDMI_WP_VIDEO_CFG);
hdmi_read_reg     210 drivers/video/fbdev/omap2/omapfb/dss/hdmi_wp.c 	r = hdmi_read_reg(wp->base, HDMI_WP_AUDIO_CFG);
hdmi_read_reg     233 drivers/video/fbdev/omap2/omapfb/dss/hdmi_wp.c 	r = hdmi_read_reg(wp->base, HDMI_WP_AUDIO_CFG2);
hdmi_read_reg     238 drivers/video/fbdev/omap2/omapfb/dss/hdmi_wp.c 	r = hdmi_read_reg(wp->base, HDMI_WP_AUDIO_CTRL);