CLK_ENABLE_REG_16BIT   82 arch/sh/kernel/cpu/sh2a/clock-sh7264.c 	[DIV4_I] = DIV4(FRQCR, 4, 0x7,  CLK_ENABLE_REG_16BIT
CLK_ENABLE_REG_16BIT   84 arch/sh/kernel/cpu/sh2a/clock-sh7264.c 	[DIV4_P] = DIV4(FRQCR, 0, 0x78, CLK_ENABLE_REG_16BIT),
CLK_ENABLE_REG_16BIT  110 arch/sh/kernel/cpu/sh2a/clock-sh7269.c 	[DIV4_I]  = DIV4(FRQCR, 8, 0xB, CLK_ENABLE_REG_16BIT
CLK_ENABLE_REG_16BIT  112 arch/sh/kernel/cpu/sh2a/clock-sh7269.c 	[DIV4_B]  = DIV4(FRQCR, 4, 0xA, CLK_ENABLE_REG_16BIT
CLK_ENABLE_REG_16BIT   23 drivers/sh/clk/cpg.c 	else if (clk->flags & CLK_ENABLE_REG_16BIT)
CLK_ENABLE_REG_16BIT   33 drivers/sh/clk/cpg.c 	else if (clk->flags & CLK_ENABLE_REG_16BIT)
CLK_ENABLE_REG_16BIT   65 drivers/sh/clk/cpg.c 		else if (clk->flags & CLK_ENABLE_REG_16BIT)
CLK_ENABLE_REG_16BIT   77 include/linux/sh_clk.h 				 CLK_ENABLE_REG_16BIT | \
CLK_ENABLE_REG_16BIT  133 include/linux/sh_clk.h 	SH_CLK_MSTP(_p, _r, _b, 0, _f | CLK_ENABLE_REG_16BIT)