hash_mode 99 drivers/crypto/bcm/cipher.h enum hash_mode mode; hash_mode 365 drivers/crypto/bcm/cipher.h enum hash_mode hash_mode, u32 chunksize, hash_mode 393 drivers/crypto/bcm/cipher.h enum hash_mode auth_mode, hash_mode 35 drivers/crypto/bcm/spu.c u32 hash_mode; hash_mode 82 drivers/crypto/bcm/spu.c hash_mode = (cflags & HASH_MODE) >> HASH_MODE_SHIFT; hash_mode 85 drivers/crypto/bcm/spu.c hash_alg, hash_mode, hash_type); hash_mode 106 drivers/crypto/bcm/spu.c if (hash_alg && hash_mode) { hash_mode 147 drivers/crypto/bcm/spu.c (hash_mode == HASH_MODE_XCBC)) { hash_mode 170 drivers/crypto/bcm/spu.c if (hash_alg && (hash_mode == HASH_MODE_NONE) && hash_mode 430 drivers/crypto/bcm/spu.c u16 spum_hash_pad_len(enum hash_alg hash_alg, enum hash_mode hash_mode, hash_mode 438 drivers/crypto/bcm/spu.c if ((hash_alg == HASH_ALG_AES) && (hash_mode == HASH_MODE_XCBC)) { hash_mode 1052 drivers/crypto/bcm/spu.c enum hash_mode auth_mode, hash_mode 128 drivers/crypto/bcm/spu.h enum hash_mode mode; hash_mode 228 drivers/crypto/bcm/spu.h u16 spum_hash_pad_len(enum hash_alg hash_alg, enum hash_mode hash_mode, hash_mode 261 drivers/crypto/bcm/spu.h enum hash_mode auth_mode, hash_mode 80 drivers/crypto/bcm/spu2.c static char *spu2_hash_mode_name(enum spu2_hash_mode hash_mode) hash_mode 82 drivers/crypto/bcm/spu2.c if (hash_mode >= SPU2_HASH_MODE_LAST) hash_mode 84 drivers/crypto/bcm/spu2.c return spu2_hash_mode_names[hash_mode]; hash_mode 196 drivers/crypto/bcm/spu2.c static int spu2_hash_mode_xlate(enum hash_mode hash_mode, hash_mode 199 drivers/crypto/bcm/spu2.c switch (hash_mode) { hash_mode 234 drivers/crypto/bcm/spu2.c spu2_hash_xlate(enum hash_alg hash_alg, enum hash_mode hash_mode, hash_mode 240 drivers/crypto/bcm/spu2.c err = spu2_hash_mode_xlate(hash_mode, spu2_mode); hash_mode 242 drivers/crypto/bcm/spu2.c flow_log("Invalid hash mode %d\n", hash_mode); hash_mode 313 drivers/crypto/bcm/spu2.c enum spu2_hash_mode hash_mode; hash_mode 356 drivers/crypto/bcm/spu2.c hash_mode = (ctrl0 & SPU2_HASH_MODE) >> SPU2_HASH_MODE_SHIFT; hash_mode 357 drivers/crypto/bcm/spu2.c hash_mode_name = spu2_hash_mode_name(hash_mode); hash_mode 841 drivers/crypto/bcm/spu2.c u16 spu2_hash_pad_len(enum hash_alg hash_alg, enum hash_mode hash_mode, hash_mode 1253 drivers/crypto/bcm/spu2.c enum hash_alg auth_alg, enum hash_mode auth_mode, hash_mode 180 drivers/crypto/bcm/spu2.h u16 spu2_hash_pad_len(enum hash_alg hash_alg, enum hash_mode hash_mode, hash_mode 206 drivers/crypto/bcm/spu2.h enum hash_alg auth_alg, enum hash_mode auth_mode, hash_mode 300 drivers/crypto/ccree/cc_aead.c unsigned int hash_mode = (ctx->auth_mode == DRV_HASH_SHA1) ? hash_mode 313 drivers/crypto/ccree/cc_aead.c set_cipher_mode(&desc[idx], hash_mode); hash_mode 324 drivers/crypto/ccree/cc_aead.c set_cipher_mode(&desc[idx], hash_mode); hash_mode 333 drivers/crypto/ccree/cc_aead.c set_cipher_mode(&desc[idx], hash_mode); hash_mode 343 drivers/crypto/ccree/cc_aead.c set_cipher_mode(&desc[idx], hash_mode); hash_mode 350 drivers/crypto/ccree/cc_aead.c set_cipher_mode(&desc[idx], hash_mode); hash_mode 888 drivers/crypto/ccree/cc_aead.c unsigned int hash_mode = (ctx->auth_mode == DRV_HASH_SHA1) ? hash_mode 906 drivers/crypto/ccree/cc_aead.c set_cipher_mode(&desc[idx], hash_mode); hash_mode 923 drivers/crypto/ccree/cc_aead.c set_cipher_mode(&desc[idx], hash_mode); hash_mode 1003 drivers/crypto/ccree/cc_aead.c unsigned int hash_mode = (ctx->auth_mode == DRV_HASH_SHA1) ? hash_mode 1011 drivers/crypto/ccree/cc_aead.c set_cipher_mode(&desc[idx], hash_mode); hash_mode 1021 drivers/crypto/ccree/cc_aead.c set_cipher_mode(&desc[idx], hash_mode); hash_mode 1022 drivers/crypto/ccree/cc_aead.c set_din_sram(&desc[idx], cc_digest_len_addr(ctx->drvdata, hash_mode), hash_mode 1113 drivers/crypto/ccree/cc_aead.c unsigned int hash_mode = (ctx->auth_mode == DRV_HASH_SHA1) ? hash_mode 1120 drivers/crypto/ccree/cc_aead.c set_cipher_mode(&desc[idx], hash_mode); hash_mode 1135 drivers/crypto/ccree/cc_aead.c set_cipher_mode(&desc[idx], hash_mode); hash_mode 1140 drivers/crypto/ccree/cc_aead.c set_cipher_mode(&desc[idx], hash_mode); hash_mode 1150 drivers/crypto/ccree/cc_aead.c set_cipher_mode(&desc[idx], hash_mode); hash_mode 1151 drivers/crypto/ccree/cc_aead.c set_din_sram(&desc[idx], cc_digest_len_addr(ctx->drvdata, hash_mode), hash_mode 62 drivers/crypto/ccree/cc_hash.c int hash_mode; hash_mode 88 drivers/crypto/ccree/cc_hash.c int hash_mode; hash_mode 144 drivers/crypto/ccree/cc_hash.c if (ctx->hash_mode == DRV_HASH_SHA512 || hash_mode 145 drivers/crypto/ccree/cc_hash.c ctx->hash_mode == DRV_HASH_SHA384) hash_mode 155 drivers/crypto/ccree/cc_hash.c if (ctx->hash_mode != DRV_HASH_NULL) { hash_mode 165 drivers/crypto/ccree/cc_hash.c const void *larval = cc_larval_digest(dev, ctx->hash_mode); hash_mode 202 drivers/crypto/ccree/cc_hash.c if (is_hmac && ctx->hash_mode != DRV_HASH_NULL) { hash_mode 344 drivers/crypto/ccree/cc_hash.c set_hash_cipher_mode(&desc[idx], ctx->hw_mode, ctx->hash_mode); hash_mode 352 drivers/crypto/ccree/cc_hash.c cc_set_endianity(ctx->hash_mode, &desc[idx]); hash_mode 372 drivers/crypto/ccree/cc_hash.c cc_set_endianity(ctx->hash_mode, &desc[idx]); hash_mode 389 drivers/crypto/ccree/cc_hash.c cc_digest_len_addr(ctx->drvdata, ctx->hash_mode), hash_mode 426 drivers/crypto/ccree/cc_hash.c cc_larval_digest_addr(ctx->drvdata, ctx->hash_mode); hash_mode 463 drivers/crypto/ccree/cc_hash.c set_hash_cipher_mode(&desc[idx], ctx->hw_mode, ctx->hash_mode); hash_mode 477 drivers/crypto/ccree/cc_hash.c set_hash_cipher_mode(&desc[idx], ctx->hw_mode, ctx->hash_mode); hash_mode 527 drivers/crypto/ccree/cc_hash.c set_hash_cipher_mode(&desc[idx], ctx->hw_mode, ctx->hash_mode); hash_mode 536 drivers/crypto/ccree/cc_hash.c set_hash_cipher_mode(&desc[idx], ctx->hw_mode, ctx->hash_mode); hash_mode 599 drivers/crypto/ccree/cc_hash.c set_hash_cipher_mode(&desc[idx], ctx->hw_mode, ctx->hash_mode); hash_mode 608 drivers/crypto/ccree/cc_hash.c set_hash_cipher_mode(&desc[idx], ctx->hw_mode, ctx->hash_mode); hash_mode 672 drivers/crypto/ccree/cc_hash.c set_hash_cipher_mode(&desc[idx], ctx->hw_mode, ctx->hash_mode); hash_mode 739 drivers/crypto/ccree/cc_hash.c larval_addr = cc_larval_digest_addr(ctx->drvdata, ctx->hash_mode); hash_mode 800 drivers/crypto/ccree/cc_hash.c cc_set_endianity(ctx->hash_mode, &desc[idx]); hash_mode 1113 drivers/crypto/ccree/cc_hash.c if (ctx->hash_mode == DRV_HASH_SM3) hash_mode 1132 drivers/crypto/ccree/cc_hash.c ctx->hash_mode = cc_alg->hash_mode; hash_mode 1568 drivers/crypto/ccree/cc_hash.c int hash_mode; hash_mode 1604 drivers/crypto/ccree/cc_hash.c .hash_mode = DRV_HASH_SHA1, hash_mode 1631 drivers/crypto/ccree/cc_hash.c .hash_mode = DRV_HASH_SHA256, hash_mode 1658 drivers/crypto/ccree/cc_hash.c .hash_mode = DRV_HASH_SHA224, hash_mode 1685 drivers/crypto/ccree/cc_hash.c .hash_mode = DRV_HASH_SHA384, hash_mode 1712 drivers/crypto/ccree/cc_hash.c .hash_mode = DRV_HASH_SHA512, hash_mode 1739 drivers/crypto/ccree/cc_hash.c .hash_mode = DRV_HASH_MD5, hash_mode 1764 drivers/crypto/ccree/cc_hash.c .hash_mode = DRV_HASH_SM3, hash_mode 1789 drivers/crypto/ccree/cc_hash.c .hash_mode = DRV_HASH_NULL, hash_mode 1814 drivers/crypto/ccree/cc_hash.c .hash_mode = DRV_HASH_NULL, hash_mode 1859 drivers/crypto/ccree/cc_hash.c t_crypto_alg->hash_mode = template->hash_mode; hash_mode 2138 drivers/crypto/ccree/cc_hash.c set_hash_cipher_mode(&desc[idx], DRV_CIPHER_XCBC_MAC, ctx->hash_mode); hash_mode 513 drivers/crypto/ccree/cc_hw_queue_defs.h enum drv_hash_mode hash_mode) hash_mode 516 drivers/crypto/ccree/cc_hw_queue_defs.h if (hash_mode == DRV_HASH_SM3) hash_mode 41 drivers/crypto/ux500/hash/hash_core.c static int hash_mode; hash_mode 42 drivers/crypto/ux500/hash/hash_core.c module_param(hash_mode, int, 0); hash_mode 43 drivers/crypto/ux500/hash/hash_core.c MODULE_PARM_DESC(hash_mode, "CPU or DMA mode. CPU = 0 (default), DMA = 1"); hash_mode 560 drivers/crypto/ux500/hash/hash_core.c if (hash_mode == HASH_MODE_DMA) { hash_mode 890 drivers/crypto/ux500/hash/hash_core.c if (hash_mode != HASH_MODE_DMA || !req_ctx->dma_mode) { hash_mode 1131 drivers/crypto/ux500/hash/hash_core.c int hash_mode = HASH_OPER_MODE_HASH; hash_mode 1158 drivers/crypto/ux500/hash/hash_core.c hash_mode = HASH_OPER_MODE_HMAC; hash_mode 1160 drivers/crypto/ux500/hash/hash_core.c hash_mode = HASH_OPER_MODE_HASH; hash_mode 1163 drivers/crypto/ux500/hash/hash_core.c if ((count >= 36) && (hash_mode == HASH_OPER_MODE_HASH)) hash_mode 1189 drivers/crypto/ux500/hash/hash_core.c int hash_mode = HASH_OPER_MODE_HASH; hash_mode 1211 drivers/crypto/ux500/hash/hash_core.c hash_mode = HASH_OPER_MODE_HMAC; hash_mode 1213 drivers/crypto/ux500/hash/hash_core.c hash_mode = HASH_OPER_MODE_HASH; hash_mode 1216 drivers/crypto/ux500/hash/hash_core.c if ((count >= 36) && (hash_mode == HASH_OPER_MODE_HASH)) hash_mode 1299 drivers/crypto/ux500/hash/hash_core.c if (hash_mode != HASH_MODE_DMA || !req_ctx->dma_mode) hash_mode 1321 drivers/crypto/ux500/hash/hash_core.c if ((hash_mode == HASH_MODE_DMA) && req_ctx->dma_mode) hash_mode 1720 drivers/crypto/ux500/hash/hash_core.c if (hash_mode == HASH_MODE_DMA) hash_mode 31 include/uapi/linux/netfilter_ipv4/ipt_CLUSTERIP.h __u32 hash_mode; hash_mode 193 include/uapi/linux/virtio_crypto.h __le32 hash_mode; hash_mode 53 net/ipv4/netfilter/ipt_CLUSTERIP.c enum clusterip_hashmode hash_mode; /* which hashing mode */ hash_mode 260 net/ipv4/netfilter/ipt_CLUSTERIP.c c->hash_mode = i->hash_mode; hash_mode 359 net/ipv4/netfilter/ipt_CLUSTERIP.c switch (config->hash_mode) { hash_mode 377 net/ipv4/netfilter/ipt_CLUSTERIP.c pr_info("unknown mode %u\n", config->hash_mode); hash_mode 470 net/ipv4/netfilter/ipt_CLUSTERIP.c if (cipinfo->hash_mode != CLUSTERIP_HASHMODE_SIP && hash_mode 471 net/ipv4/netfilter/ipt_CLUSTERIP.c cipinfo->hash_mode != CLUSTERIP_HASHMODE_SIP_SPT && hash_mode 472 net/ipv4/netfilter/ipt_CLUSTERIP.c cipinfo->hash_mode != CLUSTERIP_HASHMODE_SIP_SPT_DPT) { hash_mode 473 net/ipv4/netfilter/ipt_CLUSTERIP.c pr_info("unknown mode %u\n", cipinfo->hash_mode); hash_mode 552 net/ipv4/netfilter/ipt_CLUSTERIP.c u_int32_t hash_mode;