gpu_read 89 drivers/gpu/drm/etnaviv/etnaviv_dump.c reg->value = gpu_read(gpu, etnaviv_dump_registers[i]); gpu_read 181 drivers/gpu/drm/etnaviv/etnaviv_gpu.c specs[0] = gpu_read(gpu, VIVS_HI_CHIP_SPECS); gpu_read 182 drivers/gpu/drm/etnaviv/etnaviv_gpu.c specs[1] = gpu_read(gpu, VIVS_HI_CHIP_SPECS_2); gpu_read 183 drivers/gpu/drm/etnaviv/etnaviv_gpu.c specs[2] = gpu_read(gpu, VIVS_HI_CHIP_SPECS_3); gpu_read 184 drivers/gpu/drm/etnaviv/etnaviv_gpu.c specs[3] = gpu_read(gpu, VIVS_HI_CHIP_SPECS_4); gpu_read 328 drivers/gpu/drm/etnaviv/etnaviv_gpu.c chipIdentity = gpu_read(gpu, VIVS_HI_CHIP_IDENTITY); gpu_read 337 drivers/gpu/drm/etnaviv/etnaviv_gpu.c gpu->identity.model = gpu_read(gpu, VIVS_HI_CHIP_MODEL); gpu_read 338 drivers/gpu/drm/etnaviv/etnaviv_gpu.c gpu->identity.revision = gpu_read(gpu, VIVS_HI_CHIP_REV); gpu_read 353 drivers/gpu/drm/etnaviv/etnaviv_gpu.c u32 chipDate = gpu_read(gpu, VIVS_HI_CHIP_DATE); gpu_read 354 drivers/gpu/drm/etnaviv/etnaviv_gpu.c u32 chipTime = gpu_read(gpu, VIVS_HI_CHIP_TIME); gpu_read 389 drivers/gpu/drm/etnaviv/etnaviv_gpu.c gpu->identity.features = gpu_read(gpu, VIVS_HI_CHIP_FEATURE); gpu_read 412 drivers/gpu/drm/etnaviv/etnaviv_gpu.c gpu_read(gpu, VIVS_HI_CHIP_MINOR_FEATURE_0); gpu_read 417 drivers/gpu/drm/etnaviv/etnaviv_gpu.c gpu_read(gpu, VIVS_HI_CHIP_MINOR_FEATURE_1); gpu_read 419 drivers/gpu/drm/etnaviv/etnaviv_gpu.c gpu_read(gpu, VIVS_HI_CHIP_MINOR_FEATURE_2); gpu_read 421 drivers/gpu/drm/etnaviv/etnaviv_gpu.c gpu_read(gpu, VIVS_HI_CHIP_MINOR_FEATURE_3); gpu_read 423 drivers/gpu/drm/etnaviv/etnaviv_gpu.c gpu_read(gpu, VIVS_HI_CHIP_MINOR_FEATURE_4); gpu_read 425 drivers/gpu/drm/etnaviv/etnaviv_gpu.c gpu_read(gpu, VIVS_HI_CHIP_MINOR_FEATURE_5); gpu_read 459 drivers/gpu/drm/etnaviv/etnaviv_gpu.c u32 clock = gpu_read(gpu, VIVS_HI_CLOCK_CONTROL); gpu_read 507 drivers/gpu/drm/etnaviv/etnaviv_gpu.c idle = gpu_read(gpu, VIVS_HI_IDLE_STATE); gpu_read 516 drivers/gpu/drm/etnaviv/etnaviv_gpu.c control = gpu_read(gpu, VIVS_HI_CLOCK_CONTROL); gpu_read 534 drivers/gpu/drm/etnaviv/etnaviv_gpu.c idle = gpu_read(gpu, VIVS_HI_IDLE_STATE); gpu_read 535 drivers/gpu/drm/etnaviv/etnaviv_gpu.c control = gpu_read(gpu, VIVS_HI_CLOCK_CONTROL); gpu_read 556 drivers/gpu/drm/etnaviv/etnaviv_gpu.c ppc = gpu_read(gpu, VIVS_PM_POWER_CONTROLS); gpu_read 566 drivers/gpu/drm/etnaviv/etnaviv_gpu.c pmc = gpu_read(gpu, VIVS_PM_MODULE_CONTROLS); gpu_read 651 drivers/gpu/drm/etnaviv/etnaviv_gpu.c pulse_eater = gpu_read(gpu, VIVS_PM_PULSE_EATER); gpu_read 662 drivers/gpu/drm/etnaviv/etnaviv_gpu.c gpu_read(gpu, VIVS_HI_CHIP_TIME) != 0x2062400) { gpu_read 665 drivers/gpu/drm/etnaviv/etnaviv_gpu.c mc_memory_debug = gpu_read(gpu, VIVS_MC_DEBUG_MEMORY) & ~0xff; gpu_read 688 drivers/gpu/drm/etnaviv/etnaviv_gpu.c u32 bus_config = gpu_read(gpu, VIVS_MC_BUS_CONFIG); gpu_read 697 drivers/gpu/drm/etnaviv/etnaviv_gpu.c u32 val = gpu_read(gpu, VIVS_MMUv2_AHB_CONTROL); gpu_read 820 drivers/gpu/drm/etnaviv/etnaviv_gpu.c debug->address[0] = gpu_read(gpu, VIVS_FE_DMA_ADDRESS); gpu_read 821 drivers/gpu/drm/etnaviv/etnaviv_gpu.c debug->state[0] = gpu_read(gpu, VIVS_FE_DMA_DEBUG_STATE); gpu_read 824 drivers/gpu/drm/etnaviv/etnaviv_gpu.c debug->address[1] = gpu_read(gpu, VIVS_FE_DMA_ADDRESS); gpu_read 825 drivers/gpu/drm/etnaviv/etnaviv_gpu.c debug->state[1] = gpu_read(gpu, VIVS_FE_DMA_DEBUG_STATE); gpu_read 847 drivers/gpu/drm/etnaviv/etnaviv_gpu.c dma_lo = gpu_read(gpu, VIVS_FE_DMA_LOW); gpu_read 848 drivers/gpu/drm/etnaviv/etnaviv_gpu.c dma_hi = gpu_read(gpu, VIVS_FE_DMA_HIGH); gpu_read 849 drivers/gpu/drm/etnaviv/etnaviv_gpu.c axi = gpu_read(gpu, VIVS_HI_AXI_STATUS); gpu_read 850 drivers/gpu/drm/etnaviv/etnaviv_gpu.c idle = gpu_read(gpu, VIVS_HI_IDLE_STATE); gpu_read 937 drivers/gpu/drm/etnaviv/etnaviv_gpu.c u32 read0 = gpu_read(gpu, VIVS_MC_DEBUG_READ0); gpu_read 938 drivers/gpu/drm/etnaviv/etnaviv_gpu.c u32 read1 = gpu_read(gpu, VIVS_MC_DEBUG_READ1); gpu_read 939 drivers/gpu/drm/etnaviv/etnaviv_gpu.c u32 write = gpu_read(gpu, VIVS_MC_DEBUG_WRITE); gpu_read 1223 drivers/gpu/drm/etnaviv/etnaviv_gpu.c val = gpu_read(gpu, VIVS_PM_POWER_CONTROLS); gpu_read 1228 drivers/gpu/drm/etnaviv/etnaviv_gpu.c val = gpu_read(gpu, VIVS_HI_CLOCK_CONTROL); gpu_read 1251 drivers/gpu/drm/etnaviv/etnaviv_gpu.c val = gpu_read(gpu, VIVS_HI_CLOCK_CONTROL); gpu_read 1256 drivers/gpu/drm/etnaviv/etnaviv_gpu.c val = gpu_read(gpu, VIVS_PM_POWER_CONTROLS); gpu_read 1342 drivers/gpu/drm/etnaviv/etnaviv_gpu.c u32 addr = gpu_read(gpu, VIVS_FE_DMA_ADDRESS); gpu_read 1362 drivers/gpu/drm/etnaviv/etnaviv_gpu.c status = gpu_read(gpu, status_reg); gpu_read 1377 drivers/gpu/drm/etnaviv/etnaviv_gpu.c gpu_read(gpu, address_reg)); gpu_read 1386 drivers/gpu/drm/etnaviv/etnaviv_gpu.c u32 intr = gpu_read(gpu, VIVS_HI_INTR_ACKNOWLEDGE); gpu_read 1506 drivers/gpu/drm/etnaviv/etnaviv_gpu.c u32 idle = gpu_read(gpu, VIVS_HI_IDLE_STATE); gpu_read 1809 drivers/gpu/drm/etnaviv/etnaviv_gpu.c idle = gpu_read(gpu, VIVS_HI_IDLE_STATE) & mask; gpu_read 172 drivers/gpu/drm/etnaviv/etnaviv_iommu_v2.c if (gpu_read(gpu, VIVS_MMUv2_CONTROL) & VIVS_MMUv2_CONTROL_ENABLE) gpu_read 192 drivers/gpu/drm/etnaviv/etnaviv_iommu_v2.c if (gpu_read(gpu, VIVS_MMUv2_SEC_CONTROL) & VIVS_MMUv2_SEC_CONTROL_ENABLE) gpu_read 46 drivers/gpu/drm/etnaviv/etnaviv_perfmon.c return gpu_read(gpu, domain->profile_read); gpu_read 53 drivers/gpu/drm/etnaviv/etnaviv_perfmon.c u32 clock = gpu_read(gpu, VIVS_HI_CLOCK_CONTROL); gpu_read 62 drivers/gpu/drm/etnaviv/etnaviv_perfmon.c value += gpu_read(gpu, domain->profile_read); gpu_read 84 drivers/gpu/drm/etnaviv/etnaviv_perfmon.c return gpu_read(gpu, reg); gpu_read 98 drivers/gpu/drm/etnaviv/etnaviv_perfmon.c return gpu_read(gpu, reg); gpu_read 104 drivers/gpu/drm/etnaviv/etnaviv_sched.c dma_addr = gpu_read(gpu, VIVS_FE_DMA_ADDRESS); gpu_read 209 drivers/gpu/drm/msm/adreno/a2xx_gpu.c gpu_read(gpu, REG_AXXX_CP_SCRATCH_REG0 + i)); gpu_read 217 drivers/gpu/drm/msm/adreno/a2xx_gpu.c gpu_read(gpu, REG_A2XX_RBBM_SOFT_RESET); gpu_read 241 drivers/gpu/drm/msm/adreno/a2xx_gpu.c if (spin_until(!(gpu_read(gpu, REG_A2XX_RBBM_STATUS) & gpu_read 256 drivers/gpu/drm/msm/adreno/a2xx_gpu.c mstatus = gpu_read(gpu, REG_A2XX_MASTER_INT_SIGNAL); gpu_read 259 drivers/gpu/drm/msm/adreno/a2xx_gpu.c status = gpu_read(gpu, REG_A2XX_MH_INTERRUPT_STATUS); gpu_read 263 drivers/gpu/drm/msm/adreno/a2xx_gpu.c gpu_read(gpu, REG_A2XX_MH_MMU_PAGE_FAULT)); gpu_read 269 drivers/gpu/drm/msm/adreno/a2xx_gpu.c status = gpu_read(gpu, REG_AXXX_CP_INT_STATUS); gpu_read 279 drivers/gpu/drm/msm/adreno/a2xx_gpu.c status = gpu_read(gpu, REG_A2XX_RBBM_INT_STATUS); gpu_read 386 drivers/gpu/drm/msm/adreno/a2xx_gpu.c gpu_read(gpu, REG_A2XX_RBBM_STATUS)); gpu_read 399 drivers/gpu/drm/msm/adreno/a2xx_gpu.c state->rbbm_status = gpu_read(gpu, REG_A2XX_RBBM_STATUS); gpu_read 299 drivers/gpu/drm/msm/adreno/a3xx_gpu.c gpu_read(gpu, REG_AXXX_CP_SCRATCH_REG0 + i)); gpu_read 307 drivers/gpu/drm/msm/adreno/a3xx_gpu.c gpu_read(gpu, REG_A3XX_RBBM_SW_RESET_CMD); gpu_read 336 drivers/gpu/drm/msm/adreno/a3xx_gpu.c if (spin_until(!(gpu_read(gpu, REG_A3XX_RBBM_STATUS) & gpu_read 351 drivers/gpu/drm/msm/adreno/a3xx_gpu.c status = gpu_read(gpu, REG_A3XX_RBBM_INT_0_STATUS); gpu_read 405 drivers/gpu/drm/msm/adreno/a3xx_gpu.c gpu_read(gpu, REG_A3XX_RBBM_STATUS)); gpu_read 418 drivers/gpu/drm/msm/adreno/a3xx_gpu.c state->rbbm_status = gpu_read(gpu, REG_A3XX_RBBM_STATUS); gpu_read 228 drivers/gpu/drm/msm/adreno/a4xx_gpu.c val = gpu_read(gpu, REG_A4XX_RBBM_CLOCK_DELAY_HLSQ); gpu_read 299 drivers/gpu/drm/msm/adreno/a4xx_gpu.c gpu_read(gpu, REG_AXXX_CP_SCRATCH_REG0 + i)); gpu_read 307 drivers/gpu/drm/msm/adreno/a4xx_gpu.c gpu_read(gpu, REG_A4XX_RBBM_SW_RESET_CMD); gpu_read 336 drivers/gpu/drm/msm/adreno/a4xx_gpu.c if (spin_until(!(gpu_read(gpu, REG_A4XX_RBBM_STATUS) & gpu_read 350 drivers/gpu/drm/msm/adreno/a4xx_gpu.c status = gpu_read(gpu, REG_A4XX_RBBM_INT_0_STATUS); gpu_read 354 drivers/gpu/drm/msm/adreno/a4xx_gpu.c uint32_t reg = gpu_read(gpu, REG_A4XX_CP_PROTECT_STATUS); gpu_read 458 drivers/gpu/drm/msm/adreno/a4xx_gpu.c state->rbbm_status = gpu_read(gpu, REG_A4XX_RBBM_STATUS); gpu_read 477 drivers/gpu/drm/msm/adreno/a4xx_gpu.c gpu_read(gpu, REG_A4XX_RBBM_STATUS)); gpu_read 495 drivers/gpu/drm/msm/adreno/a4xx_gpu.c reg = gpu_read(gpu, REG_A4XX_RBBM_POWER_STATUS); gpu_read 23 drivers/gpu/drm/msm/adreno/a5xx_debugfs.c gpu_read(gpu, REG_A5XX_CP_PFP_STAT_DATA)); gpu_read 38 drivers/gpu/drm/msm/adreno/a5xx_debugfs.c gpu_read(gpu, REG_A5XX_CP_ME_STAT_DATA)); gpu_read 53 drivers/gpu/drm/msm/adreno/a5xx_debugfs.c gpu_read(gpu, REG_A5XX_CP_MEQ_DBG_DATA)); gpu_read 70 drivers/gpu/drm/msm/adreno/a5xx_debugfs.c val[j] = gpu_read(gpu, REG_A5XX_CP_ROQ_DBG_DATA); gpu_read 757 drivers/gpu/drm/msm/adreno/a5xx_gpu.c gpu_read(gpu, REG_A5XX_CP_SCRATCH_REG(i))); gpu_read 764 drivers/gpu/drm/msm/adreno/a5xx_gpu.c gpu_read(gpu, REG_A5XX_RBBM_SW_RESET_CMD); gpu_read 799 drivers/gpu/drm/msm/adreno/a5xx_gpu.c if (gpu_read(gpu, REG_A5XX_RBBM_STATUS) & ~A5XX_RBBM_STATUS_HI_BUSY) gpu_read 806 drivers/gpu/drm/msm/adreno/a5xx_gpu.c return !(gpu_read(gpu, REG_A5XX_RBBM_INT_0_STATUS) & gpu_read 827 drivers/gpu/drm/msm/adreno/a5xx_gpu.c gpu_read(gpu, REG_A5XX_RBBM_STATUS), gpu_read 828 drivers/gpu/drm/msm/adreno/a5xx_gpu.c gpu_read(gpu, REG_A5XX_RBBM_INT_0_STATUS), gpu_read 829 drivers/gpu/drm/msm/adreno/a5xx_gpu.c gpu_read(gpu, REG_A5XX_CP_RB_RPTR), gpu_read 830 drivers/gpu/drm/msm/adreno/a5xx_gpu.c gpu_read(gpu, REG_A5XX_CP_RB_WPTR)); gpu_read 842 drivers/gpu/drm/msm/adreno/a5xx_gpu.c gpu_read(gpu, REG_A5XX_CP_SCRATCH_REG(4)), gpu_read 843 drivers/gpu/drm/msm/adreno/a5xx_gpu.c gpu_read(gpu, REG_A5XX_CP_SCRATCH_REG(5)), gpu_read 844 drivers/gpu/drm/msm/adreno/a5xx_gpu.c gpu_read(gpu, REG_A5XX_CP_SCRATCH_REG(6)), gpu_read 845 drivers/gpu/drm/msm/adreno/a5xx_gpu.c gpu_read(gpu, REG_A5XX_CP_SCRATCH_REG(7))); gpu_read 852 drivers/gpu/drm/msm/adreno/a5xx_gpu.c u32 status = gpu_read(gpu, REG_A5XX_CP_INTERRUPT_STATUS); gpu_read 864 drivers/gpu/drm/msm/adreno/a5xx_gpu.c gpu_read(gpu, REG_A5XX_CP_PFP_STAT_DATA); gpu_read 865 drivers/gpu/drm/msm/adreno/a5xx_gpu.c val = gpu_read(gpu, REG_A5XX_CP_PFP_STAT_DATA); gpu_read 873 drivers/gpu/drm/msm/adreno/a5xx_gpu.c gpu_read(gpu, REG_A5XX_CP_HW_FAULT)); gpu_read 879 drivers/gpu/drm/msm/adreno/a5xx_gpu.c u32 val = gpu_read(gpu, REG_A5XX_CP_PROTECT_STATUS); gpu_read 888 drivers/gpu/drm/msm/adreno/a5xx_gpu.c u32 status = gpu_read(gpu, REG_A5XX_CP_AHB_FAULT); gpu_read 904 drivers/gpu/drm/msm/adreno/a5xx_gpu.c u32 val = gpu_read(gpu, REG_A5XX_RBBM_AHB_ERROR_STATUS); gpu_read 925 drivers/gpu/drm/msm/adreno/a5xx_gpu.c gpu_read(gpu, REG_A5XX_RBBM_AHB_ME_SPLIT_STATUS)); gpu_read 929 drivers/gpu/drm/msm/adreno/a5xx_gpu.c gpu_read(gpu, REG_A5XX_RBBM_AHB_PFP_SPLIT_STATUS)); gpu_read 933 drivers/gpu/drm/msm/adreno/a5xx_gpu.c gpu_read(gpu, REG_A5XX_RBBM_AHB_ETS_SPLIT_STATUS)); gpu_read 944 drivers/gpu/drm/msm/adreno/a5xx_gpu.c uint64_t addr = (uint64_t) gpu_read(gpu, REG_A5XX_UCHE_TRAP_LOG_HI); gpu_read 946 drivers/gpu/drm/msm/adreno/a5xx_gpu.c addr |= gpu_read(gpu, REG_A5XX_UCHE_TRAP_LOG_LO); gpu_read 965 drivers/gpu/drm/msm/adreno/a5xx_gpu.c gpu_read(gpu, REG_A5XX_RBBM_STATUS), gpu_read 966 drivers/gpu/drm/msm/adreno/a5xx_gpu.c gpu_read(gpu, REG_A5XX_CP_RB_RPTR), gpu_read 967 drivers/gpu/drm/msm/adreno/a5xx_gpu.c gpu_read(gpu, REG_A5XX_CP_RB_WPTR), gpu_read 969 drivers/gpu/drm/msm/adreno/a5xx_gpu.c gpu_read(gpu, REG_A5XX_CP_IB1_BUFSZ), gpu_read 971 drivers/gpu/drm/msm/adreno/a5xx_gpu.c gpu_read(gpu, REG_A5XX_CP_IB2_BUFSZ)); gpu_read 989 drivers/gpu/drm/msm/adreno/a5xx_gpu.c u32 status = gpu_read(gpu, REG_A5XX_RBBM_INT_0_STATUS); gpu_read 1070 drivers/gpu/drm/msm/adreno/a5xx_gpu.c gpu_read(gpu, REG_A5XX_RBBM_STATUS)); gpu_read 1094 drivers/gpu/drm/msm/adreno/a5xx_gpu.c gpu_read(gpu, REG_A5XX_GPMU_RBCCU_PWR_CLK_STATUS)); gpu_read 1113 drivers/gpu/drm/msm/adreno/a5xx_gpu.c spin_until((gpu_read(gpu, REG_A5XX_VBIF_XIN_HALT_CTRL1) & 0xF) == 0xF); gpu_read 1276 drivers/gpu/drm/msm/adreno/a5xx_gpu.c a5xx_state->base.rbbm_status = gpu_read(gpu, REG_A5XX_RBBM_STATUS); gpu_read 135 drivers/gpu/drm/msm/adreno/a5xx_gpu.h if ((gpu_read(gpu, reg) & mask) == value) gpu_read 267 drivers/gpu/drm/msm/adreno/a5xx_power.c u32 val = gpu_read(gpu, REG_A5XX_GPMU_GENERAL_1); gpu_read 179 drivers/gpu/drm/msm/adreno/a5xx_preempt.c status = gpu_read(gpu, REG_A5XX_CP_CONTEXT_SWITCH_CNTL); gpu_read 806 drivers/gpu/drm/msm/adreno/a6xx_gmu.c spin_until((gpu_read(gpu, REG_A6XX_VBIF_XIN_HALT_CTRL1) & 0xf) gpu_read 25 drivers/gpu/drm/msm/adreno/a6xx_gpu.c if (gpu_read(gpu, REG_A6XX_RBBM_STATUS) & gpu_read 29 drivers/gpu/drm/msm/adreno/a6xx_gpu.c return !(gpu_read(gpu, REG_A6XX_RBBM_INT_0_STATUS) & gpu_read 42 drivers/gpu/drm/msm/adreno/a6xx_gpu.c gpu_read(gpu, REG_A6XX_RBBM_STATUS), gpu_read 43 drivers/gpu/drm/msm/adreno/a6xx_gpu.c gpu_read(gpu, REG_A6XX_RBBM_INT_0_STATUS), gpu_read 44 drivers/gpu/drm/msm/adreno/a6xx_gpu.c gpu_read(gpu, REG_A6XX_CP_RB_RPTR), gpu_read 45 drivers/gpu/drm/msm/adreno/a6xx_gpu.c gpu_read(gpu, REG_A6XX_CP_RB_WPTR)); gpu_read 273 drivers/gpu/drm/msm/adreno/a6xx_gpu.c val = gpu_read(gpu, REG_A6XX_RBBM_CLOCK_CNTL); gpu_read 571 drivers/gpu/drm/msm/adreno/a6xx_gpu.c gpu_read(gpu, REG_A6XX_RBBM_STATUS)); gpu_read 588 drivers/gpu/drm/msm/adreno/a6xx_gpu.c gpu_read(gpu, REG_A6XX_CP_SCRATCH_REG(i))); gpu_read 611 drivers/gpu/drm/msm/adreno/a6xx_gpu.c gpu_read(gpu, REG_A6XX_CP_SCRATCH_REG(4)), gpu_read 612 drivers/gpu/drm/msm/adreno/a6xx_gpu.c gpu_read(gpu, REG_A6XX_CP_SCRATCH_REG(5)), gpu_read 613 drivers/gpu/drm/msm/adreno/a6xx_gpu.c gpu_read(gpu, REG_A6XX_CP_SCRATCH_REG(6)), gpu_read 614 drivers/gpu/drm/msm/adreno/a6xx_gpu.c gpu_read(gpu, REG_A6XX_CP_SCRATCH_REG(7))); gpu_read 621 drivers/gpu/drm/msm/adreno/a6xx_gpu.c u32 status = gpu_read(gpu, REG_A6XX_CP_INTERRUPT_STATUS); gpu_read 627 drivers/gpu/drm/msm/adreno/a6xx_gpu.c val = gpu_read(gpu, REG_A6XX_CP_SQE_STAT_DATA); gpu_read 639 drivers/gpu/drm/msm/adreno/a6xx_gpu.c gpu_read(gpu, REG_A6XX_CP_HW_FAULT)); gpu_read 642 drivers/gpu/drm/msm/adreno/a6xx_gpu.c u32 val = gpu_read(gpu, REG_A6XX_CP_PROTECT_STATUS); gpu_read 678 drivers/gpu/drm/msm/adreno/a6xx_gpu.c gpu_read(gpu, REG_A6XX_RBBM_STATUS), gpu_read 679 drivers/gpu/drm/msm/adreno/a6xx_gpu.c gpu_read(gpu, REG_A6XX_CP_RB_RPTR), gpu_read 680 drivers/gpu/drm/msm/adreno/a6xx_gpu.c gpu_read(gpu, REG_A6XX_CP_RB_WPTR), gpu_read 682 drivers/gpu/drm/msm/adreno/a6xx_gpu.c gpu_read(gpu, REG_A6XX_CP_IB1_REM_SIZE), gpu_read 684 drivers/gpu/drm/msm/adreno/a6xx_gpu.c gpu_read(gpu, REG_A6XX_CP_IB2_REM_SIZE)); gpu_read 694 drivers/gpu/drm/msm/adreno/a6xx_gpu.c u32 status = gpu_read(gpu, REG_A6XX_RBBM_INT_0_STATUS); gpu_read 170 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c data[0] = gpu_read(gpu, REG_A6XX_DBGC_CFG_DBGBUS_TRACE_BUF2); gpu_read 171 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c data[1] = gpu_read(gpu, REG_A6XX_DBGC_CFG_DBGBUS_TRACE_BUF1); gpu_read 213 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c data[i] = gpu_read(gpu, REG_A6XX_VBIF_TEST_BUS_OUT); gpu_read 243 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c clk = gpu_read(gpu, REG_A6XX_VBIF_CLKON); gpu_read 711 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c obj->data[index++] = gpu_read(gpu, gpu_read 826 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c obj->data[i] = gpu_read(gpu, indexed->data); gpu_read 846 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c mempool_size = gpu_read(gpu, REG_A6XX_CP_MEM_POOL_SIZE); gpu_read 578 drivers/gpu/drm/msm/adreno/adreno_gpu.c state->registers[pos++] = gpu_read(gpu, addr); gpu_read 796 drivers/gpu/drm/msm/adreno/adreno_gpu.c uint32_t val = gpu_read(gpu, addr); gpu_read 341 drivers/gpu/drm/msm/adreno/adreno_gpu.h val = gpu_read(&gpu->base, reg - 1); gpu_read 562 drivers/gpu/drm/msm/msm_gpu.c current_cntrs[i] = gpu_read(gpu, gpu->perfcntrs[i].sample_reg); gpu_read 226 drivers/gpu/drm/msm/msm_gpu.h uint32_t val = gpu_read(gpu, reg); gpu_read 24 drivers/gpu/drm/panfrost/panfrost_gpu.c u32 state = gpu_read(pfdev, GPU_INT_STAT); gpu_read 25 drivers/gpu/drm/panfrost/panfrost_gpu.c u32 fault_status = gpu_read(pfdev, GPU_FAULT_STATUS); gpu_read 31 drivers/gpu/drm/panfrost/panfrost_gpu.c u64 address = (u64) gpu_read(pfdev, GPU_FAULT_ADDRESS_HI) << 32; gpu_read 32 drivers/gpu/drm/panfrost/panfrost_gpu.c address |= gpu_read(pfdev, GPU_FAULT_ADDRESS_LO); gpu_read 106 drivers/gpu/drm/panfrost/panfrost_gpu.c quirks = gpu_read(pfdev, GPU_TILER_CONFIG); gpu_read 115 drivers/gpu/drm/panfrost/panfrost_gpu.c quirks = gpu_read(pfdev, GPU_L2_MMU_CONFIG); gpu_read 205 drivers/gpu/drm/panfrost/panfrost_gpu.c pfdev->features.l2_features = gpu_read(pfdev, GPU_L2_FEATURES); gpu_read 206 drivers/gpu/drm/panfrost/panfrost_gpu.c pfdev->features.core_features = gpu_read(pfdev, GPU_CORE_FEATURES); gpu_read 207 drivers/gpu/drm/panfrost/panfrost_gpu.c pfdev->features.tiler_features = gpu_read(pfdev, GPU_TILER_FEATURES); gpu_read 208 drivers/gpu/drm/panfrost/panfrost_gpu.c pfdev->features.mem_features = gpu_read(pfdev, GPU_MEM_FEATURES); gpu_read 209 drivers/gpu/drm/panfrost/panfrost_gpu.c pfdev->features.mmu_features = gpu_read(pfdev, GPU_MMU_FEATURES); gpu_read 210 drivers/gpu/drm/panfrost/panfrost_gpu.c pfdev->features.thread_features = gpu_read(pfdev, GPU_THREAD_FEATURES); gpu_read 211 drivers/gpu/drm/panfrost/panfrost_gpu.c pfdev->features.max_threads = gpu_read(pfdev, GPU_THREAD_MAX_THREADS); gpu_read 212 drivers/gpu/drm/panfrost/panfrost_gpu.c pfdev->features.thread_max_workgroup_sz = gpu_read(pfdev, GPU_THREAD_MAX_WORKGROUP_SIZE); gpu_read 213 drivers/gpu/drm/panfrost/panfrost_gpu.c pfdev->features.thread_max_barrier_sz = gpu_read(pfdev, GPU_THREAD_MAX_BARRIER_SIZE); gpu_read 214 drivers/gpu/drm/panfrost/panfrost_gpu.c pfdev->features.coherency_features = gpu_read(pfdev, GPU_COHERENCY_FEATURES); gpu_read 216 drivers/gpu/drm/panfrost/panfrost_gpu.c pfdev->features.texture_features[i] = gpu_read(pfdev, GPU_TEXTURE_FEATURES(i)); gpu_read 218 drivers/gpu/drm/panfrost/panfrost_gpu.c pfdev->features.as_present = gpu_read(pfdev, GPU_AS_PRESENT); gpu_read 220 drivers/gpu/drm/panfrost/panfrost_gpu.c pfdev->features.js_present = gpu_read(pfdev, GPU_JS_PRESENT); gpu_read 223 drivers/gpu/drm/panfrost/panfrost_gpu.c pfdev->features.js_features[i] = gpu_read(pfdev, GPU_JS_FEATURES(i)); gpu_read 225 drivers/gpu/drm/panfrost/panfrost_gpu.c pfdev->features.shader_present = gpu_read(pfdev, GPU_SHADER_PRESENT_LO); gpu_read 226 drivers/gpu/drm/panfrost/panfrost_gpu.c pfdev->features.shader_present |= (u64)gpu_read(pfdev, GPU_SHADER_PRESENT_HI) << 32; gpu_read 228 drivers/gpu/drm/panfrost/panfrost_gpu.c pfdev->features.tiler_present = gpu_read(pfdev, GPU_TILER_PRESENT_LO); gpu_read 229 drivers/gpu/drm/panfrost/panfrost_gpu.c pfdev->features.tiler_present |= (u64)gpu_read(pfdev, GPU_TILER_PRESENT_HI) << 32; gpu_read 231 drivers/gpu/drm/panfrost/panfrost_gpu.c pfdev->features.l2_present = gpu_read(pfdev, GPU_L2_PRESENT_LO); gpu_read 232 drivers/gpu/drm/panfrost/panfrost_gpu.c pfdev->features.l2_present |= (u64)gpu_read(pfdev, GPU_L2_PRESENT_HI) << 32; gpu_read 235 drivers/gpu/drm/panfrost/panfrost_gpu.c pfdev->features.stack_present = gpu_read(pfdev, GPU_STACK_PRESENT_LO); gpu_read 236 drivers/gpu/drm/panfrost/panfrost_gpu.c pfdev->features.stack_present |= (u64)gpu_read(pfdev, GPU_STACK_PRESENT_HI) << 32; gpu_read 238 drivers/gpu/drm/panfrost/panfrost_gpu.c pfdev->features.thread_tls_alloc = gpu_read(pfdev, GPU_THREAD_TLS_ALLOC); gpu_read 240 drivers/gpu/drm/panfrost/panfrost_gpu.c gpu_id = gpu_read(pfdev, GPU_ID); gpu_read 374 drivers/gpu/drm/panfrost/panfrost_gpu.c return gpu_read(pfdev, GPU_LATEST_FLUSH_ID);