gptu_w32           76 arch/mips/lantiq/xway/gptu.c 	gptu_w32(1 << timer, GPTU_IRNCR);
gptu_w32           82 arch/mips/lantiq/xway/gptu.c 	gptu_w32(0x00, GPTU_IRNEN);
gptu_w32           83 arch/mips/lantiq/xway/gptu.c 	gptu_w32(0xff, GPTU_IRNCR);
gptu_w32           84 arch/mips/lantiq/xway/gptu.c 	gptu_w32(CLC_RMC | CLC_SUSPEND, GPTU_CLC);
gptu_w32           89 arch/mips/lantiq/xway/gptu.c 	gptu_w32(0x00, GPTU_IRNEN);
gptu_w32           90 arch/mips/lantiq/xway/gptu.c 	gptu_w32(0xff, GPTU_IRNCR);
gptu_w32           91 arch/mips/lantiq/xway/gptu.c 	gptu_w32(CLC_DISABLE, GPTU_CLC);
gptu_w32          103 arch/mips/lantiq/xway/gptu.c 	gptu_w32(CON_CNT | CON_EDGE_ANY | CON_SYNC | CON_CLK_INT,
gptu_w32          105 arch/mips/lantiq/xway/gptu.c 	gptu_w32(1, GPTU_RLD(clk->bits));
gptu_w32          106 arch/mips/lantiq/xway/gptu.c 	gptu_w32(gptu_r32(GPTU_IRNEN) | BIT(clk->bits), GPTU_IRNEN);
gptu_w32          107 arch/mips/lantiq/xway/gptu.c 	gptu_w32(RUN_SEN | RUN_RL, GPTU_RUN(clk->bits));
gptu_w32          113 arch/mips/lantiq/xway/gptu.c 	gptu_w32(0, GPTU_RUN(clk->bits));
gptu_w32          114 arch/mips/lantiq/xway/gptu.c 	gptu_w32(0, GPTU_CON(clk->bits));
gptu_w32          115 arch/mips/lantiq/xway/gptu.c 	gptu_w32(0, GPTU_RLD(clk->bits));
gptu_w32          116 arch/mips/lantiq/xway/gptu.c 	gptu_w32(gptu_r32(GPTU_IRNEN) & ~BIT(clk->bits), GPTU_IRNEN);