gm200_secboot      40 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm200.c 	struct gm200_secboot *gsb = gm200_secboot(sb);
gm200_secboot     107 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm200.c 	struct gm200_secboot *gsb = gm200_secboot(sb);
gm200_secboot     152 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm200.c 	struct gm200_secboot *gsb = gm200_secboot(sb);
gm200_secboot     165 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm200.c gm200_secboot = {
gm200_secboot     177 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm200.c 	struct gm200_secboot *gsb;
gm200_secboot     192 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm200.c 	ret = nvkm_secboot_ctor(&gm200_secboot, acr, device, index, &gsb->base);
gm200_secboot      35 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm200.h #define gm200_secboot(sb) container_of(sb, struct gm200_secboot, base)
gm200_secboot      44 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm200.h int gm20b_secboot_tegra_read_wpr(struct gm200_secboot *, u32);
gm200_secboot      42 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c gm20b_secboot_tegra_read_wpr(struct gm200_secboot *gsb, u32 mc_base)
gm200_secboot      75 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c gm20b_secboot_tegra_read_wpr(struct gm200_secboot *gsb, u32 mc_base)
gm200_secboot      85 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c 	struct gm200_secboot *gsb = gm200_secboot(sb);
gm200_secboot     108 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm20b.c 	struct gm200_secboot *gsb;
gm200_secboot     149 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gp102.c 	struct gm200_secboot *gsb;
gm200_secboot      29 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gp108.c 	struct gm200_secboot *gsb;
gm200_secboot      31 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gp10b.c 	struct gm200_secboot *gsb = gm200_secboot(sb);
gm200_secboot      54 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gp10b.c 	struct gm200_secboot *gsb;