gic_base          191 arch/mips/include/asm/mips-cm.h GCR_ACCESSOR_RW(64, 0x080, gic_base)
gic_base           70 drivers/irqchip/irq-gic.c 	union gic_base dist_base;
gic_base           71 drivers/irqchip/irq-gic.c 	union gic_base cpu_base;
gic_base           87 drivers/irqchip/irq-gic.c 	void __iomem *(*get_base)(union gic_base *);
gic_base          128 drivers/irqchip/irq-gic.c static void __iomem *gic_get_percpu_base(union gic_base *base)
gic_base          133 drivers/irqchip/irq-gic.c static void __iomem *gic_get_common_base(union gic_base *base)
gic_base          149 drivers/irqchip/irq-gic.c 					 void __iomem *(*f)(union gic_base *))
gic_base          676 drivers/irqchip/irq-mips-gic.c 	phys_addr_t gic_base;
gic_base          699 drivers/irqchip/irq-mips-gic.c 			gic_base = read_gcr_gic_base() &
gic_base          703 drivers/irqchip/irq-mips-gic.c 				&gic_base);
gic_base          709 drivers/irqchip/irq-mips-gic.c 		gic_base = res.start;
gic_base          714 drivers/irqchip/irq-mips-gic.c 		write_gcr_gic_base(gic_base | CM_GCR_GIC_BASE_GICEN);
gic_base          719 drivers/irqchip/irq-mips-gic.c 	mips_gic_base = ioremap_nocache(gic_base, gic_len);