gb_addr_config    118 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c 	config->gb_addr_config = adev->gfx.config.gb_addr_config;
gb_addr_config    156 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c 	config->gb_addr_config = adev->gfx.config.gb_addr_config;
gb_addr_config    111 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c 	config->gb_addr_config = adev->gfx.config.gb_addr_config;
gb_addr_config     71 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c 	config->gb_addr_config = adev->gfx.config.gb_addr_config;
gb_addr_config    507 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c 	config[no_regs++] = adev->gfx.config.gb_addr_config;
gb_addr_config    149 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h 	unsigned gb_addr_config;
gb_addr_config    157 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h 	struct gb_addr_config gb_addr_config_fields;
gb_addr_config   1062 drivers/gpu/drm/amd/amdgpu/cik.c 			return adev->gfx.config.gb_addr_config;
gb_addr_config    456 drivers/gpu/drm/amd/amdgpu/cik_sdma.c 		       adev->gfx.config.gb_addr_config & 0x70);
gb_addr_config   1196 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c 	u32 gb_addr_config;
gb_addr_config   1209 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c 		gb_addr_config = RREG32_SOC15(GC, 0, mmGB_ADDR_CONFIG);
gb_addr_config   1216 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c 	adev->gfx.config.gb_addr_config = gb_addr_config;
gb_addr_config   1219 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c 			REG_GET_FIELD(adev->gfx.config.gb_addr_config,
gb_addr_config   1226 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c 			REG_GET_FIELD(adev->gfx.config.gb_addr_config,
gb_addr_config   1229 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c 			REG_GET_FIELD(adev->gfx.config.gb_addr_config,
gb_addr_config   1232 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c 			REG_GET_FIELD(adev->gfx.config.gb_addr_config,
gb_addr_config   1235 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c 			REG_GET_FIELD(adev->gfx.config.gb_addr_config,
gb_addr_config   1578 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 	u32 gb_addr_config = 0;
gb_addr_config   1600 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 		gb_addr_config = TAHITI_GB_ADDR_CONFIG_GOLDEN;
gb_addr_config   1617 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 		gb_addr_config = TAHITI_GB_ADDR_CONFIG_GOLDEN;
gb_addr_config   1634 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 		gb_addr_config = VERDE_GB_ADDR_CONFIG_GOLDEN;
gb_addr_config   1651 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 		gb_addr_config = VERDE_GB_ADDR_CONFIG_GOLDEN;
gb_addr_config   1668 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 		gb_addr_config = HAINAN_GB_ADDR_CONFIG_GOLDEN;
gb_addr_config   1695 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 	gb_addr_config &= ~GB_ADDR_CONFIG__ROW_SIZE_MASK;
gb_addr_config   1699 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 		gb_addr_config |= 0 << GB_ADDR_CONFIG__ROW_SIZE__SHIFT;
gb_addr_config   1702 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 		gb_addr_config |= 1 << GB_ADDR_CONFIG__ROW_SIZE__SHIFT;
gb_addr_config   1705 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 		gb_addr_config |= 2 << GB_ADDR_CONFIG__ROW_SIZE__SHIFT;
gb_addr_config   1708 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 	gb_addr_config &= ~GB_ADDR_CONFIG__NUM_SHADER_ENGINES_MASK;
gb_addr_config   1710 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 		gb_addr_config |= 1 << GB_ADDR_CONFIG__NUM_SHADER_ENGINES__SHIFT;
gb_addr_config   1711 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 	adev->gfx.config.gb_addr_config = gb_addr_config;
gb_addr_config   1713 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 	WREG32(mmGB_ADDR_CONFIG, gb_addr_config);
gb_addr_config   1714 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 	WREG32(mmDMIF_ADDR_CONFIG, gb_addr_config);
gb_addr_config   1715 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 	WREG32(mmDMIF_ADDR_CALC, gb_addr_config);
gb_addr_config   1716 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 	WREG32(mmHDP_ADDR_CONFIG, gb_addr_config);
gb_addr_config   1717 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 	WREG32(mmDMA_TILING_CONFIG + DMA0_REGISTER_OFFSET, gb_addr_config);
gb_addr_config   1718 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 	WREG32(mmDMA_TILING_CONFIG + DMA1_REGISTER_OFFSET, gb_addr_config);
gb_addr_config   1722 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 		WREG32(mmUVD_UDEC_ADDR_CONFIG, gb_addr_config);
gb_addr_config   1723 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 		WREG32(mmUVD_UDEC_DB_ADDR_CONFIG, gb_addr_config);
gb_addr_config   1724 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 		WREG32(mmUVD_UDEC_DBW_ADDR_CONFIG, gb_addr_config);
gb_addr_config   1932 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 	WREG32(mmGB_ADDR_CONFIG, adev->gfx.config.gb_addr_config);
gb_addr_config   1933 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 	WREG32(mmHDP_ADDR_CONFIG, adev->gfx.config.gb_addr_config);
gb_addr_config   1934 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 	WREG32(mmDMIF_ADDR_CALC, adev->gfx.config.gb_addr_config);
gb_addr_config   4260 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 	u32 gb_addr_config;
gb_addr_config   4281 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 		gb_addr_config = BONAIRE_GB_ADDR_CONFIG_GOLDEN;
gb_addr_config   4298 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 		gb_addr_config = HAWAII_GB_ADDR_CONFIG_GOLDEN;
gb_addr_config   4315 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 		gb_addr_config = BONAIRE_GB_ADDR_CONFIG_GOLDEN;
gb_addr_config   4334 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 		gb_addr_config = BONAIRE_GB_ADDR_CONFIG_GOLDEN;
gb_addr_config   4382 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 	gb_addr_config &= ~GB_ADDR_CONFIG__ROW_SIZE_MASK;
gb_addr_config   4386 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 		gb_addr_config |= (0 << GB_ADDR_CONFIG__ROW_SIZE__SHIFT);
gb_addr_config   4389 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 		gb_addr_config |= (1 << GB_ADDR_CONFIG__ROW_SIZE__SHIFT);
gb_addr_config   4392 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 		gb_addr_config |= (2 << GB_ADDR_CONFIG__ROW_SIZE__SHIFT);
gb_addr_config   4395 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 	adev->gfx.config.gb_addr_config = gb_addr_config;
gb_addr_config   1712 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 	u32 gb_addr_config;
gb_addr_config   1734 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 		gb_addr_config = TOPAZ_GB_ADDR_CONFIG_GOLDEN;
gb_addr_config   1751 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 		gb_addr_config = TONGA_GB_ADDR_CONFIG_GOLDEN;
gb_addr_config   1766 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 		gb_addr_config = POLARIS11_GB_ADDR_CONFIG_GOLDEN;
gb_addr_config   1781 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 		gb_addr_config = TONGA_GB_ADDR_CONFIG_GOLDEN;
gb_addr_config   1798 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 		gb_addr_config = TONGA_GB_ADDR_CONFIG_GOLDEN;
gb_addr_config   1815 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 		gb_addr_config = CARRIZO_GB_ADDR_CONFIG_GOLDEN;
gb_addr_config   1832 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 		gb_addr_config = CARRIZO_GB_ADDR_CONFIG_GOLDEN;
gb_addr_config   1849 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 		gb_addr_config = TONGA_GB_ADDR_CONFIG_GOLDEN;
gb_addr_config   1900 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 		gb_addr_config = REG_SET_FIELD(gb_addr_config, GB_ADDR_CONFIG, ROW_SIZE, 0);
gb_addr_config   1903 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 		gb_addr_config = REG_SET_FIELD(gb_addr_config, GB_ADDR_CONFIG, ROW_SIZE, 1);
gb_addr_config   1906 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 		gb_addr_config = REG_SET_FIELD(gb_addr_config, GB_ADDR_CONFIG, ROW_SIZE, 2);
gb_addr_config   1909 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 	adev->gfx.config.gb_addr_config = gb_addr_config;
gb_addr_config   3790 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 	WREG32(mmGB_ADDR_CONFIG, adev->gfx.config.gb_addr_config);
gb_addr_config   3791 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 	WREG32(mmHDP_ADDR_CONFIG, adev->gfx.config.gb_addr_config);
gb_addr_config   3792 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 	WREG32(mmDMIF_ADDR_CALC, adev->gfx.config.gb_addr_config);
gb_addr_config   1859 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 	u32 gb_addr_config;
gb_addr_config   1871 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 		gb_addr_config = VEGA10_GB_ADDR_CONFIG_GOLDEN;
gb_addr_config   1879 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 		gb_addr_config = VEGA12_GB_ADDR_CONFIG_GOLDEN;
gb_addr_config   1888 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 		gb_addr_config = RREG32_SOC15(GC, 0, mmGB_ADDR_CONFIG);
gb_addr_config   1889 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 		gb_addr_config &= ~0xf3e777ff;
gb_addr_config   1890 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 		gb_addr_config |= 0x22014042;
gb_addr_config   1903 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 			gb_addr_config = RAVEN2_GB_ADDR_CONFIG_GOLDEN;
gb_addr_config   1905 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 			gb_addr_config = RAVEN_GB_ADDR_CONFIG_GOLDEN;
gb_addr_config   1913 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 		gb_addr_config = RREG32_SOC15(GC, 0, mmGB_ADDR_CONFIG);
gb_addr_config   1914 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 		gb_addr_config &= ~0xf3e777ff;
gb_addr_config   1915 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 		gb_addr_config |= 0x22014042;
gb_addr_config   1923 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 		gb_addr_config = RREG32_SOC15(GC, 0, mmGB_ADDR_CONFIG);
gb_addr_config   1924 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 		gb_addr_config &= ~0xf3e777ff;
gb_addr_config   1925 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 		gb_addr_config |= 0x22010042;
gb_addr_config   1932 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 	adev->gfx.config.gb_addr_config = gb_addr_config;
gb_addr_config   1936 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 					adev->gfx.config.gb_addr_config,
gb_addr_config   1945 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 					adev->gfx.config.gb_addr_config,
gb_addr_config   1950 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 					adev->gfx.config.gb_addr_config,
gb_addr_config   1955 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 					adev->gfx.config.gb_addr_config,
gb_addr_config   1960 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 					adev->gfx.config.gb_addr_config,
gb_addr_config   1965 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 					adev->gfx.config.gb_addr_config,
gb_addr_config    209 drivers/gpu/drm/amd/amdgpu/nv.c 			return adev->gfx.config.gb_addr_config;
gb_addr_config    433 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c 		       adev->gfx.config.gb_addr_config & 0x70);
gb_addr_config    671 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c 		       adev->gfx.config.gb_addr_config & 0x70);
gb_addr_config   1050 drivers/gpu/drm/amd/amdgpu/si.c 			return adev->gfx.config.gb_addr_config;
gb_addr_config    396 drivers/gpu/drm/amd/amdgpu/soc15.c 			return adev->gfx.config.gb_addr_config;
gb_addr_config    571 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c 	WREG32(mmUVD_UDEC_ADDR_CONFIG, adev->gfx.config.gb_addr_config);
gb_addr_config    572 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c 	WREG32(mmUVD_UDEC_DB_ADDR_CONFIG, adev->gfx.config.gb_addr_config);
gb_addr_config    573 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c 	WREG32(mmUVD_UDEC_DBW_ADDR_CONFIG, adev->gfx.config.gb_addr_config);
gb_addr_config    280 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c 	WREG32(mmUVD_UDEC_ADDR_CONFIG, adev->gfx.config.gb_addr_config);
gb_addr_config    281 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c 	WREG32(mmUVD_UDEC_DB_ADDR_CONFIG, adev->gfx.config.gb_addr_config);
gb_addr_config    282 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c 	WREG32(mmUVD_UDEC_DBW_ADDR_CONFIG, adev->gfx.config.gb_addr_config);
gb_addr_config    606 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c 	WREG32(mmUVD_UDEC_ADDR_CONFIG, adev->gfx.config.gb_addr_config);
gb_addr_config    607 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c 	WREG32(mmUVD_UDEC_DB_ADDR_CONFIG, adev->gfx.config.gb_addr_config);
gb_addr_config    608 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c 	WREG32(mmUVD_UDEC_DBW_ADDR_CONFIG, adev->gfx.config.gb_addr_config);
gb_addr_config    698 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c 				adev->gfx.config.gb_addr_config);
gb_addr_config    700 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c 				adev->gfx.config.gb_addr_config);
gb_addr_config    702 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c 				adev->gfx.config.gb_addr_config);
gb_addr_config    336 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 			adev->gfx.config.gb_addr_config);
gb_addr_config    338 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 			adev->gfx.config.gb_addr_config);
gb_addr_config    340 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 			adev->gfx.config.gb_addr_config);
gb_addr_config    342 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 			adev->gfx.config.gb_addr_config);
gb_addr_config    344 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 			adev->gfx.config.gb_addr_config);
gb_addr_config    346 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 			adev->gfx.config.gb_addr_config);
gb_addr_config    348 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 			adev->gfx.config.gb_addr_config);
gb_addr_config    350 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 			adev->gfx.config.gb_addr_config);
gb_addr_config    352 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 			adev->gfx.config.gb_addr_config);
gb_addr_config    354 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 			adev->gfx.config.gb_addr_config);
gb_addr_config    356 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 			adev->gfx.config.gb_addr_config);
gb_addr_config    358 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 			adev->gfx.config.gb_addr_config);
gb_addr_config    412 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 			adev->gfx.config.gb_addr_config, 0xFFFFFFFF, 0);
gb_addr_config    414 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 			adev->gfx.config.gb_addr_config, 0xFFFFFFFF, 0);
gb_addr_config    416 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 			adev->gfx.config.gb_addr_config, 0xFFFFFFFF, 0);
gb_addr_config    418 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 		adev->gfx.config.gb_addr_config, 0xFFFFFFFF, 0);
gb_addr_config    420 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 		adev->gfx.config.gb_addr_config, 0xFFFFFFFF, 0);
gb_addr_config    422 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 		adev->gfx.config.gb_addr_config, 0xFFFFFFFF, 0);
gb_addr_config    424 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 		adev->gfx.config.gb_addr_config, 0xFFFFFFFF, 0);
gb_addr_config    426 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 		adev->gfx.config.gb_addr_config, 0xFFFFFFFF, 0);
gb_addr_config    428 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 		adev->gfx.config.gb_addr_config, 0xFFFFFFFF, 0);
gb_addr_config    430 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 		adev->gfx.config.gb_addr_config, 0xFFFFFFFF, 0);
gb_addr_config   1067 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 	tmp = adev->gfx.config.gb_addr_config;
gb_addr_config    404 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 	WREG32_SOC15(UVD, 0, mmUVD_GFX10_ADDR_CONFIG, adev->gfx.config.gb_addr_config);
gb_addr_config    405 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 	WREG32_SOC15(UVD, 0, mmJPEG_DEC_GFX10_ADDR_CONFIG, adev->gfx.config.gb_addr_config);
gb_addr_config    498 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 		UVD, 0, mmUVD_GFX10_ADDR_CONFIG), adev->gfx.config.gb_addr_config, 0, indirect);
gb_addr_config    646 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c 			adev->gfx.config.gb_addr_config);
gb_addr_config    648 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c 			adev->gfx.config.gb_addr_config);
gb_addr_config    786 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c 			adev->gfx.config.gb_addr_config);
gb_addr_config    788 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c 			adev->gfx.config.gb_addr_config);
gb_addr_config    586 drivers/gpu/drm/amd/amdgpu/vi.c 			return adev->gfx.config.gb_addr_config;
gb_addr_config   1156 drivers/gpu/drm/amd/amdkfd/kfd_chardev.c 	args->gb_addr_config = config.gb_addr_config;
gb_addr_config    162 drivers/gpu/drm/amd/include/kgd_kfd_interface.h 	uint32_t gb_addr_config;
gb_addr_config   3184 drivers/gpu/drm/radeon/cik.c 	u32 gb_addr_config = RREG32(GB_ADDR_CONFIG);
gb_addr_config   3206 drivers/gpu/drm/radeon/cik.c 		gb_addr_config = BONAIRE_GB_ADDR_CONFIG_GOLDEN;
gb_addr_config   3223 drivers/gpu/drm/radeon/cik.c 		gb_addr_config = HAWAII_GB_ADDR_CONFIG_GOLDEN;
gb_addr_config   3240 drivers/gpu/drm/radeon/cik.c 		gb_addr_config = BONAIRE_GB_ADDR_CONFIG_GOLDEN;
gb_addr_config   3259 drivers/gpu/drm/radeon/cik.c 		gb_addr_config = BONAIRE_GB_ADDR_CONFIG_GOLDEN;
gb_addr_config   3293 drivers/gpu/drm/radeon/cik.c 	gb_addr_config &= ~ROW_SIZE_MASK;
gb_addr_config   3297 drivers/gpu/drm/radeon/cik.c 		gb_addr_config |= ROW_SIZE(0);
gb_addr_config   3300 drivers/gpu/drm/radeon/cik.c 		gb_addr_config |= ROW_SIZE(1);
gb_addr_config   3303 drivers/gpu/drm/radeon/cik.c 		gb_addr_config |= ROW_SIZE(2);
gb_addr_config   3334 drivers/gpu/drm/radeon/cik.c 		((gb_addr_config & PIPE_INTERLEAVE_SIZE_MASK) >> PIPE_INTERLEAVE_SIZE_SHIFT) << 8;
gb_addr_config   3336 drivers/gpu/drm/radeon/cik.c 		((gb_addr_config & ROW_SIZE_MASK) >> ROW_SIZE_SHIFT) << 12;
gb_addr_config   3338 drivers/gpu/drm/radeon/cik.c 	WREG32(GB_ADDR_CONFIG, gb_addr_config);
gb_addr_config   3339 drivers/gpu/drm/radeon/cik.c 	WREG32(HDP_ADDR_CONFIG, gb_addr_config);
gb_addr_config   3340 drivers/gpu/drm/radeon/cik.c 	WREG32(DMIF_ADDR_CALC, gb_addr_config);
gb_addr_config   3341 drivers/gpu/drm/radeon/cik.c 	WREG32(SDMA0_TILING_CONFIG + SDMA0_REGISTER_OFFSET, gb_addr_config & 0x70);
gb_addr_config   3342 drivers/gpu/drm/radeon/cik.c 	WREG32(SDMA0_TILING_CONFIG + SDMA1_REGISTER_OFFSET, gb_addr_config & 0x70);
gb_addr_config   3343 drivers/gpu/drm/radeon/cik.c 	WREG32(UVD_UDEC_ADDR_CONFIG, gb_addr_config);
gb_addr_config   3344 drivers/gpu/drm/radeon/cik.c 	WREG32(UVD_UDEC_DB_ADDR_CONFIG, gb_addr_config);
gb_addr_config   3345 drivers/gpu/drm/radeon/cik.c 	WREG32(UVD_UDEC_DBW_ADDR_CONFIG, gb_addr_config);
gb_addr_config   3135 drivers/gpu/drm/radeon/evergreen.c 	u32 gb_addr_config;
gb_addr_config   3176 drivers/gpu/drm/radeon/evergreen.c 		gb_addr_config = CYPRESS_GB_ADDR_CONFIG_GOLDEN;
gb_addr_config   3198 drivers/gpu/drm/radeon/evergreen.c 		gb_addr_config = JUNIPER_GB_ADDR_CONFIG_GOLDEN;
gb_addr_config   3220 drivers/gpu/drm/radeon/evergreen.c 		gb_addr_config = REDWOOD_GB_ADDR_CONFIG_GOLDEN;
gb_addr_config   3243 drivers/gpu/drm/radeon/evergreen.c 		gb_addr_config = CEDAR_GB_ADDR_CONFIG_GOLDEN;
gb_addr_config   3265 drivers/gpu/drm/radeon/evergreen.c 		gb_addr_config = CEDAR_GB_ADDR_CONFIG_GOLDEN;
gb_addr_config   3293 drivers/gpu/drm/radeon/evergreen.c 		gb_addr_config = SUMO_GB_ADDR_CONFIG_GOLDEN;
gb_addr_config   3315 drivers/gpu/drm/radeon/evergreen.c 		gb_addr_config = SUMO2_GB_ADDR_CONFIG_GOLDEN;
gb_addr_config   3337 drivers/gpu/drm/radeon/evergreen.c 		gb_addr_config = BARTS_GB_ADDR_CONFIG_GOLDEN;
gb_addr_config   3359 drivers/gpu/drm/radeon/evergreen.c 		gb_addr_config = TURKS_GB_ADDR_CONFIG_GOLDEN;
gb_addr_config   3381 drivers/gpu/drm/radeon/evergreen.c 		gb_addr_config = CAICOS_GB_ADDR_CONFIG_GOLDEN;
gb_addr_config   3450 drivers/gpu/drm/radeon/evergreen.c 		((gb_addr_config & 0x30000000) >> 28) << 12;
gb_addr_config   3498 drivers/gpu/drm/radeon/evergreen.c 	WREG32(GB_ADDR_CONFIG, gb_addr_config);
gb_addr_config   3499 drivers/gpu/drm/radeon/evergreen.c 	WREG32(DMIF_ADDR_CONFIG, gb_addr_config);
gb_addr_config   3500 drivers/gpu/drm/radeon/evergreen.c 	WREG32(HDP_ADDR_CONFIG, gb_addr_config);
gb_addr_config   3501 drivers/gpu/drm/radeon/evergreen.c 	WREG32(DMA_TILING_CONFIG, gb_addr_config);
gb_addr_config   3502 drivers/gpu/drm/radeon/evergreen.c 	WREG32(UVD_UDEC_ADDR_CONFIG, gb_addr_config);
gb_addr_config   3503 drivers/gpu/drm/radeon/evergreen.c 	WREG32(UVD_UDEC_DB_ADDR_CONFIG, gb_addr_config);
gb_addr_config   3504 drivers/gpu/drm/radeon/evergreen.c 	WREG32(UVD_UDEC_DBW_ADDR_CONFIG, gb_addr_config);
gb_addr_config   3516 drivers/gpu/drm/radeon/evergreen.c 		tmp = gb_addr_config & NUM_PIPES_MASK;
gb_addr_config    893 drivers/gpu/drm/radeon/ni.c 	u32 gb_addr_config = 0;
gb_addr_config    926 drivers/gpu/drm/radeon/ni.c 		gb_addr_config = CAYMAN_GB_ADDR_CONFIG_GOLDEN;
gb_addr_config   1000 drivers/gpu/drm/radeon/ni.c 		gb_addr_config = ARUBA_GB_ADDR_CONFIG_GOLDEN;
gb_addr_config   1031 drivers/gpu/drm/radeon/ni.c 	tmp = (gb_addr_config & NUM_PIPES_MASK) >> NUM_PIPES_SHIFT;
gb_addr_config   1033 drivers/gpu/drm/radeon/ni.c 	tmp = (gb_addr_config & PIPE_INTERLEAVE_SIZE_MASK) >> PIPE_INTERLEAVE_SIZE_SHIFT;
gb_addr_config   1035 drivers/gpu/drm/radeon/ni.c 	tmp = (gb_addr_config & NUM_SHADER_ENGINES_MASK) >> NUM_SHADER_ENGINES_SHIFT;
gb_addr_config   1037 drivers/gpu/drm/radeon/ni.c 	tmp = (gb_addr_config & NUM_GPUS_MASK) >> NUM_GPUS_SHIFT;
gb_addr_config   1039 drivers/gpu/drm/radeon/ni.c 	tmp = (gb_addr_config & MULTI_GPU_TILE_SIZE_MASK) >> MULTI_GPU_TILE_SIZE_SHIFT;
gb_addr_config   1041 drivers/gpu/drm/radeon/ni.c 	tmp = (gb_addr_config & ROW_SIZE_MASK) >> ROW_SIZE_SHIFT;
gb_addr_config   1087 drivers/gpu/drm/radeon/ni.c 		((gb_addr_config & PIPE_INTERLEAVE_SIZE_MASK) >> PIPE_INTERLEAVE_SIZE_SHIFT) << 8;
gb_addr_config   1089 drivers/gpu/drm/radeon/ni.c 		((gb_addr_config & ROW_SIZE_MASK) >> ROW_SIZE_SHIFT) << 12;
gb_addr_config   1127 drivers/gpu/drm/radeon/ni.c 	WREG32(GB_ADDR_CONFIG, gb_addr_config);
gb_addr_config   1128 drivers/gpu/drm/radeon/ni.c 	WREG32(DMIF_ADDR_CONFIG, gb_addr_config);
gb_addr_config   1130 drivers/gpu/drm/radeon/ni.c 		WREG32(DMIF_ADDR_CALC, gb_addr_config);
gb_addr_config   1131 drivers/gpu/drm/radeon/ni.c 	WREG32(HDP_ADDR_CONFIG, gb_addr_config);
gb_addr_config   1132 drivers/gpu/drm/radeon/ni.c 	WREG32(DMA_TILING_CONFIG + DMA0_REGISTER_OFFSET, gb_addr_config);
gb_addr_config   1133 drivers/gpu/drm/radeon/ni.c 	WREG32(DMA_TILING_CONFIG + DMA1_REGISTER_OFFSET, gb_addr_config);
gb_addr_config   1134 drivers/gpu/drm/radeon/ni.c 	WREG32(UVD_UDEC_ADDR_CONFIG, gb_addr_config);
gb_addr_config   1135 drivers/gpu/drm/radeon/ni.c 	WREG32(UVD_UDEC_DB_ADDR_CONFIG, gb_addr_config);
gb_addr_config   1136 drivers/gpu/drm/radeon/ni.c 	WREG32(UVD_UDEC_DBW_ADDR_CONFIG, gb_addr_config);
gb_addr_config   1148 drivers/gpu/drm/radeon/ni.c 		tmp = gb_addr_config & NUM_PIPES_MASK;
gb_addr_config   3095 drivers/gpu/drm/radeon/si.c 	u32 gb_addr_config = 0;
gb_addr_config   3118 drivers/gpu/drm/radeon/si.c 		gb_addr_config = TAHITI_GB_ADDR_CONFIG_GOLDEN;
gb_addr_config   3135 drivers/gpu/drm/radeon/si.c 		gb_addr_config = TAHITI_GB_ADDR_CONFIG_GOLDEN;
gb_addr_config   3153 drivers/gpu/drm/radeon/si.c 		gb_addr_config = VERDE_GB_ADDR_CONFIG_GOLDEN;
gb_addr_config   3170 drivers/gpu/drm/radeon/si.c 		gb_addr_config = VERDE_GB_ADDR_CONFIG_GOLDEN;
gb_addr_config   3187 drivers/gpu/drm/radeon/si.c 		gb_addr_config = HAINAN_GB_ADDR_CONFIG_GOLDEN;
gb_addr_config   3223 drivers/gpu/drm/radeon/si.c 	gb_addr_config &= ~ROW_SIZE_MASK;
gb_addr_config   3227 drivers/gpu/drm/radeon/si.c 		gb_addr_config |= ROW_SIZE(0);
gb_addr_config   3230 drivers/gpu/drm/radeon/si.c 		gb_addr_config |= ROW_SIZE(1);
gb_addr_config   3233 drivers/gpu/drm/radeon/si.c 		gb_addr_config |= ROW_SIZE(2);
gb_addr_config   3274 drivers/gpu/drm/radeon/si.c 		((gb_addr_config & PIPE_INTERLEAVE_SIZE_MASK) >> PIPE_INTERLEAVE_SIZE_SHIFT) << 8;
gb_addr_config   3276 drivers/gpu/drm/radeon/si.c 		((gb_addr_config & ROW_SIZE_MASK) >> ROW_SIZE_SHIFT) << 12;
gb_addr_config   3278 drivers/gpu/drm/radeon/si.c 	WREG32(GB_ADDR_CONFIG, gb_addr_config);
gb_addr_config   3279 drivers/gpu/drm/radeon/si.c 	WREG32(DMIF_ADDR_CONFIG, gb_addr_config);
gb_addr_config   3280 drivers/gpu/drm/radeon/si.c 	WREG32(DMIF_ADDR_CALC, gb_addr_config);
gb_addr_config   3281 drivers/gpu/drm/radeon/si.c 	WREG32(HDP_ADDR_CONFIG, gb_addr_config);
gb_addr_config   3282 drivers/gpu/drm/radeon/si.c 	WREG32(DMA_TILING_CONFIG + DMA0_REGISTER_OFFSET, gb_addr_config);
gb_addr_config   3283 drivers/gpu/drm/radeon/si.c 	WREG32(DMA_TILING_CONFIG + DMA1_REGISTER_OFFSET, gb_addr_config);
gb_addr_config   3285 drivers/gpu/drm/radeon/si.c 		WREG32(UVD_UDEC_ADDR_CONFIG, gb_addr_config);
gb_addr_config   3286 drivers/gpu/drm/radeon/si.c 		WREG32(UVD_UDEC_DB_ADDR_CONFIG, gb_addr_config);
gb_addr_config   3287 drivers/gpu/drm/radeon/si.c 		WREG32(UVD_UDEC_DBW_ADDR_CONFIG, gb_addr_config);
gb_addr_config    317 include/uapi/linux/kfd_ioctl.h 	__u32 gb_addr_config;	/* from KFD */