fir 96 arch/mips/kernel/cpu-probe.c unsigned long sr, fir, fcsr, fcsr0, fcsr1; fir 101 arch/mips/kernel/cpu-probe.c fir = read_32bit_cp1_register(CP1_REVISION); fir 102 arch/mips/kernel/cpu-probe.c if (fir & MIPS_FPIR_HAS2008) { fir 628 arch/mips/kernel/ptrace.c unsigned int fir; fir 673 arch/mips/kernel/ptrace.c .fir = boot_cpu_data.fpu_id, fir 174 arch/powerpc/include/asm/fsl_lbc.h __be32 fir; /**< Flash Instruction Register */ fir 80 drivers/clk/imx/clk-imx31.c clk[fir] = imx_clk_mux("fir_sel", base + MXC_CCM_CCMR, 11, 2, fir_sel, ARRAY_SIZE(fir_sel)); fir 82 drivers/edac/cell_edac.c u64 fir, addreg, clear = 0; fir 84 drivers/edac/cell_edac.c fir = in_be64(&priv->regs->mic_fir); fir 86 drivers/edac/cell_edac.c if (fir != priv->prev_fir) { fir 87 drivers/edac/cell_edac.c dev_dbg(mci->pdev, "fir change : 0x%016lx\n", fir); fir 88 drivers/edac/cell_edac.c priv->prev_fir = fir; fir 91 drivers/edac/cell_edac.c if ((priv->chanmask & 0x1) && (fir & CBE_MIC_FIR_ECC_SINGLE_0_ERR)) { fir 96 drivers/edac/cell_edac.c if ((priv->chanmask & 0x2) && (fir & CBE_MIC_FIR_ECC_SINGLE_1_ERR)) { fir 101 drivers/edac/cell_edac.c if ((priv->chanmask & 0x1) && (fir & CBE_MIC_FIR_ECC_MULTI_0_ERR)) { fir 106 drivers/edac/cell_edac.c if ((priv->chanmask & 0x2) && (fir & CBE_MIC_FIR_ECC_MULTI_1_ERR)) { fir 114 drivers/edac/cell_edac.c fir &= ~(CBE_MIC_FIR_ECC_ERR_MASK | CBE_MIC_FIR_ECC_SET_MASK); fir 115 drivers/edac/cell_edac.c fir |= CBE_MIC_FIR_ECC_RESET_MASK; fir 116 drivers/edac/cell_edac.c fir &= ~clear; fir 117 drivers/edac/cell_edac.c out_be64(&priv->regs->mic_fir, fir); fir 122 drivers/edac/cell_edac.c fir = in_be64(&priv->regs->mic_fir); fir 123 drivers/edac/cell_edac.c dev_dbg(mci->pdev, "fir clear : 0x%016lx\n", fir); fir 71 drivers/misc/echo/fir.h static inline const int16_t *fir16_create(struct fir16_state_t *fir, fir 74 drivers/misc/echo/fir.h fir->taps = taps; fir 75 drivers/misc/echo/fir.h fir->curr_pos = taps - 1; fir 76 drivers/misc/echo/fir.h fir->coeffs = coeffs; fir 77 drivers/misc/echo/fir.h fir->history = kcalloc(taps, sizeof(int16_t), GFP_KERNEL); fir 78 drivers/misc/echo/fir.h return fir->history; fir 81 drivers/misc/echo/fir.h static inline void fir16_flush(struct fir16_state_t *fir) fir 83 drivers/misc/echo/fir.h memset(fir->history, 0, fir->taps * sizeof(int16_t)); fir 86 drivers/misc/echo/fir.h static inline void fir16_free(struct fir16_state_t *fir) fir 88 drivers/misc/echo/fir.h kfree(fir->history); fir 91 drivers/misc/echo/fir.h static inline int16_t fir16(struct fir16_state_t *fir, int16_t sample) fir 98 drivers/misc/echo/fir.h fir->history[fir->curr_pos] = sample; fir 100 drivers/misc/echo/fir.h offset2 = fir->curr_pos; fir 101 drivers/misc/echo/fir.h offset1 = fir->taps - offset2; fir 103 drivers/misc/echo/fir.h for (i = fir->taps - 1; i >= offset1; i--) fir 104 drivers/misc/echo/fir.h y += fir->coeffs[i] * fir->history[i - offset1]; fir 106 drivers/misc/echo/fir.h y += fir->coeffs[i] * fir->history[i + offset2]; fir 107 drivers/misc/echo/fir.h if (fir->curr_pos <= 0) fir 108 drivers/misc/echo/fir.h fir->curr_pos = fir->taps; fir 109 drivers/misc/echo/fir.h fir->curr_pos--; fir 113 drivers/misc/echo/fir.h static inline const int16_t *fir32_create(struct fir32_state_t *fir, fir 116 drivers/misc/echo/fir.h fir->taps = taps; fir 117 drivers/misc/echo/fir.h fir->curr_pos = taps - 1; fir 118 drivers/misc/echo/fir.h fir->coeffs = coeffs; fir 119 drivers/misc/echo/fir.h fir->history = kcalloc(taps, sizeof(int16_t), GFP_KERNEL); fir 120 drivers/misc/echo/fir.h return fir->history; fir 123 drivers/misc/echo/fir.h static inline void fir32_flush(struct fir32_state_t *fir) fir 125 drivers/misc/echo/fir.h memset(fir->history, 0, fir->taps * sizeof(int16_t)); fir 128 drivers/misc/echo/fir.h static inline void fir32_free(struct fir32_state_t *fir) fir 130 drivers/misc/echo/fir.h kfree(fir->history); fir 133 drivers/misc/echo/fir.h static inline int16_t fir32(struct fir32_state_t *fir, int16_t sample) fir 140 drivers/misc/echo/fir.h fir->history[fir->curr_pos] = sample; fir 141 drivers/misc/echo/fir.h offset2 = fir->curr_pos; fir 142 drivers/misc/echo/fir.h offset1 = fir->taps - offset2; fir 144 drivers/misc/echo/fir.h for (i = fir->taps - 1; i >= offset1; i--) fir 145 drivers/misc/echo/fir.h y += fir->coeffs[i] * fir->history[i - offset1]; fir 147 drivers/misc/echo/fir.h y += fir->coeffs[i] * fir->history[i + offset2]; fir 148 drivers/misc/echo/fir.h if (fir->curr_pos <= 0) fir 149 drivers/misc/echo/fir.h fir->curr_pos = fir->taps; fir 150 drivers/misc/echo/fir.h fir->curr_pos--; fir 631 drivers/misc/genwqe/card_base.c u64 mask, fir, fec, uid, gfir, gfir_masked, sfir, sfec; fir 665 drivers/misc/genwqe/card_base.c fir = __genwqe_readq(cd, fir_addr); fir 666 drivers/misc/genwqe/card_base.c if (fir == 0x0) fir 669 drivers/misc/genwqe/card_base.c dev_err(&pci_dev->dev, "* 0x%08x 0x%016llx\n", fir_addr, fir); fir 670 drivers/misc/genwqe/card_base.c if (fir == IO_ILLEGAL_VALUE) fir 684 drivers/misc/genwqe/card_base.c if ((fir & mask) == 0x0) fir 218 drivers/mtd/nand/raw/fsl_elbc_nand.c in_be32(&lbc->fmr), in_be32(&lbc->fir), in_be32(&lbc->fcr)); fir 242 drivers/mtd/nand/raw/fsl_elbc_nand.c in_be32(&lbc->fir), in_be32(&lbc->fcr), fir 283 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fir, fir 293 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fir, fir 373 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fir, (FIR_OP_CM0 << FIR_OP0_SHIFT) | fir 401 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fir, fir 445 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fir, fir 454 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fir, fir 501 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fir, fir 520 drivers/mtd/nand/raw/fsl_elbc_nand.c out_be32(&lbc->fir, FIR_OP_CM0 << FIR_OP0_SHIFT); fir 117 sound/soc/ti/omap-mcbsp-st.c static void omap_mcbsp_st_fir_write(struct omap_mcbsp *mcbsp, s16 *fir) fir 129 sound/soc/ti/omap-mcbsp-st.c MCBSP_ST_WRITE(mcbsp, SFIRCR, fir[i]);