fcr31 19 arch/mips/include/asm/asmmacro-32.h cfc1 \tmp, fcr31 fcr31 60 arch/mips/include/asm/asmmacro-32.h ctc1 \tmp, fcr31 fcr31 87 arch/mips/include/asm/asmmacro.h cfc1 \tmp, fcr31 fcr31 163 arch/mips/include/asm/asmmacro.h ctc1 \tmp, fcr31 fcr31 169 arch/mips/include/asm/fpu.h tsk->thread.fpu.fcr31 = fcr31 171 arch/mips/include/asm/fpu_emulator.h void force_fcr31_sig(unsigned long fcr31, void __user *fault_addr, fcr31 174 arch/mips/include/asm/fpu_emulator.h unsigned long fcr31); fcr31 184 arch/mips/include/asm/fpu_emulator.h static inline unsigned long mask_fcr31_x(unsigned long fcr31) fcr31 186 arch/mips/include/asm/fpu_emulator.h return fcr31 & (FPU_CSR_UNI_X | fcr31 187 arch/mips/include/asm/fpu_emulator.h ((fcr31 & FPU_CSR_ALL_E) << fcr31 88 arch/mips/include/asm/mips-r2-to-r6-emul.h unsigned long *fcr31) fcr31 96 arch/mips/include/asm/mips-r2-to-r6-emul.h unsigned long *fcr31); fcr31 128 arch/mips/include/asm/processor.h unsigned int fcr31; fcr31 303 arch/mips/include/asm/processor.h .fcr31 = 0, \ fcr31 90 arch/mips/include/asm/switch_to.h unsigned long fcr31 = mask_fcr31_x(next->thread.fpu.fcr31); \ fcr31 93 arch/mips/include/asm/switch_to.h if (unlikely(fcr31)) { \ fcr31 95 arch/mips/include/asm/switch_to.h next->thread.fpu.fcr31 &= ~fcr31; \ fcr31 96 arch/mips/include/asm/switch_to.h force_fcr31_sig(fcr31, pc, next); \ fcr31 175 arch/mips/kernel/asm-offsets.c OFFSET(THREAD_FCR31, task_struct, thread.fpu.fcr31); fcr31 385 arch/mips/kernel/asm-offsets.c OFFSET(VCPU_FCR31, kvm_vcpu_arch, fpu.fcr31); fcr31 143 arch/mips/kernel/branch.c unsigned int fcr31; fcr31 152 arch/mips/kernel/branch.c fcr31 = read_32bit_cp1_register(CP1_STATUS); fcr31 154 arch/mips/kernel/branch.c fcr31 = current->thread.fpu.fcr31; fcr31 158 arch/mips/kernel/branch.c fcr31 = ~fcr31; fcr31 163 arch/mips/kernel/branch.c if (fcr31 & (1 << bit)) fcr31 686 arch/mips/kernel/branch.c unsigned int bit, fcr31, reg; fcr31 710 arch/mips/kernel/branch.c fcr31 = read_32bit_cp1_register(CP1_STATUS); fcr31 712 arch/mips/kernel/branch.c fcr31 = current->thread.fpu.fcr31; fcr31 721 arch/mips/kernel/branch.c if (~fcr31 & (1 << bit)) { fcr31 733 arch/mips/kernel/branch.c if (fcr31 & (1 << bit)) { fcr31 312 arch/mips/kernel/elf.c t->thread.fpu.fcr31 = c->fpu_csr31; fcr31 318 arch/mips/kernel/elf.c t->thread.fpu.fcr31 |= FPU_CSR_NAN2008; fcr31 320 arch/mips/kernel/elf.c t->thread.fpu.fcr31 |= FPU_CSR_ABS2008; fcr31 147 arch/mips/kernel/kgdb.c memcpy((void *)¤t->thread.fpu.fcr31, mem, fcr31 182 arch/mips/kernel/kgdb.c memcpy(mem, (void *)¤t->thread.fpu.fcr31, fcr31 204 arch/mips/kernel/mips-r2-to-r6-emul.c csr = current->thread.fpu.fcr31; fcr31 227 arch/mips/kernel/mips-r2-to-r6-emul.c csr = current->thread.fpu.fcr31; fcr31 906 arch/mips/kernel/mips-r2-to-r6-emul.c int mipsr2_decoder(struct pt_regs *regs, u32 inst, unsigned long *fcr31) fcr31 1185 arch/mips/kernel/mips-r2-to-r6-emul.c *fcr31 = res = mask_fcr31_x(current->thread.fpu.fcr31); fcr31 1186 arch/mips/kernel/mips-r2-to-r6-emul.c current->thread.fpu.fcr31 &= ~res; fcr31 350 arch/mips/kernel/ptrace.c u32 fcr31; fcr31 353 arch/mips/kernel/ptrace.c fcr31 = child->thread.fpu.fcr31; fcr31 355 arch/mips/kernel/ptrace.c child->thread.fpu.fcr31 = (value & ~mask) | (fcr31 & mask); fcr31 375 arch/mips/kernel/ptrace.c __put_user(child->thread.fpu.fcr31, data + 64); fcr31 470 arch/mips/kernel/ptrace.c &target->thread.fpu.fcr31, fcr31 542 arch/mips/kernel/ptrace.c u32 fcr31; fcr31 561 arch/mips/kernel/ptrace.c &fcr31, fcr31 566 arch/mips/kernel/ptrace.c ptrace_setfcr31(target, fcr31); fcr31 674 arch/mips/kernel/ptrace.c .fcsr = target->thread.fpu.fcr31, fcr31 740 arch/mips/kernel/ptrace.c target->thread.fpu.fcr31 = ctrl_regs.fcsr & ~FPU_CSR_ALL_X; fcr31 1218 arch/mips/kernel/ptrace.c tmp = child->thread.fpu.fcr31; fcr31 118 arch/mips/kernel/ptrace32.c tmp = child->thread.fpu.fcr31; fcr31 218 arch/mips/kernel/ptrace32.c child->thread.fpu.fcr31 = 0; fcr31 234 arch/mips/kernel/ptrace32.c child->thread.fpu.fcr31 = data; fcr31 85 arch/mips/kernel/signal.c err |= __put_user(current->thread.fpu.fcr31, csr); fcr31 104 arch/mips/kernel/signal.c err |= __get_user(current->thread.fpu.fcr31, csr); fcr31 720 arch/mips/kernel/traps.c void force_fcr31_sig(unsigned long fcr31, void __user *fault_addr, fcr31 725 arch/mips/kernel/traps.c if (fcr31 & FPU_CSR_INV_X) fcr31 727 arch/mips/kernel/traps.c else if (fcr31 & FPU_CSR_DIV_X) fcr31 729 arch/mips/kernel/traps.c else if (fcr31 & FPU_CSR_OVF_X) fcr31 731 arch/mips/kernel/traps.c else if (fcr31 & FPU_CSR_UDF_X) fcr31 733 arch/mips/kernel/traps.c else if (fcr31 & FPU_CSR_INE_X) fcr31 739 arch/mips/kernel/traps.c int process_fpemu_return(int sig, void __user *fault_addr, unsigned long fcr31) fcr31 749 arch/mips/kernel/traps.c force_fcr31_sig(fcr31, fault_addr, current); fcr31 778 arch/mips/kernel/traps.c unsigned long fcr31; fcr31 810 arch/mips/kernel/traps.c fcr31 = mask_fcr31_x(current->thread.fpu.fcr31); fcr31 811 arch/mips/kernel/traps.c current->thread.fpu.fcr31 &= ~fcr31; fcr31 817 arch/mips/kernel/traps.c process_fpemu_return(sig, fault_addr, fcr31); fcr31 825 arch/mips/kernel/traps.c asmlinkage void do_fpe(struct pt_regs *regs, unsigned long fcr31) fcr31 837 arch/mips/kernel/traps.c write_32bit_cp1_register(CP1_STATUS, fcr31 & ~mask_fcr31_x(fcr31)); fcr31 842 arch/mips/kernel/traps.c if (fcr31 & FPU_CSR_UNI_X) { fcr31 862 arch/mips/kernel/traps.c fcr31 = mask_fcr31_x(current->thread.fpu.fcr31); fcr31 863 arch/mips/kernel/traps.c current->thread.fpu.fcr31 &= ~fcr31; fcr31 873 arch/mips/kernel/traps.c process_fpemu_return(sig, fault_addr, fcr31); fcr31 1128 arch/mips/kernel/traps.c unsigned long fcr31 = 0; fcr31 1130 arch/mips/kernel/traps.c status = mipsr2_decoder(regs, opcode, &fcr31); fcr31 1140 arch/mips/kernel/traps.c fcr31); fcr31 1328 arch/mips/kernel/traps.c current->thread.fpu.fcr31); fcr31 1413 arch/mips/kernel/traps.c unsigned long fcr31; fcr31 1428 arch/mips/kernel/traps.c fcr31 = mask_fcr31_x(current->thread.fpu.fcr31); fcr31 1429 arch/mips/kernel/traps.c current->thread.fpu.fcr31 &= ~fcr31; fcr31 1432 arch/mips/kernel/traps.c if (!process_fpemu_return(sig, fault_addr, fcr31) && !err) fcr31 688 arch/mips/kvm/entry.c uasm_i_sw(&p, T0, offsetof(struct kvm_vcpu_arch, fpu.fcr31), fcr31 699 arch/mips/kvm/mips.c v = fpu->fcr31; fcr31 833 arch/mips/kvm/mips.c fpu->fcr31 = v; fcr31 428 arch/mips/math-emu/cp1emu.c unsigned int fcr31; fcr31 734 arch/mips/math-emu/cp1emu.c fcr31 = read_32bit_cp1_register(CP1_STATUS); fcr31 736 arch/mips/math-emu/cp1emu.c fcr31 = current->thread.fpu.fcr31; fcr31 745 arch/mips/math-emu/cp1emu.c if (~fcr31 & (1 << bit)) fcr31 756 arch/mips/math-emu/cp1emu.c if (fcr31 & (1 << bit)) fcr31 851 arch/mips/math-emu/cp1emu.c u32 fcr31 = ctx->fcr31; fcr31 856 arch/mips/math-emu/cp1emu.c value = fcr31; fcr31 864 arch/mips/math-emu/cp1emu.c value = (fcr31 >> (FPU_CSR_FS_S - MIPS_FENR_FS_S)) & fcr31 866 arch/mips/math-emu/cp1emu.c value |= fcr31 & (FPU_CSR_ALL_E | FPU_CSR_RM); fcr31 874 arch/mips/math-emu/cp1emu.c value = fcr31 & (FPU_CSR_ALL_X | FPU_CSR_ALL_S); fcr31 882 arch/mips/math-emu/cp1emu.c value = (fcr31 >> (FPU_CSR_COND_S - MIPS_FCCR_COND0_S)) & fcr31 884 arch/mips/math-emu/cp1emu.c value |= (fcr31 >> (FPU_CSR_COND1_S - MIPS_FCCR_COND1_S)) & fcr31 908 arch/mips/math-emu/cp1emu.c u32 fcr31 = ctx->fcr31; fcr31 924 arch/mips/math-emu/cp1emu.c fcr31 = (value & ~mask) | (fcr31 & mask); fcr31 932 arch/mips/math-emu/cp1emu.c fcr31 &= ~(FPU_CSR_FS | FPU_CSR_ALL_E | FPU_CSR_RM); fcr31 933 arch/mips/math-emu/cp1emu.c fcr31 |= (value << (FPU_CSR_FS_S - MIPS_FENR_FS_S)) & fcr31 935 arch/mips/math-emu/cp1emu.c fcr31 |= value & (FPU_CSR_ALL_E | FPU_CSR_RM); fcr31 943 arch/mips/math-emu/cp1emu.c fcr31 &= ~(FPU_CSR_ALL_X | FPU_CSR_ALL_S); fcr31 944 arch/mips/math-emu/cp1emu.c fcr31 |= value & (FPU_CSR_ALL_X | FPU_CSR_ALL_S); fcr31 952 arch/mips/math-emu/cp1emu.c fcr31 &= ~(FPU_CSR_CONDX | FPU_CSR_COND); fcr31 953 arch/mips/math-emu/cp1emu.c fcr31 |= (value << (FPU_CSR_COND_S - MIPS_FCCR_COND0_S)) & fcr31 955 arch/mips/math-emu/cp1emu.c fcr31 |= (value << (FPU_CSR_COND1_S - MIPS_FCCR_COND1_S)) & fcr31 963 arch/mips/math-emu/cp1emu.c ctx->fcr31 = fcr31; fcr31 1179 arch/mips/math-emu/cp1emu.c if ((ctx->fcr31 >> 5) & ctx->fcr31 & FPU_CSR_ALL_E) { fcr31 1213 arch/mips/math-emu/cp1emu.c cond = ctx->fcr31 & cbit; fcr31 1375 arch/mips/math-emu/cp1emu.c if (((ctx->fcr31 & cond) != 0) == ((MIPSInst_RT(ir) & 1) != 0)) fcr31 1554 arch/mips/math-emu/cp1emu.c ctx->fcr31 = (ctx->fcr31 & ~FPU_CSR_ALL_X) | rcsr; fcr31 1555 arch/mips/math-emu/cp1emu.c if ((ctx->fcr31 >> 5) & ctx->fcr31 & FPU_CSR_ALL_E) { fcr31 1737 arch/mips/math-emu/cp1emu.c if (((ctx->fcr31 & cond) != 0) != fcr31 2110 arch/mips/math-emu/cp1emu.c if (((ctx->fcr31 & cond) != 0) != fcr31 2740 arch/mips/math-emu/cp1emu.c ctx->fcr31 = (ctx->fcr31 & ~FPU_CSR_ALL_X) | rcsr; fcr31 2741 arch/mips/math-emu/cp1emu.c if ((ctx->fcr31 >> 5) & ctx->fcr31 & FPU_CSR_ALL_E) { fcr31 2757 arch/mips/math-emu/cp1emu.c ctx->fcr31 |= cbit; fcr31 2759 arch/mips/math-emu/cp1emu.c ctx->fcr31 &= ~cbit; fcr31 154 arch/mips/math-emu/ieee754.h #define ieee754_csr (*(struct _ieee754_csr *)(¤t->thread.fpu.fcr31))