fcr               160 arch/csky/abiv2/fpu.c 	user_fp->fcr = tmp1;
fcr               219 arch/csky/abiv2/fpu.c 	tmp1 = user_fp->fcr;
fcr                45 arch/csky/include/uapi/asm/ptrace.h 	unsigned long	fcr;
fcr                24 arch/csky/kernel/asm-offsets.c 	DEFINE(THREAD_FCR,        offsetof(struct thread_struct, user_fp.fcr));
fcr                39 arch/m68k/include/asm/sun3xflop.h 	unsigned char fcr;
fcr                86 arch/m68k/include/asm/sun3xflop.h 		unsigned char fcr = sun3x_fdc.fcr;
fcr                89 arch/m68k/include/asm/sun3xflop.h 			fcr |= (FCR_DSEL0 | FCR_MTRON);
fcr                91 arch/m68k/include/asm/sun3xflop.h 			fcr &= ~(FCR_DSEL0 | FCR_MTRON);
fcr                94 arch/m68k/include/asm/sun3xflop.h 		if(fcr != sun3x_fdc.fcr) {
fcr                95 arch/m68k/include/asm/sun3xflop.h 			*(sun3x_fdc.fcr_r) = fcr;
fcr                96 arch/m68k/include/asm/sun3xflop.h 			sun3x_fdc.fcr = fcr;
fcr               227 arch/m68k/include/asm/sun3xflop.h 	sun3x_fdc.fcr = 0;
fcr               251 arch/m68k/include/asm/sun3xflop.h 		sun3x_fdc.fcr |= (FCR_DSEL0 | FCR_EJECT);
fcr               252 arch/m68k/include/asm/sun3xflop.h 		*(sun3x_fdc.fcr_r) = sun3x_fdc.fcr;
fcr               254 arch/m68k/include/asm/sun3xflop.h 		sun3x_fdc.fcr &= ~(FCR_DSEL0 | FCR_EJECT);
fcr               255 arch/m68k/include/asm/sun3xflop.h 		*(sun3x_fdc.fcr_r) = sun3x_fdc.fcr;
fcr               207 arch/powerpc/include/asm/fsl_lbc.h 	__be32 fcr;             /**< Flash Command Register */
fcr               163 arch/powerpc/platforms/powermac/feature.c 	unsigned long		fcr;
fcr               189 arch/powerpc/platforms/powermac/feature.c 		fcr = MACIO_IN32(OHARE_FCR);
fcr               191 arch/powerpc/platforms/powermac/feature.c 		if (!(fcr & OH_SCC_ENABLE)) {
fcr               192 arch/powerpc/platforms/powermac/feature.c 			fcr |= OH_SCC_ENABLE;
fcr               200 arch/powerpc/platforms/powermac/feature.c 					fcr &= ~HRW_SCC_TRANS_EN_N;
fcr               201 arch/powerpc/platforms/powermac/feature.c 				MACIO_OUT32(OHARE_FCR, fcr);
fcr               202 arch/powerpc/platforms/powermac/feature.c 				fcr |= (rmask = HRW_RESET_SCC);
fcr               203 arch/powerpc/platforms/powermac/feature.c 				MACIO_OUT32(OHARE_FCR, fcr);
fcr               205 arch/powerpc/platforms/powermac/feature.c 				fcr |= (rmask = OH_SCC_RESET);
fcr               206 arch/powerpc/platforms/powermac/feature.c 				MACIO_OUT32(OHARE_FCR, fcr);
fcr               212 arch/powerpc/platforms/powermac/feature.c 			fcr &= ~rmask;
fcr               213 arch/powerpc/platforms/powermac/feature.c 			MACIO_OUT32(OHARE_FCR, fcr);
fcr               216 arch/powerpc/platforms/powermac/feature.c 			fcr |= OH_SCCA_IO;
fcr               218 arch/powerpc/platforms/powermac/feature.c 			fcr |= OH_SCCB_IO;
fcr               219 arch/powerpc/platforms/powermac/feature.c 		MACIO_OUT32(OHARE_FCR, fcr);
fcr               228 arch/powerpc/platforms/powermac/feature.c 		fcr = MACIO_IN32(OHARE_FCR);
fcr               230 arch/powerpc/platforms/powermac/feature.c 			fcr &= ~OH_SCCA_IO;
fcr               232 arch/powerpc/platforms/powermac/feature.c 			fcr &= ~OH_SCCB_IO;
fcr               233 arch/powerpc/platforms/powermac/feature.c 		MACIO_OUT32(OHARE_FCR, fcr);
fcr               234 arch/powerpc/platforms/powermac/feature.c 		if ((fcr & (OH_SCCA_IO | OH_SCCB_IO)) == 0) {
fcr               235 arch/powerpc/platforms/powermac/feature.c 			fcr &= ~OH_SCC_ENABLE;
fcr               237 arch/powerpc/platforms/powermac/feature.c 				fcr |= HRW_SCC_TRANS_EN_N;
fcr               238 arch/powerpc/platforms/powermac/feature.c 			MACIO_OUT32(OHARE_FCR, fcr);
fcr               603 arch/powerpc/platforms/powermac/feature.c 	u32			fcr;
fcr               620 arch/powerpc/platforms/powermac/feature.c 		fcr = MACIO_IN32(KEYLARGO_FCR0);
fcr               622 arch/powerpc/platforms/powermac/feature.c 		if (!(fcr & KL0_SCC_CELL_ENABLE)) {
fcr               623 arch/powerpc/platforms/powermac/feature.c 			fcr |= KL0_SCC_CELL_ENABLE;
fcr               627 arch/powerpc/platforms/powermac/feature.c 			fcr |= KL0_SCCA_ENABLE;
fcr               630 arch/powerpc/platforms/powermac/feature.c 				fcr &= ~KL0_SCC_A_INTF_ENABLE;
fcr               632 arch/powerpc/platforms/powermac/feature.c 				fcr |= KL0_SCC_A_INTF_ENABLE;
fcr               635 arch/powerpc/platforms/powermac/feature.c 			fcr |= KL0_SCCB_ENABLE;
fcr               638 arch/powerpc/platforms/powermac/feature.c 				fcr &= ~KL0_SCC_B_INTF_ENABLE;
fcr               639 arch/powerpc/platforms/powermac/feature.c 				fcr |= KL0_IRDA_ENABLE;
fcr               640 arch/powerpc/platforms/powermac/feature.c 				fcr |= KL0_IRDA_CLK32_ENABLE | KL0_IRDA_CLK19_ENABLE;
fcr               641 arch/powerpc/platforms/powermac/feature.c 				fcr |= KL0_IRDA_SOURCE1_SEL;
fcr               642 arch/powerpc/platforms/powermac/feature.c 				fcr &= ~(KL0_IRDA_FAST_CONNECT|KL0_IRDA_DEFAULT1|KL0_IRDA_DEFAULT0);
fcr               643 arch/powerpc/platforms/powermac/feature.c 				fcr &= ~(KL0_IRDA_SOURCE2_SEL|KL0_IRDA_HIGH_BAND);
fcr               646 arch/powerpc/platforms/powermac/feature.c 				fcr |= KL0_SCC_B_INTF_ENABLE;
fcr               648 arch/powerpc/platforms/powermac/feature.c 		MACIO_OUT32(KEYLARGO_FCR0, fcr);
fcr               673 arch/powerpc/platforms/powermac/feature.c 		fcr = MACIO_IN32(KEYLARGO_FCR0);
fcr               675 arch/powerpc/platforms/powermac/feature.c 			fcr &= ~KL0_SCCA_ENABLE;
fcr               677 arch/powerpc/platforms/powermac/feature.c 			fcr &= ~KL0_SCCB_ENABLE;
fcr               680 arch/powerpc/platforms/powermac/feature.c 				fcr &= ~KL0_IRDA_ENABLE;
fcr               681 arch/powerpc/platforms/powermac/feature.c 				fcr &= ~(KL0_IRDA_CLK32_ENABLE | KL0_IRDA_CLK19_ENABLE);
fcr               682 arch/powerpc/platforms/powermac/feature.c 				fcr &= ~(KL0_IRDA_FAST_CONNECT|KL0_IRDA_DEFAULT1|KL0_IRDA_DEFAULT0);
fcr               683 arch/powerpc/platforms/powermac/feature.c 				fcr &= ~(KL0_IRDA_SOURCE1_SEL|KL0_IRDA_SOURCE2_SEL|KL0_IRDA_HIGH_BAND);
fcr               686 arch/powerpc/platforms/powermac/feature.c 		MACIO_OUT32(KEYLARGO_FCR0, fcr);
fcr               687 arch/powerpc/platforms/powermac/feature.c 		if ((fcr & (KL0_SCCA_ENABLE | KL0_SCCB_ENABLE)) == 0) {
fcr               688 arch/powerpc/platforms/powermac/feature.c 			fcr &= ~KL0_SCC_CELL_ENABLE;
fcr               689 arch/powerpc/platforms/powermac/feature.c 			MACIO_OUT32(KEYLARGO_FCR0, fcr);
fcr               874 drivers/ata/pata_macio.c 		u32 fcr = readl(priv->kauai_fcr);
fcr               875 drivers/ata/pata_macio.c 		fcr &= ~(KAUAI_FCR_UATA_RESET_N | KAUAI_FCR_UATA_ENABLE);
fcr               876 drivers/ata/pata_macio.c 		writel(fcr, priv->kauai_fcr);
fcr               868 drivers/ide/pmac.c 		u32 fcr = readl(pmif->kauai_fcr);
fcr               869 drivers/ide/pmac.c 		fcr &= ~(KAUAI_FCR_UATA_RESET_N | KAUAI_FCR_UATA_ENABLE);
fcr               870 drivers/ide/pmac.c 		writel(fcr, pmif->kauai_fcr);
fcr               894 drivers/ide/pmac.c 			u32 fcr = readl(pmif->kauai_fcr);
fcr               895 drivers/ide/pmac.c 			fcr |= KAUAI_FCR_UATA_RESET_N | KAUAI_FCR_UATA_ENABLE;
fcr               896 drivers/ide/pmac.c 			writel(fcr, pmif->kauai_fcr);
fcr               250 drivers/mmc/core/sdio_uart.c 	unsigned char cval, fcr = 0;
fcr               296 drivers/mmc/core/sdio_uart.c 		fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
fcr               298 drivers/mmc/core/sdio_uart.c 		fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10;
fcr               342 drivers/mmc/core/sdio_uart.c 	sdio_out(port, UART_FCR, fcr);
fcr               218 drivers/mtd/nand/raw/fsl_elbc_nand.c 	         in_be32(&lbc->fmr), in_be32(&lbc->fir), in_be32(&lbc->fcr));
fcr               242 drivers/mtd/nand/raw/fsl_elbc_nand.c 		         in_be32(&lbc->fir), in_be32(&lbc->fcr),
fcr               290 drivers/mtd/nand/raw/fsl_elbc_nand.c 		out_be32(&lbc->fcr, (NAND_CMD_READ0 << FCR_CMD0_SHIFT) |
fcr               300 drivers/mtd/nand/raw/fsl_elbc_nand.c 			out_be32(&lbc->fcr, NAND_CMD_READOOB << FCR_CMD0_SHIFT);
fcr               302 drivers/mtd/nand/raw/fsl_elbc_nand.c 			out_be32(&lbc->fcr, NAND_CMD_READ0 << FCR_CMD0_SHIFT);
fcr               376 drivers/mtd/nand/raw/fsl_elbc_nand.c 		out_be32(&lbc->fcr, command << FCR_CMD0_SHIFT);
fcr               408 drivers/mtd/nand/raw/fsl_elbc_nand.c 		out_be32(&lbc->fcr,
fcr               422 drivers/mtd/nand/raw/fsl_elbc_nand.c 		__be32 fcr;
fcr               440 drivers/mtd/nand/raw/fsl_elbc_nand.c 		fcr = (NAND_CMD_STATUS   << FCR_CMD1_SHIFT) |
fcr               466 drivers/mtd/nand/raw/fsl_elbc_nand.c 				fcr |= NAND_CMD_READOOB << FCR_CMD0_SHIFT;
fcr               469 drivers/mtd/nand/raw/fsl_elbc_nand.c 				fcr |= NAND_CMD_READ0 << FCR_CMD0_SHIFT;
fcr               472 drivers/mtd/nand/raw/fsl_elbc_nand.c 		out_be32(&lbc->fcr, fcr);
fcr               504 drivers/mtd/nand/raw/fsl_elbc_nand.c 		out_be32(&lbc->fcr, NAND_CMD_STATUS << FCR_CMD0_SHIFT);
fcr               521 drivers/mtd/nand/raw/fsl_elbc_nand.c 		out_be32(&lbc->fcr, NAND_CMD_RESET << FCR_CMD0_SHIFT);
fcr               112 drivers/mtd/nand/raw/tmio_nand.c 	void __iomem *fcr;
fcr               154 drivers/mtd/nand/raw/tmio_nand.c 		tmio_iowrite8(mode, tmio->fcr + FCR_MODE);
fcr               166 drivers/mtd/nand/raw/tmio_nand.c 	return !(tmio_ioread8(tmio->fcr + FCR_STATUS) & FCR_STATUS_BUSY);
fcr               174 drivers/mtd/nand/raw/tmio_nand.c 	tmio_iowrite8(0x00, tmio->fcr + FCR_IMR);
fcr               194 drivers/mtd/nand/raw/tmio_nand.c 	tmio_iowrite8(0x0f, tmio->fcr + FCR_ISR);
fcr               196 drivers/mtd/nand/raw/tmio_nand.c 	tmio_iowrite8(0x81, tmio->fcr + FCR_IMR);
fcr               203 drivers/mtd/nand/raw/tmio_nand.c 		tmio_iowrite8(0x00, tmio->fcr + FCR_IMR);
fcr               207 drivers/mtd/nand/raw/tmio_nand.c 		tmio_iowrite8(0x00, tmio->fcr + FCR_IMR);
fcr               231 drivers/mtd/nand/raw/tmio_nand.c 	data = tmio_ioread16(tmio->fcr + FCR_DATA);
fcr               247 drivers/mtd/nand/raw/tmio_nand.c 	tmio_iowrite16_rep(tmio->fcr + FCR_DATA, buf, len >> 1);
fcr               254 drivers/mtd/nand/raw/tmio_nand.c 	tmio_ioread16_rep(tmio->fcr + FCR_DATA, buf, len >> 1);
fcr               261 drivers/mtd/nand/raw/tmio_nand.c 	tmio_iowrite8(FCR_MODE_HWECC_RESET, tmio->fcr + FCR_MODE);
fcr               262 drivers/mtd/nand/raw/tmio_nand.c 	tmio_ioread8(tmio->fcr + FCR_DATA);	/* dummy read */
fcr               263 drivers/mtd/nand/raw/tmio_nand.c 	tmio_iowrite8(FCR_MODE_HWECC_CALC, tmio->fcr + FCR_MODE);
fcr               272 drivers/mtd/nand/raw/tmio_nand.c 	tmio_iowrite8(FCR_MODE_HWECC_RESULT, tmio->fcr + FCR_MODE);
fcr               274 drivers/mtd/nand/raw/tmio_nand.c 	ecc = tmio_ioread16(tmio->fcr + FCR_DATA);
fcr               277 drivers/mtd/nand/raw/tmio_nand.c 	ecc = tmio_ioread16(tmio->fcr + FCR_DATA);
fcr               280 drivers/mtd/nand/raw/tmio_nand.c 	ecc = tmio_ioread16(tmio->fcr + FCR_DATA);
fcr               284 drivers/mtd/nand/raw/tmio_nand.c 	tmio_iowrite8(FCR_MODE_DATA, tmio->fcr + FCR_MODE);
fcr               334 drivers/mtd/nand/raw/tmio_nand.c 	tmio_iowrite8(0x0f, tmio->fcr + FCR_ISR);
fcr               337 drivers/mtd/nand/raw/tmio_nand.c 	tmio_iowrite8(FCR_MODE_POWER_ON, tmio->fcr + FCR_MODE);
fcr               338 drivers/mtd/nand/raw/tmio_nand.c 	tmio_iowrite8(FCR_MODE_COMMAND, tmio->fcr + FCR_MODE);
fcr               339 drivers/mtd/nand/raw/tmio_nand.c 	tmio_iowrite8(NAND_CMD_RESET, tmio->fcr + FCR_DATA);
fcr               342 drivers/mtd/nand/raw/tmio_nand.c 	tmio_iowrite8(FCR_MODE_STANDBY, tmio->fcr + FCR_MODE);
fcr               353 drivers/mtd/nand/raw/tmio_nand.c 	tmio_iowrite8(FCR_MODE_POWER_OFF, tmio->fcr + FCR_MODE);
fcr               361 drivers/mtd/nand/raw/tmio_nand.c 	struct resource *fcr = platform_get_resource(dev,
fcr               392 drivers/mtd/nand/raw/tmio_nand.c 	tmio->fcr_base = fcr->start & 0xfffff;
fcr               393 drivers/mtd/nand/raw/tmio_nand.c 	tmio->fcr = devm_ioremap(&dev->dev, fcr->start, resource_size(fcr));
fcr               394 drivers/mtd/nand/raw/tmio_nand.c 	if (!tmio->fcr)
fcr               402 drivers/mtd/nand/raw/tmio_nand.c 	nand_chip->legacy.IO_ADDR_R = tmio->fcr;
fcr               403 drivers/mtd/nand/raw/tmio_nand.c 	nand_chip->legacy.IO_ADDR_W = tmio->fcr;
fcr               226 drivers/net/ethernet/broadcom/bcmsysport.c 	STAT_MIB_RX("rx_carrier", mib.rx.fcr),
fcr               554 drivers/net/ethernet/broadcom/bcmsysport.h 	u32	fcr;		/* RO # of carrier sense error pkt */
fcr               808 drivers/net/ethernet/broadcom/genet/bcmgenet.c 	STAT_GENET_MIB_RX("rx_carrier", mib.rx.fcr),
fcr               100 drivers/net/ethernet/broadcom/genet/bcmgenet.h 	u32	fcr;		/* RO # of carrier sense error pkt */
fcr               229 drivers/net/ethernet/faraday/ftgmac100.c 	u32 fcr = FTGMAC100_FCR_PAUSE_TIME(16);
fcr               233 drivers/net/ethernet/faraday/ftgmac100.c 		fcr |= FTGMAC100_FCR_FC_EN;
fcr               239 drivers/net/ethernet/faraday/ftgmac100.c 		fcr |= FTGMAC100_FCR_FCTHR_EN;
fcr               241 drivers/net/ethernet/faraday/ftgmac100.c 	iowrite32(fcr, priv->base + FTGMAC100_OFFSET_FCR);
fcr              1193 drivers/net/ethernet/freescale/gianfar.h 		unsigned int far, unsigned int fcr, unsigned int fpr)
fcr              1198 drivers/net/ethernet/freescale/gianfar.h 	gfar_write(&regs->rqfcr, fcr);
fcr              1203 drivers/net/ethernet/freescale/gianfar.h 		unsigned int far, unsigned int *fcr, unsigned int *fpr)
fcr              1208 drivers/net/ethernet/freescale/gianfar.h 	*fcr = gfar_read(&regs->rqfcr);
fcr               630 drivers/net/ethernet/freescale/gianfar_ethtool.c 	u32 fcr = 0x0, fpr = FPR_FILER_MASK;
fcr               633 drivers/net/ethernet/freescale/gianfar_ethtool.c 		fcr = RQFCR_PID_DAH | RQFCR_CMP_NOMATCH |
fcr               636 drivers/net/ethernet/freescale/gianfar_ethtool.c 		priv->ftp_rqfcr[priv->cur_filer_idx] = fcr;
fcr               637 drivers/net/ethernet/freescale/gianfar_ethtool.c 		gfar_write_filer(priv, priv->cur_filer_idx, fcr, fpr);
fcr               640 drivers/net/ethernet/freescale/gianfar_ethtool.c 		fcr = RQFCR_PID_DAL | RQFCR_CMP_NOMATCH |
fcr               643 drivers/net/ethernet/freescale/gianfar_ethtool.c 		priv->ftp_rqfcr[priv->cur_filer_idx] = fcr;
fcr               644 drivers/net/ethernet/freescale/gianfar_ethtool.c 		gfar_write_filer(priv, priv->cur_filer_idx, fcr, fpr);
fcr               649 drivers/net/ethernet/freescale/gianfar_ethtool.c 		fcr = RQFCR_PID_VID | RQFCR_CMP_NOMATCH | RQFCR_HASH |
fcr               651 drivers/net/ethernet/freescale/gianfar_ethtool.c 		gfar_write_filer(priv, priv->cur_filer_idx, fcr, fpr);
fcr               653 drivers/net/ethernet/freescale/gianfar_ethtool.c 		priv->ftp_rqfcr[priv->cur_filer_idx] = fcr;
fcr               658 drivers/net/ethernet/freescale/gianfar_ethtool.c 		fcr = RQFCR_PID_SIA | RQFCR_CMP_NOMATCH | RQFCR_HASH |
fcr               661 drivers/net/ethernet/freescale/gianfar_ethtool.c 		priv->ftp_rqfcr[priv->cur_filer_idx] = fcr;
fcr               662 drivers/net/ethernet/freescale/gianfar_ethtool.c 		gfar_write_filer(priv, priv->cur_filer_idx, fcr, fpr);
fcr               667 drivers/net/ethernet/freescale/gianfar_ethtool.c 		fcr = RQFCR_PID_DIA | RQFCR_CMP_NOMATCH | RQFCR_HASH |
fcr               670 drivers/net/ethernet/freescale/gianfar_ethtool.c 		priv->ftp_rqfcr[priv->cur_filer_idx] = fcr;
fcr               671 drivers/net/ethernet/freescale/gianfar_ethtool.c 		gfar_write_filer(priv, priv->cur_filer_idx, fcr, fpr);
fcr               676 drivers/net/ethernet/freescale/gianfar_ethtool.c 		fcr = RQFCR_PID_L4P | RQFCR_CMP_NOMATCH | RQFCR_HASH |
fcr               679 drivers/net/ethernet/freescale/gianfar_ethtool.c 		priv->ftp_rqfcr[priv->cur_filer_idx] = fcr;
fcr               680 drivers/net/ethernet/freescale/gianfar_ethtool.c 		gfar_write_filer(priv, priv->cur_filer_idx, fcr, fpr);
fcr               685 drivers/net/ethernet/freescale/gianfar_ethtool.c 		fcr = RQFCR_PID_SPT | RQFCR_CMP_NOMATCH | RQFCR_HASH |
fcr               688 drivers/net/ethernet/freescale/gianfar_ethtool.c 		priv->ftp_rqfcr[priv->cur_filer_idx] = fcr;
fcr               689 drivers/net/ethernet/freescale/gianfar_ethtool.c 		gfar_write_filer(priv, priv->cur_filer_idx, fcr, fpr);
fcr               694 drivers/net/ethernet/freescale/gianfar_ethtool.c 		fcr = RQFCR_PID_DPT | RQFCR_CMP_NOMATCH | RQFCR_HASH |
fcr               697 drivers/net/ethernet/freescale/gianfar_ethtool.c 		priv->ftp_rqfcr[priv->cur_filer_idx] = fcr;
fcr               698 drivers/net/ethernet/freescale/gianfar_ethtool.c 		gfar_write_filer(priv, priv->cur_filer_idx, fcr, fpr);
fcr               644 drivers/tty/mxser.c 	unsigned cflag, cval, fcr;
fcr               684 drivers/tty/mxser.c 			fcr = UART_FCR_ENABLE_FIFO;
fcr               685 drivers/tty/mxser.c 			fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
fcr               688 drivers/tty/mxser.c 			fcr = 0;
fcr               690 drivers/tty/mxser.c 		fcr = UART_FCR_ENABLE_FIFO;
fcr               692 drivers/tty/mxser.c 			fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
fcr               697 drivers/tty/mxser.c 				fcr |= UART_FCR_TRIGGER_1;
fcr               700 drivers/tty/mxser.c 				fcr |= UART_FCR_TRIGGER_4;
fcr               703 drivers/tty/mxser.c 				fcr |= UART_FCR_TRIGGER_8;
fcr               706 drivers/tty/mxser.c 				fcr |= UART_FCR_TRIGGER_14;
fcr               804 drivers/tty/mxser.c 	outb(fcr, info->ioaddr + UART_FCR);	/* set fcr */
fcr              1020 drivers/tty/mxser.c 	char fcr;
fcr              1027 drivers/tty/mxser.c 	fcr = inb(info->ioaddr + UART_FCR);
fcr              1028 drivers/tty/mxser.c 	outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
fcr              1030 drivers/tty/mxser.c 	outb(fcr, info->ioaddr + UART_FCR);
fcr                68 drivers/tty/serial/8250/8250.h 	unsigned char	fcr;
fcr               181 drivers/tty/serial/8250/8250_omap.c 	serial_out(up, UART_FCR, up->fcr | UART_FCR_CLEAR_XMIT |
fcr               293 drivers/tty/serial/8250/8250_omap.c 	serial_out(up, UART_FCR, up->fcr);
fcr               441 drivers/tty/serial/8250/8250_omap.c 	up->fcr = UART_FCR_ENABLE_FIFO;
fcr               442 drivers/tty/serial/8250/8250_omap.c 	up->fcr |= TRIGGER_FCR_MASK(TX_TRIGGER) << OMAP_UART_FCR_TX_TRIG;
fcr               443 drivers/tty/serial/8250/8250_omap.c 	up->fcr |= TRIGGER_FCR_MASK(RX_TRIGGER) << OMAP_UART_FCR_RX_TRIG;
fcr                86 drivers/tty/serial/8250/8250_port.c 		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
fcr               105 drivers/tty/serial/8250/8250_port.c 		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
fcr               114 drivers/tty/serial/8250/8250_port.c 		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 |
fcr               128 drivers/tty/serial/8250/8250_port.c 		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
fcr               136 drivers/tty/serial/8250/8250_port.c 		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
fcr               145 drivers/tty/serial/8250/8250_port.c 		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
fcr               152 drivers/tty/serial/8250/8250_port.c 		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_11,
fcr               159 drivers/tty/serial/8250/8250_port.c 		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
fcr               166 drivers/tty/serial/8250/8250_port.c 		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
fcr               173 drivers/tty/serial/8250/8250_port.c 		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
fcr               180 drivers/tty/serial/8250/8250_port.c 		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00,
fcr               187 drivers/tty/serial/8250/8250_port.c 		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
fcr               194 drivers/tty/serial/8250/8250_port.c 		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
fcr               203 drivers/tty/serial/8250/8250_port.c 		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
fcr               211 drivers/tty/serial/8250/8250_port.c 		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_11 |
fcr               220 drivers/tty/serial/8250/8250_port.c 		.fcr		= UART_FCR_DMA_SELECT | UART_FCR_ENABLE_FIFO |
fcr               237 drivers/tty/serial/8250/8250_port.c 		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
fcr               245 drivers/tty/serial/8250/8250_port.c 		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
fcr               253 drivers/tty/serial/8250/8250_port.c 		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
fcr               266 drivers/tty/serial/8250/8250_port.c 		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 |
fcr               274 drivers/tty/serial/8250/8250_port.c 		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
fcr               282 drivers/tty/serial/8250/8250_port.c 		.fcr		= UART_FCR_DMA_SELECT | UART_FCR_ENABLE_FIFO |
fcr               291 drivers/tty/serial/8250/8250_port.c 		.fcr		= UART_FCR_ENABLE_FIFO |
fcr               299 drivers/tty/serial/8250/8250_port.c 		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 |
fcr               308 drivers/tty/serial/8250/8250_port.c 		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
fcr               581 drivers/tty/serial/8250/8250_port.c 	serial_out(p, UART_FCR, p->fcr);
fcr              2585 drivers/tty/serial/8250/8250_port.c 			up->fcr &= ~UART_FCR_TRIGGER_MASK;
fcr              2586 drivers/tty/serial/8250/8250_port.c 			up->fcr |= UART_FCR_TRIGGER_1;
fcr              2672 drivers/tty/serial/8250/8250_port.c 		serial_port_out(port, UART_FCR, up->fcr);
fcr              2677 drivers/tty/serial/8250/8250_port.c 		if (up->fcr & UART_FCR_ENABLE_FIFO)
fcr              2679 drivers/tty/serial/8250/8250_port.c 		serial_port_out(port, UART_FCR, up->fcr);	/* set fcr */
fcr              2853 drivers/tty/serial/8250/8250_port.c 	bytes = conf_type->rxtrig_bytes[UART_FCR_R_TRIG_BITS(up->fcr)];
fcr              2927 drivers/tty/serial/8250/8250_port.c 	up->fcr &= ~UART_FCR_TRIGGER_MASK;
fcr              2928 drivers/tty/serial/8250/8250_port.c 	up->fcr |= (unsigned char)rxtrig;
fcr              2929 drivers/tty/serial/8250/8250_port.c 	serial_out(up, UART_FCR, up->fcr);
fcr              3020 drivers/tty/serial/8250/8250_port.c 	up->fcr = uart_config[up->port.type].fcr;
fcr               127 drivers/tty/serial/milbeaut_usio.c 	u16 fcr = readw(port->membase + MLB_USIO_REG_FCR);
fcr               129 drivers/tty/serial/milbeaut_usio.c 	writew(fcr | MLB_USIO_FCR_FTIE, port->membase + MLB_USIO_REG_FCR);
fcr               130 drivers/tty/serial/milbeaut_usio.c 	if (!(fcr & MLB_USIO_FCR_FDRQ))
fcr               140 drivers/tty/serial/omap-serial.c 	unsigned char		fcr;
fcr               344 drivers/tty/serial/omap-serial.c 		serial_out(up, UART_FCR, up->fcr | UART_FCR_CLEAR_RCVR);
fcr               888 drivers/tty/serial/omap-serial.c 	up->fcr = UART_FCR_R_TRIG_01 | UART_FCR_T_TRIG_01 |
fcr               978 drivers/tty/serial/omap-serial.c 	up->fcr &= ~OMAP_UART_FCR_RX_FIFO_TRIG_MASK;
fcr               979 drivers/tty/serial/omap-serial.c 	up->fcr &= ~OMAP_UART_FCR_TX_FIFO_TRIG_MASK;
fcr               980 drivers/tty/serial/omap-serial.c 	up->fcr |= UART_FCR6_R_TRIGGER_16 | UART_FCR6_T_TRIGGER_24 |
fcr               983 drivers/tty/serial/omap-serial.c 	serial_out(up, UART_FCR, up->fcr);
fcr              1801 drivers/tty/serial/omap-serial.c 	serial_out(up, UART_FCR, up->fcr | UART_FCR_CLEAR_XMIT |
fcr              1837 drivers/tty/serial/omap-serial.c 	serial_out(up, UART_FCR, up->fcr);
fcr               225 drivers/tty/serial/pch_uart.c 	unsigned int fcr;
fcr               492 drivers/tty/serial/pch_uart.c 	iowrite8(PCH_UART_FCR_FIFOE | priv->fcr, priv->membase + UART_FCR);
fcr               493 drivers/tty/serial/pch_uart.c 	iowrite8(PCH_UART_FCR_FIFOE | priv->fcr | flag,
fcr               495 drivers/tty/serial/pch_uart.c 	iowrite8(priv->fcr, priv->membase + UART_FCR);
fcr               504 drivers/tty/serial/pch_uart.c 	u8 fcr;
fcr               542 drivers/tty/serial/pch_uart.c 	fcr =
fcr               547 drivers/tty/serial/pch_uart.c 	iowrite8(fcr, priv->membase + UART_FCR);
fcr               548 drivers/tty/serial/pch_uart.c 	priv->fcr = fcr;
fcr              1809 drivers/tty/serial/pch_uart.c 	priv->fcr = 0;
fcr               432 drivers/tty/serial/pxa.c 	unsigned char cval, fcr = 0;
fcr               467 drivers/tty/serial/pxa.c 		fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR1;
fcr               469 drivers/tty/serial/pxa.c 		fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR8;
fcr               471 drivers/tty/serial/pxa.c 		fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR32;
fcr               546 drivers/tty/serial/pxa.c 	serial_out(up, UART_FCR, fcr);
fcr               302 drivers/tty/serial/serial-tegra.c 	unsigned long fcr = tup->fcr_shadow;
fcr               309 drivers/tty/serial/serial-tegra.c 		fcr |= fcr_bits & (UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
fcr               310 drivers/tty/serial/serial-tegra.c 		tegra_uart_write(tup, fcr, UART_FCR);
fcr               312 drivers/tty/serial/serial-tegra.c 		fcr &= ~UART_FCR_ENABLE_FIFO;
fcr               313 drivers/tty/serial/serial-tegra.c 		tegra_uart_write(tup, fcr, UART_FCR);
fcr               315 drivers/tty/serial/serial-tegra.c 		fcr |= fcr_bits & (UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
fcr               316 drivers/tty/serial/serial-tegra.c 		tegra_uart_write(tup, fcr, UART_FCR);
fcr               317 drivers/tty/serial/serial-tegra.c 		fcr |= UART_FCR_ENABLE_FIFO;
fcr               318 drivers/tty/serial/serial-tegra.c 		tegra_uart_write(tup, fcr, UART_FCR);
fcr               629 drivers/tty/serial/serial_txx9.c 	unsigned int cval, fcr = 0;
fcr               673 drivers/tty/serial/serial_txx9.c 	fcr = TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1;
fcr               727 drivers/tty/serial/serial_txx9.c 	sio_out(up, TXX9_SIFCR, fcr);
fcr               783 drivers/tty/serial/sunsu.c 	unsigned char cval, fcr = 0;
fcr               824 drivers/tty/serial/sunsu.c 			fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
fcr               827 drivers/tty/serial/sunsu.c 			fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_14;
fcr               830 drivers/tty/serial/sunsu.c 			fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_8;
fcr               833 drivers/tty/serial/sunsu.c 		fcr |= UART_FCR7_64BYTE;
fcr               891 drivers/tty/serial/sunsu.c 		serial_outp(up, UART_FCR, fcr);		/* set fcr */
fcr               895 drivers/tty/serial/sunsu.c 		if (fcr & UART_FCR_ENABLE_FIFO) {
fcr               899 drivers/tty/serial/sunsu.c 		serial_outp(up, UART_FCR, fcr);		/* set fcr */
fcr               506 drivers/tty/serial/vr41xx_siu.c 	uint8_t lcr, fcr, ier;
fcr               538 drivers/tty/serial/vr41xx_siu.c 	fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10;
fcr               577 drivers/tty/serial/vr41xx_siu.c 	siu_write(port, UART_FCR, fcr);
fcr                41 include/linux/rslib.h 	int		fcr;
fcr                82 include/linux/rslib.h struct rs_control *init_rs_gfp(int symsize, int gfpoly, int fcr, int prim,
fcr                98 include/linux/rslib.h static inline struct rs_control *init_rs(int symsize, int gfpoly, int fcr,
fcr               101 include/linux/rslib.h 	return init_rs_gfp(symsize, gfpoly, fcr, prim, nroots, GFP_KERNEL);
fcr               105 include/linux/rslib.h 					 int fcr, int prim, int nroots);
fcr               101 include/linux/serial_8250.h 	unsigned char		fcr;
fcr                18 lib/reed_solomon/decode_rs.c 	int fcr = rs->fcr;
fcr                73 lib/reed_solomon/decode_rs.c 						       (fcr + i) * prim)];
fcr                85 lib/reed_solomon/decode_rs.c 						       (fcr+i)*prim)];
fcr               267 lib/reed_solomon/decode_rs.c 		num2 = alpha_to[rs_modnn(rs, root[j] * (fcr - 1) + nn)];
fcr               295 lib/reed_solomon/decode_rs.c 			k = (fcr + i) * prim * (nn-loc[j]-1);
fcr                71 lib/reed_solomon/reed_solomon.c 				   int fcr, int prim, int nroots, gfp_t gfp)
fcr                84 lib/reed_solomon/reed_solomon.c 	rs->fcr = fcr;
fcr               135 lib/reed_solomon/reed_solomon.c 	for (i = 0, root = fcr * prim; i < nroots; i++, root += prim) {
fcr               214 lib/reed_solomon/reed_solomon.c 					   int (*gffunc)(int), int fcr,
fcr               224 lib/reed_solomon/reed_solomon.c 	if (fcr < 0 || fcr >= (1<<symsize))
fcr               253 lib/reed_solomon/reed_solomon.c 		if (fcr != cd->fcr)
fcr               266 lib/reed_solomon/reed_solomon.c 	rs->codec = codec_init(symsize, gfpoly, gffunc, fcr, prim, nroots, gfp);
fcr               288 lib/reed_solomon/reed_solomon.c struct rs_control *init_rs_gfp(int symsize, int gfpoly, int fcr, int prim,
fcr               291 lib/reed_solomon/reed_solomon.c 	return init_rs_internal(symsize, gfpoly, NULL, fcr, prim, nroots, gfp);
fcr               308 lib/reed_solomon/reed_solomon.c 					 int fcr, int prim, int nroots)
fcr               310 lib/reed_solomon/reed_solomon.c 	return init_rs_internal(symsize, 0, gffunc, fcr, prim, nroots,
fcr               237 lib/reed_solomon/test_rslib.c 	int fcr = rs->fcr;
fcr               249 lib/reed_solomon/test_rslib.c 						+ (fcr + i) * prim)];
fcr               123 samples/vfio-mdev/mtty.c 	u8 fcr;                 /* FIFO control register */
fcr               371 samples/vfio-mdev/mtty.c 		mdev_state->s[index].fcr = data;