exec 58 arch/alpha/boot/tools/objstrip.c struct exec * aout; /* includes file & aout header */ exec 198 arch/alpha/boot/tools/objstrip.c aout = (struct exec *) buf; exec 90 arch/alpha/include/uapi/asm/a.out.h (sizeof(struct exec) + (x).fh.f_nscns*SCNHSZ + SCNROUND - 1) & ~(SCNROUND - 1)) exec 11 arch/alpha/kernel/binfmt_loader.c struct exec *eh = (struct exec *)bprm->buf; exec 67 arch/arc/mm/fault.c unsigned int write = 0, exec = 0, mask; exec 95 arch/arc/mm/fault.c exec = 1; exec 120 arch/arc/mm/fault.c if (exec) exec 24 arch/mips/fw/arc/salone.c return ARC_CALL4(exec, Path, Argc, Argv, Envp); exec 190 arch/mips/include/asm/sgiarcs.h LONG exec; /* Load and begin execution of a exec 599 arch/mips/kernel/smp.c int exec = vma->vm_flags & VM_EXEC; exec 609 arch/mips/kernel/smp.c set_cpu_context(cpu, mm, !exec); exec 241 arch/mips/mm/c-r3k.c int exec = vma->vm_flags & VM_EXEC; exec 265 arch/mips/mm/c-r3k.c if (exec) exec 579 arch/mips/mm/c-r4k.c int exec = vma->vm_flags & VM_EXEC; exec 589 arch/mips/mm/c-r4k.c if (cpu_has_dc_aliases || (exec && !cpu_has_ic_fills_f_dc)) exec 592 arch/mips/mm/c-r4k.c if (exec) exec 599 arch/mips/mm/c-r4k.c int exec = vma->vm_flags & VM_EXEC; exec 601 arch/mips/mm/c-r4k.c if (cpu_has_dc_aliases || exec) exec 649 arch/mips/mm/c-r4k.c int exec = vma->vm_flags & VM_EXEC; exec 695 arch/mips/mm/c-r4k.c if (cpu_has_dc_aliases || (exec && !cpu_has_ic_fills_f_dc)) { exec 698 arch/mips/mm/c-r4k.c if (exec && !cpu_icache_snoops_remote_store) exec 701 arch/mips/mm/c-r4k.c if (exec) { exec 170 arch/mips/mm/c-tx39.c int exec = vma->vm_flags & VM_EXEC; exec 204 arch/mips/mm/c-tx39.c if (cpu_has_dc_aliases || exec) exec 206 arch/mips/mm/c-tx39.c if (exec) exec 216 arch/mips/mm/c-tx39.c if (cpu_has_dc_aliases || exec) exec 218 arch/mips/mm/c-tx39.c if (exec) exec 134 arch/mips/mm/cache.c int exec = !pte_no_exec(pte) && !cpu_has_ic_fills_f_dc; exec 146 arch/mips/mm/cache.c if (exec || pages_do_alias(addr, address & PAGE_MASK)) exec 254 arch/parisc/include/asm/processor.h elf_caddr_t *argv = (elf_caddr_t *)bprm->exec + 1; \ exec 231 arch/powerpc/mm/book3s64/radix_pgtable.c print_mapping(unsigned long start, unsigned long end, unsigned long size, bool exec) exec 241 arch/powerpc/mm/book3s64/radix_pgtable.c exec ? " (exec)" : ""); exec 258 arch/powerpc/mm/book3s64/radix_pgtable.c bool prev_exec, exec = false; exec 269 arch/powerpc/mm/book3s64/radix_pgtable.c prev_exec = exec; exec 289 arch/powerpc/mm/book3s64/radix_pgtable.c exec = true; exec 292 arch/powerpc/mm/book3s64/radix_pgtable.c exec = false; exec 295 arch/powerpc/mm/book3s64/radix_pgtable.c if (mapping_size != previous_size || exec != prev_exec) { exec 307 arch/powerpc/mm/book3s64/radix_pgtable.c print_mapping(start, addr, mapping_size, exec); exec 319 arch/powerpc/mm/book3s64/slb.c unsigned long exec = 0x10000000; exec 348 arch/powerpc/mm/book3s64/slb.c if (!is_kernel_addr(exec)) { exec 349 arch/powerpc/mm/book3s64/slb.c if (preload_add(ti, exec)) exec 350 arch/powerpc/mm/book3s64/slb.c slb_allocate_user(mm, exec); exec 41 arch/sparc/include/uapi/asm/oradax.h struct ccb_exec_result exec; exec 71 arch/sparc/mm/tlb.c bool exec, unsigned int hugepage_shift) exec 77 arch/sparc/mm/tlb.c if (exec) exec 156 arch/sparc/mm/tlb.c bool exec = pte_exec(*pte); exec 158 arch/sparc/mm/tlb.c tlb_batch_add_one(mm, vaddr, exec, PAGE_SHIFT); exec 208 arch/sparc/mm/tlb.c bool exec = pte_exec(orig_pte); exec 210 arch/sparc/mm/tlb.c tlb_batch_add_one(mm, addr, exec, REAL_HPAGE_SHIFT); exec 211 arch/sparc/mm/tlb.c tlb_batch_add_one(mm, addr + REAL_HPAGE_SIZE, exec, exec 35 arch/um/include/asm/processor-generic.h } fork, exec; exec 109 arch/x86/ia32/ia32_aout.c struct exec ex; exec 112 arch/x86/ia32/ia32_aout.c ex = *((struct exec *) bprm->buf); /* exec-header */ exec 253 arch/x86/ia32/ia32_aout.c struct exec ex; exec 49 arch/x86/kvm/vmx/vmcs.h u32 exec; exec 428 arch/x86/kvm/vmx/vmx.h BUILD_CONTROLS_SHADOW(exec, CPU_BASED_VM_EXEC_CONTROL) exec 46 arch/x86/mm/pageattr-test.c long lpg, gpg, spg, exec; exec 55 arch/x86/mm/pageattr-test.c s->lpg = s->gpg = s->spg = s->exec = 0; exec 87 arch/x86/mm/pageattr-test.c s->exec++; exec 97 arch/x86/mm/pageattr-test.c s->spg, s->lpg, s->gpg, s->exec, exec 106 drivers/connector/cn_proc.c ev->event_data.exec.process_pid = task->pid; exec 107 drivers/connector/cn_proc.c ev->event_data.exec.process_tgid = task->tgid; exec 132 drivers/dma/sirf-dma.c void (*exec)(struct sirfsoc_dma_desc *sdesc, exec 859 drivers/dma/sirf-dma.c sdma->exec_desc = data->exec; exec 1122 drivers/dma/sirf-dma.c .exec = sirfsoc_dma_execute_hw_a6, exec 1127 drivers/dma/sirf-dma.c .exec = sirfsoc_dma_execute_hw_a7v1, exec 1132 drivers/dma/sirf-dma.c .exec = sirfsoc_dma_execute_hw_a7v2, exec 220 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c struct drm_i915_gem_exec_object2 *exec; /** ioctl execobj[] */ exec 276 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c #define exec_entry(EB, VMA) (&(EB)->exec[(VMA)->exec_flags - (EB)->flags]) exec 464 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c entry->handle, (int)(entry - eb->exec)); exec 495 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c struct drm_i915_gem_exec_object2 *entry = &eb->exec[i]; exec 763 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c u32 handle = eb->exec[i].handle; exec 813 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c eb_vma_misplaced(&eb->exec[i], vma, eb->flags[i])); exec 1588 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c const unsigned int nreloc = eb->exec[i].relocation_count; exec 1596 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c err = check_relocations(&eb->exec[i]); exec 1600 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c urelocs = u64_to_user_ptr(eb->exec[i].relocs_ptr); exec 1642 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c eb->exec[i].relocs_ptr = (uintptr_t)relocs; exec 1654 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c relocs = u64_to_ptr(typeof(*relocs), eb->exec[i].relocs_ptr); exec 1655 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c if (eb->exec[i].relocation_count) exec 1672 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c err = check_relocations(&eb->exec[i]); exec 1772 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c &eb->exec[i]; exec 1903 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c eb->exec = NULL; exec 1914 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c static bool i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec) exec 1916 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c if (exec->flags & __I915_EXEC_ILLEGAL_FLAGS) exec 1920 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c if (!(exec->flags & I915_EXEC_FENCE_ARRAY)) { exec 1921 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c if (exec->num_cliprects || exec->cliprects_ptr) exec 1925 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c if (exec->DR4 == 0xffffffff) { exec 1927 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c exec->DR4 = 0; exec 1929 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c if (exec->DR1 || exec->DR4) exec 1932 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c if ((exec->batch_start_offset | exec->batch_len) & 0x7) exec 2480 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c struct drm_i915_gem_exec_object2 *exec, exec 2501 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c eb.exec = exec; exec 2502 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c eb.vma = (struct i915_vma **)(exec + args->buffer_count + 1); exec 2713 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c if (eb.exec) exec 3688 drivers/gpu/drm/i915/gt/intel_lrc.c intel_engine_mask_t allowed, exec; exec 3698 drivers/gpu/drm/i915/gt/intel_lrc.c exec = READ_ONCE(rq->execution_mask); exec 3699 drivers/gpu/drm/i915/gt/intel_lrc.c while (!try_cmpxchg(&rq->execution_mask, &exec, exec & allowed)) exec 65 drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/dcb.h int dcb_outp_foreach(struct nvkm_bios *, void *data, int (*exec) exec 14 drivers/gpu/drm/nouveau/include/nvkm/subdev/bus.h int nvkm_hwsq_fini(struct nvkm_hwsq **, bool exec); exec 50 drivers/gpu/drm/nouveau/include/nvkm/subdev/pmu.h int nvkm_memx_fini(struct nvkm_memx **, bool exec); exec 8 drivers/gpu/drm/nouveau/include/nvkm/subdev/timer.h struct list_head exec; exec 1327 drivers/gpu/drm/nouveau/nouveau_bios.c int (*exec)(struct drm_device *, void *, int idx, u8 *outp)) exec 1342 drivers/gpu/drm/nouveau/nouveau_bios.c ret = exec(dev, data, idx, outp); exec 1169 drivers/gpu/drm/nouveau/nouveau_bo.c int (*exec)(struct nouveau_channel *, exec 1220 drivers/gpu/drm/nouveau/nouveau_bo.c drm->ttm.move = mthd->exec; exec 1225 drivers/gpu/drm/nouveau/nouveau_bo.c } while ((++mthd)->exec); exec 212 drivers/gpu/drm/nouveau/nvkm/subdev/bios/dcb.c int (*exec)(struct nvkm_bios *, void *, int, u16)) exec 229 drivers/gpu/drm/nouveau/nvkm/subdev/bios/dcb.c ret = exec(bios, data, idx, outp); exec 65 drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c init_exec_set(struct nvbios_init *init, bool exec) exec 67 drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c if (exec) init->execute &= 0xfd; exec 78 drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c init_exec_force(struct nvbios_init *init, bool exec) exec 80 drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c if (exec) init->execute |= 0x04; exec 2228 drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c void (*exec)(struct nvbios_init *); exec 2310 drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c !init_opcode[opcode].exec) { exec 2315 drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c init_opcode[opcode].exec(init); exec 61 drivers/gpu/drm/nouveau/nvkm/subdev/bus/hwsq.c nvkm_hwsq_fini(struct nvkm_hwsq **phwsq, bool exec) exec 70 drivers/gpu/drm/nouveau/nvkm/subdev/bus/hwsq.c if (exec) exec 75 drivers/gpu/drm/nouveau/nvkm/subdev/bus/hwsq.h hwsq_exec(struct hwsq *ram, bool exec) exec 79 drivers/gpu/drm/nouveau/nvkm/subdev/bus/hwsq.h ret = nvkm_hwsq_fini(&ram->hwsq, exec); exec 420 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c void (*exec)(struct gf100_clk *, int); exec 434 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.c stage[i].exec(clk, j); exec 453 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c void (*exec)(struct gk104_clk *, int); exec 471 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.c stage[i].exec(clk, j); exec 125 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm200.c u32 exec, args; exec 135 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm200.c ret = pmu_load(init, 0x04, post, &exec, &args); exec 160 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm200.c pmu_exec(init, exec); exec 71 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramfuc.h ramfuc_exec(struct ramfuc *ram, bool exec) exec 75 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramfuc.h ret = nvkm_memx_fini(&ram->memx, exec); exec 888 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgt215.c bool exec = nvkm_boolopt(device->cfgopt, "NvMemExec", true); exec 890 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgt215.c if (exec) { exec 200 drivers/gpu/drm/nouveau/nvkm/subdev/mxm/base.c bool (*exec)(struct nvkm_mxm *, u8 version); exec 218 drivers/gpu/drm/nouveau/nvkm/subdev/mxm/base.c if (shadow->exec(mxm, version)) { exec 97 drivers/gpu/drm/nouveau/nvkm/subdev/mxm/mxms.c bool (*exec)(struct nvkm_mxm *, u8 *, void *), void *info) exec 148 drivers/gpu/drm/nouveau/nvkm/subdev/mxm/mxms.c if (mxm->subdev.debug >= NV_DBG_DEBUG && (exec == NULL)) { exec 170 drivers/gpu/drm/nouveau/nvkm/subdev/mxm/mxms.c if (!exec(mxm, desc, info)) exec 72 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c nvkm_memx_fini(struct nvkm_memx **pmemx, bool exec) exec 88 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c if (exec) { exec 73 drivers/gpu/drm/nouveau/nvkm/subdev/timer/base.c LIST_HEAD(exec); exec 90 drivers/gpu/drm/nouveau/nvkm/subdev/timer/base.c list_add(&alarm->exec, &exec); exec 99 drivers/gpu/drm/nouveau/nvkm/subdev/timer/base.c list_for_each_entry_safe(alarm, atemp, &exec, exec) { exec 100 drivers/gpu/drm/nouveau/nvkm/subdev/timer/base.c list_del(&alarm->exec); exec 804 drivers/gpu/drm/vc4/vc4_drv.h void vc4_move_job_to_render(struct drm_device *dev, struct vc4_exec_info *exec); exec 861 drivers/gpu/drm/vc4/vc4_drv.h struct vc4_exec_info *exec); exec 864 drivers/gpu/drm/vc4/vc4_drv.h vc4_validate_shader_recs(struct drm_device *dev, struct vc4_exec_info *exec); exec 866 drivers/gpu/drm/vc4/vc4_drv.h struct drm_gem_cma_object *vc4_use_bo(struct vc4_exec_info *exec, exec 869 drivers/gpu/drm/vc4/vc4_drv.h int vc4_get_rcl(struct drm_device *dev, struct vc4_exec_info *exec); exec 871 drivers/gpu/drm/vc4/vc4_drv.h bool vc4_check_tex_size(struct vc4_exec_info *exec, exec 154 drivers/gpu/drm/vc4/vc4_gem.c struct vc4_exec_info *exec[2]; exec 166 drivers/gpu/drm/vc4/vc4_gem.c exec[0] = vc4_first_bin_job(vc4); exec 167 drivers/gpu/drm/vc4/vc4_gem.c exec[1] = vc4_first_render_job(vc4); exec 168 drivers/gpu/drm/vc4/vc4_gem.c if (!exec[0] && !exec[1]) { exec 176 drivers/gpu/drm/vc4/vc4_gem.c if (!exec[i]) exec 180 drivers/gpu/drm/vc4/vc4_gem.c list_for_each_entry(bo, &exec[i]->unref_list, unref_head) exec 182 drivers/gpu/drm/vc4/vc4_gem.c state->bo_count += exec[i]->bo_count + unref_list_count; exec 195 drivers/gpu/drm/vc4/vc4_gem.c if (!exec[i]) exec 198 drivers/gpu/drm/vc4/vc4_gem.c for (j = 0; j < exec[i]->bo_count; j++) { exec 199 drivers/gpu/drm/vc4/vc4_gem.c bo = to_vc4_bo(&exec[i]->bo[j]->base); exec 207 drivers/gpu/drm/vc4/vc4_gem.c drm_gem_object_get(&exec[i]->bo[j]->base); exec 208 drivers/gpu/drm/vc4/vc4_gem.c kernel_state->bo[k++] = &exec[i]->bo[j]->base; exec 211 drivers/gpu/drm/vc4/vc4_gem.c list_for_each_entry(bo, &exec[i]->unref_list, unref_head) { exec 222 drivers/gpu/drm/vc4/vc4_gem.c if (exec[0]) exec 223 drivers/gpu/drm/vc4/vc4_gem.c state->start_bin = exec[0]->ct0ca; exec 224 drivers/gpu/drm/vc4/vc4_gem.c if (exec[1]) exec 225 drivers/gpu/drm/vc4/vc4_gem.c state->start_render = exec[1]->ct1ca; exec 469 drivers/gpu/drm/vc4/vc4_gem.c struct vc4_exec_info *exec; exec 472 drivers/gpu/drm/vc4/vc4_gem.c exec = vc4_first_bin_job(vc4); exec 473 drivers/gpu/drm/vc4/vc4_gem.c if (!exec) exec 481 drivers/gpu/drm/vc4/vc4_gem.c if (exec->perfmon && vc4->active_perfmon != exec->perfmon) exec 482 drivers/gpu/drm/vc4/vc4_gem.c vc4_perfmon_start(vc4, exec->perfmon); exec 487 drivers/gpu/drm/vc4/vc4_gem.c if (exec->ct0ca != exec->ct0ea) { exec 488 drivers/gpu/drm/vc4/vc4_gem.c submit_cl(dev, 0, exec->ct0ca, exec->ct0ea); exec 492 drivers/gpu/drm/vc4/vc4_gem.c vc4_move_job_to_render(dev, exec); exec 500 drivers/gpu/drm/vc4/vc4_gem.c if (next && next->perfmon == exec->perfmon) exec 509 drivers/gpu/drm/vc4/vc4_gem.c struct vc4_exec_info *exec = vc4_first_render_job(vc4); exec 511 drivers/gpu/drm/vc4/vc4_gem.c if (!exec) exec 522 drivers/gpu/drm/vc4/vc4_gem.c submit_cl(dev, 1, exec->ct1ca, exec->ct1ea); exec 526 drivers/gpu/drm/vc4/vc4_gem.c vc4_move_job_to_render(struct drm_device *dev, struct vc4_exec_info *exec) exec 531 drivers/gpu/drm/vc4/vc4_gem.c list_move_tail(&exec->head, &vc4->render_job_list); exec 537 drivers/gpu/drm/vc4/vc4_gem.c vc4_update_bo_seqnos(struct vc4_exec_info *exec, uint64_t seqno) exec 542 drivers/gpu/drm/vc4/vc4_gem.c for (i = 0; i < exec->bo_count; i++) { exec 543 drivers/gpu/drm/vc4/vc4_gem.c bo = to_vc4_bo(&exec->bo[i]->base); exec 546 drivers/gpu/drm/vc4/vc4_gem.c dma_resv_add_shared_fence(bo->base.base.resv, exec->fence); exec 549 drivers/gpu/drm/vc4/vc4_gem.c list_for_each_entry(bo, &exec->unref_list, unref_head) { exec 553 drivers/gpu/drm/vc4/vc4_gem.c for (i = 0; i < exec->rcl_write_bo_count; i++) { exec 554 drivers/gpu/drm/vc4/vc4_gem.c bo = to_vc4_bo(&exec->rcl_write_bo[i]->base); exec 557 drivers/gpu/drm/vc4/vc4_gem.c dma_resv_add_excl_fence(bo->base.base.resv, exec->fence); exec 563 drivers/gpu/drm/vc4/vc4_gem.c struct vc4_exec_info *exec, exec 568 drivers/gpu/drm/vc4/vc4_gem.c for (i = 0; i < exec->bo_count; i++) { exec 569 drivers/gpu/drm/vc4/vc4_gem.c struct drm_gem_object *bo = &exec->bo[i]->base; exec 586 drivers/gpu/drm/vc4/vc4_gem.c struct vc4_exec_info *exec, exec 597 drivers/gpu/drm/vc4/vc4_gem.c bo = &exec->bo[contended_lock]->base; exec 606 drivers/gpu/drm/vc4/vc4_gem.c for (i = 0; i < exec->bo_count; i++) { exec 610 drivers/gpu/drm/vc4/vc4_gem.c bo = &exec->bo[i]->base; exec 617 drivers/gpu/drm/vc4/vc4_gem.c bo = &exec->bo[j]->base; exec 622 drivers/gpu/drm/vc4/vc4_gem.c bo = &exec->bo[contended_lock]->base; exec 642 drivers/gpu/drm/vc4/vc4_gem.c for (i = 0; i < exec->bo_count; i++) { exec 643 drivers/gpu/drm/vc4/vc4_gem.c bo = &exec->bo[i]->base; exec 647 drivers/gpu/drm/vc4/vc4_gem.c vc4_unlock_bo_reservations(dev, exec, acquire_ctx); exec 665 drivers/gpu/drm/vc4/vc4_gem.c vc4_queue_submit(struct drm_device *dev, struct vc4_exec_info *exec, exec 683 drivers/gpu/drm/vc4/vc4_gem.c exec->seqno = seqno; exec 686 drivers/gpu/drm/vc4/vc4_gem.c vc4->dma_fence_context, exec->seqno); exec 687 drivers/gpu/drm/vc4/vc4_gem.c fence->seqno = exec->seqno; exec 688 drivers/gpu/drm/vc4/vc4_gem.c exec->fence = &fence->base; exec 691 drivers/gpu/drm/vc4/vc4_gem.c drm_syncobj_replace_fence(out_sync, exec->fence); exec 693 drivers/gpu/drm/vc4/vc4_gem.c vc4_update_bo_seqnos(exec, seqno); exec 695 drivers/gpu/drm/vc4/vc4_gem.c vc4_unlock_bo_reservations(dev, exec, acquire_ctx); exec 697 drivers/gpu/drm/vc4/vc4_gem.c list_add_tail(&exec->head, &vc4->bin_job_list); exec 705 drivers/gpu/drm/vc4/vc4_gem.c if (vc4_first_bin_job(vc4) == exec && exec 706 drivers/gpu/drm/vc4/vc4_gem.c (!renderjob || renderjob->perfmon == exec->perfmon)) { exec 730 drivers/gpu/drm/vc4/vc4_gem.c struct vc4_exec_info *exec) exec 732 drivers/gpu/drm/vc4/vc4_gem.c struct drm_vc4_submit_cl *args = exec->args; exec 737 drivers/gpu/drm/vc4/vc4_gem.c exec->bo_count = args->bo_handle_count; exec 739 drivers/gpu/drm/vc4/vc4_gem.c if (!exec->bo_count) { exec 747 drivers/gpu/drm/vc4/vc4_gem.c exec->bo = kvmalloc_array(exec->bo_count, exec 750 drivers/gpu/drm/vc4/vc4_gem.c if (!exec->bo) { exec 755 drivers/gpu/drm/vc4/vc4_gem.c handles = kvmalloc_array(exec->bo_count, sizeof(uint32_t), GFP_KERNEL); exec 763 drivers/gpu/drm/vc4/vc4_gem.c exec->bo_count * sizeof(uint32_t))) { exec 770 drivers/gpu/drm/vc4/vc4_gem.c for (i = 0; i < exec->bo_count; i++) { exec 781 drivers/gpu/drm/vc4/vc4_gem.c exec->bo[i] = (struct drm_gem_cma_object *)bo; exec 788 drivers/gpu/drm/vc4/vc4_gem.c for (i = 0; i < exec->bo_count; i++) { exec 789 drivers/gpu/drm/vc4/vc4_gem.c ret = vc4_bo_inc_usecnt(to_vc4_bo(&exec->bo[i]->base)); exec 807 drivers/gpu/drm/vc4/vc4_gem.c vc4_bo_dec_usecnt(to_vc4_bo(&exec->bo[i]->base)); exec 811 drivers/gpu/drm/vc4/vc4_gem.c for (i = 0; i < exec->bo_count && exec->bo[i]; i++) exec 812 drivers/gpu/drm/vc4/vc4_gem.c drm_gem_object_put_unlocked(&exec->bo[i]->base); exec 816 drivers/gpu/drm/vc4/vc4_gem.c kvfree(exec->bo); exec 817 drivers/gpu/drm/vc4/vc4_gem.c exec->bo = NULL; exec 822 drivers/gpu/drm/vc4/vc4_gem.c vc4_get_bcl(struct drm_device *dev, struct vc4_exec_info *exec) exec 824 drivers/gpu/drm/vc4/vc4_gem.c struct drm_vc4_submit_cl *args = exec->args; exec 864 drivers/gpu/drm/vc4/vc4_gem.c exec->shader_rec_u = temp + shader_rec_offset; exec 865 drivers/gpu/drm/vc4/vc4_gem.c exec->uniforms_u = temp + uniforms_offset; exec 866 drivers/gpu/drm/vc4/vc4_gem.c exec->shader_state = temp + exec_size; exec 867 drivers/gpu/drm/vc4/vc4_gem.c exec->shader_state_size = args->shader_rec_count; exec 876 drivers/gpu/drm/vc4/vc4_gem.c if (copy_from_user(exec->shader_rec_u, exec 883 drivers/gpu/drm/vc4/vc4_gem.c if (copy_from_user(exec->uniforms_u, exec 896 drivers/gpu/drm/vc4/vc4_gem.c exec->exec_bo = &bo->base; exec 898 drivers/gpu/drm/vc4/vc4_gem.c list_add_tail(&to_vc4_bo(&exec->exec_bo->base)->unref_head, exec 899 drivers/gpu/drm/vc4/vc4_gem.c &exec->unref_list); exec 901 drivers/gpu/drm/vc4/vc4_gem.c exec->ct0ca = exec->exec_bo->paddr + bin_offset; exec 903 drivers/gpu/drm/vc4/vc4_gem.c exec->bin_u = bin; exec 905 drivers/gpu/drm/vc4/vc4_gem.c exec->shader_rec_v = exec->exec_bo->vaddr + shader_rec_offset; exec 906 drivers/gpu/drm/vc4/vc4_gem.c exec->shader_rec_p = exec->exec_bo->paddr + shader_rec_offset; exec 907 drivers/gpu/drm/vc4/vc4_gem.c exec->shader_rec_size = args->shader_rec_size; exec 909 drivers/gpu/drm/vc4/vc4_gem.c exec->uniforms_v = exec->exec_bo->vaddr + uniforms_offset; exec 910 drivers/gpu/drm/vc4/vc4_gem.c exec->uniforms_p = exec->exec_bo->paddr + uniforms_offset; exec 911 drivers/gpu/drm/vc4/vc4_gem.c exec->uniforms_size = args->uniforms_size; exec 914 drivers/gpu/drm/vc4/vc4_gem.c exec->exec_bo->vaddr + bin_offset, exec 916 drivers/gpu/drm/vc4/vc4_gem.c exec); exec 920 drivers/gpu/drm/vc4/vc4_gem.c ret = vc4_validate_shader_recs(dev, exec); exec 924 drivers/gpu/drm/vc4/vc4_gem.c if (exec->found_tile_binning_mode_config_packet) { exec 925 drivers/gpu/drm/vc4/vc4_gem.c ret = vc4_v3d_bin_bo_get(vc4, &exec->bin_bo_used); exec 934 drivers/gpu/drm/vc4/vc4_gem.c ret = vc4_wait_for_seqno(dev, exec->bin_dep_seqno, ~0ull, true); exec 942 drivers/gpu/drm/vc4/vc4_gem.c vc4_complete_exec(struct drm_device *dev, struct vc4_exec_info *exec) exec 951 drivers/gpu/drm/vc4/vc4_gem.c if (exec->fence) { exec 952 drivers/gpu/drm/vc4/vc4_gem.c dma_fence_signal(exec->fence); exec 953 drivers/gpu/drm/vc4/vc4_gem.c dma_fence_put(exec->fence); exec 956 drivers/gpu/drm/vc4/vc4_gem.c if (exec->bo) { exec 957 drivers/gpu/drm/vc4/vc4_gem.c for (i = 0; i < exec->bo_count; i++) { exec 958 drivers/gpu/drm/vc4/vc4_gem.c struct vc4_bo *bo = to_vc4_bo(&exec->bo[i]->base); exec 961 drivers/gpu/drm/vc4/vc4_gem.c drm_gem_object_put_unlocked(&exec->bo[i]->base); exec 963 drivers/gpu/drm/vc4/vc4_gem.c kvfree(exec->bo); exec 966 drivers/gpu/drm/vc4/vc4_gem.c while (!list_empty(&exec->unref_list)) { exec 967 drivers/gpu/drm/vc4/vc4_gem.c struct vc4_bo *bo = list_first_entry(&exec->unref_list, exec 975 drivers/gpu/drm/vc4/vc4_gem.c vc4->bin_alloc_used &= ~exec->bin_slots; exec 979 drivers/gpu/drm/vc4/vc4_gem.c if (exec->bin_bo_used) exec 983 drivers/gpu/drm/vc4/vc4_gem.c vc4_perfmon_put(exec->perfmon); exec 987 drivers/gpu/drm/vc4/vc4_gem.c kfree(exec); exec 998 drivers/gpu/drm/vc4/vc4_gem.c struct vc4_exec_info *exec = exec 1001 drivers/gpu/drm/vc4/vc4_gem.c list_del(&exec->head); exec 1004 drivers/gpu/drm/vc4/vc4_gem.c vc4_complete_exec(vc4->dev, exec); exec 1135 drivers/gpu/drm/vc4/vc4_gem.c struct vc4_exec_info *exec; exec 1158 drivers/gpu/drm/vc4/vc4_gem.c exec = kcalloc(1, sizeof(*exec), GFP_KERNEL); exec 1159 drivers/gpu/drm/vc4/vc4_gem.c if (!exec) { exec 1166 drivers/gpu/drm/vc4/vc4_gem.c kfree(exec); exec 1170 drivers/gpu/drm/vc4/vc4_gem.c exec->args = args; exec 1171 drivers/gpu/drm/vc4/vc4_gem.c INIT_LIST_HEAD(&exec->unref_list); exec 1173 drivers/gpu/drm/vc4/vc4_gem.c ret = vc4_cl_lookup_bos(dev, file_priv, exec); exec 1178 drivers/gpu/drm/vc4/vc4_gem.c exec->perfmon = vc4_perfmon_find(vc4file, exec 1180 drivers/gpu/drm/vc4/vc4_gem.c if (!exec->perfmon) { exec 1209 drivers/gpu/drm/vc4/vc4_gem.c if (exec->args->bin_cl_size != 0) { exec 1210 drivers/gpu/drm/vc4/vc4_gem.c ret = vc4_get_bcl(dev, exec); exec 1214 drivers/gpu/drm/vc4/vc4_gem.c exec->ct0ca = 0; exec 1215 drivers/gpu/drm/vc4/vc4_gem.c exec->ct0ea = 0; exec 1218 drivers/gpu/drm/vc4/vc4_gem.c ret = vc4_get_rcl(dev, exec); exec 1222 drivers/gpu/drm/vc4/vc4_gem.c ret = vc4_lock_bo_reservations(dev, exec, &acquire_ctx); exec 1243 drivers/gpu/drm/vc4/vc4_gem.c exec->args = NULL; exec 1245 drivers/gpu/drm/vc4/vc4_gem.c ret = vc4_queue_submit(dev, exec, &acquire_ctx, out_sync); exec 1262 drivers/gpu/drm/vc4/vc4_gem.c vc4_complete_exec(vc4->dev, exec); exec 64 drivers/gpu/drm/vc4/vc4_irq.c struct vc4_exec_info *exec; exec 89 drivers/gpu/drm/vc4/vc4_irq.c exec = vc4_first_bin_job(vc4); exec 90 drivers/gpu/drm/vc4/vc4_irq.c if (!exec) exec 91 drivers/gpu/drm/vc4/vc4_irq.c exec = vc4_last_render_job(vc4); exec 92 drivers/gpu/drm/vc4/vc4_irq.c if (exec) { exec 93 drivers/gpu/drm/vc4/vc4_irq.c exec->bin_slots |= vc4->bin_alloc_overflow; exec 117 drivers/gpu/drm/vc4/vc4_irq.c struct vc4_exec_info *next, *exec = vc4_first_bin_job(vc4); exec 119 drivers/gpu/drm/vc4/vc4_irq.c if (!exec) exec 122 drivers/gpu/drm/vc4/vc4_irq.c vc4_move_job_to_render(dev, exec); exec 129 drivers/gpu/drm/vc4/vc4_irq.c if (next && next->perfmon == exec->perfmon) exec 137 drivers/gpu/drm/vc4/vc4_irq.c struct vc4_exec_info *exec = vc4_first_bin_job(vc4); exec 139 drivers/gpu/drm/vc4/vc4_irq.c if (!exec) exec 143 drivers/gpu/drm/vc4/vc4_irq.c if (exec->perfmon) exec 144 drivers/gpu/drm/vc4/vc4_irq.c vc4_perfmon_stop(vc4, exec->perfmon, false); exec 146 drivers/gpu/drm/vc4/vc4_irq.c list_move_tail(&exec->head, &vc4->bin_job_list); exec 154 drivers/gpu/drm/vc4/vc4_irq.c struct vc4_exec_info *exec = vc4_first_render_job(vc4); exec 157 drivers/gpu/drm/vc4/vc4_irq.c if (!exec) exec 161 drivers/gpu/drm/vc4/vc4_irq.c list_move_tail(&exec->head, &vc4->job_done_list); exec 169 drivers/gpu/drm/vc4/vc4_irq.c if (exec->perfmon && !nextrender && exec 170 drivers/gpu/drm/vc4/vc4_irq.c (!nextbin || nextbin->perfmon != exec->perfmon)) exec 171 drivers/gpu/drm/vc4/vc4_irq.c vc4_perfmon_stop(vc4, exec->perfmon, true); exec 182 drivers/gpu/drm/vc4/vc4_irq.c else if (nextbin && nextbin->perfmon != exec->perfmon) exec 185 drivers/gpu/drm/vc4/vc4_irq.c if (exec->fence) { exec 186 drivers/gpu/drm/vc4/vc4_irq.c dma_fence_signal_locked(exec->fence); exec 187 drivers/gpu/drm/vc4/vc4_irq.c dma_fence_put(exec->fence); exec 188 drivers/gpu/drm/vc4/vc4_irq.c exec->fence = NULL; exec 99 drivers/gpu/drm/vc4/vc4_render_cl.c static uint32_t vc4_full_res_offset(struct vc4_exec_info *exec, exec 105 drivers/gpu/drm/vc4/vc4_render_cl.c (DIV_ROUND_UP(exec->args->width, 32) * y + x); exec 123 drivers/gpu/drm/vc4/vc4_render_cl.c static void emit_tile(struct vc4_exec_info *exec, exec 127 drivers/gpu/drm/vc4/vc4_render_cl.c struct drm_vc4_submit_cl *args = exec->args; exec 139 drivers/gpu/drm/vc4/vc4_render_cl.c vc4_full_res_offset(exec, setup->color_read, exec 161 drivers/gpu/drm/vc4/vc4_render_cl.c vc4_full_res_offset(exec, setup->zs_read, exec 185 drivers/gpu/drm/vc4/vc4_render_cl.c rcl_u32(setup, (exec->tile_alloc_offset + exec 186 drivers/gpu/drm/vc4/vc4_render_cl.c (y * exec->bin_tiles_x + x) * 32)); exec 201 drivers/gpu/drm/vc4/vc4_render_cl.c vc4_full_res_offset(exec, setup->msaa_color_write, exec 219 drivers/gpu/drm/vc4/vc4_render_cl.c vc4_full_res_offset(exec, setup->msaa_zs_write, exec 253 drivers/gpu/drm/vc4/vc4_render_cl.c static int vc4_create_rcl_bo(struct drm_device *dev, struct vc4_exec_info *exec, exec 256 drivers/gpu/drm/vc4/vc4_render_cl.c struct drm_vc4_submit_cl *args = exec->args; exec 335 drivers/gpu/drm/vc4/vc4_render_cl.c &exec->unref_list); exec 372 drivers/gpu/drm/vc4/vc4_render_cl.c emit_tile(exec, setup, x, y, first, last); exec 377 drivers/gpu/drm/vc4/vc4_render_cl.c exec->ct1ca = setup->rcl->paddr; exec 378 drivers/gpu/drm/vc4/vc4_render_cl.c exec->ct1ea = setup->rcl->paddr + setup->next_offset; exec 383 drivers/gpu/drm/vc4/vc4_render_cl.c static int vc4_full_res_bounds_check(struct vc4_exec_info *exec, exec 387 drivers/gpu/drm/vc4/vc4_render_cl.c struct drm_vc4_submit_cl *args = exec->args; exec 388 drivers/gpu/drm/vc4/vc4_render_cl.c u32 render_tiles_stride = DIV_ROUND_UP(exec->args->width, 32); exec 409 drivers/gpu/drm/vc4/vc4_render_cl.c static int vc4_rcl_msaa_surface_setup(struct vc4_exec_info *exec, exec 421 drivers/gpu/drm/vc4/vc4_render_cl.c *obj = vc4_use_bo(exec, surf->hindex); exec 425 drivers/gpu/drm/vc4/vc4_render_cl.c exec->rcl_write_bo[exec->rcl_write_bo_count++] = *obj; exec 432 drivers/gpu/drm/vc4/vc4_render_cl.c return vc4_full_res_bounds_check(exec, *obj, surf); exec 435 drivers/gpu/drm/vc4/vc4_render_cl.c static int vc4_rcl_surface_setup(struct vc4_exec_info *exec, exec 457 drivers/gpu/drm/vc4/vc4_render_cl.c *obj = vc4_use_bo(exec, surf->hindex); exec 462 drivers/gpu/drm/vc4/vc4_render_cl.c exec->rcl_write_bo[exec->rcl_write_bo_count++] = *obj; exec 465 drivers/gpu/drm/vc4/vc4_render_cl.c if (surf == &exec->args->zs_write) { exec 476 drivers/gpu/drm/vc4/vc4_render_cl.c ret = vc4_full_res_bounds_check(exec, *obj, surf); exec 525 drivers/gpu/drm/vc4/vc4_render_cl.c if (!vc4_check_tex_size(exec, *obj, surf->offset, tiling, exec 526 drivers/gpu/drm/vc4/vc4_render_cl.c exec->args->width, exec->args->height, cpp)) { exec 534 drivers/gpu/drm/vc4/vc4_render_cl.c vc4_rcl_render_config_surface_setup(struct vc4_exec_info *exec, exec 562 drivers/gpu/drm/vc4/vc4_render_cl.c *obj = vc4_use_bo(exec, surf->hindex); exec 566 drivers/gpu/drm/vc4/vc4_render_cl.c exec->rcl_write_bo[exec->rcl_write_bo_count++] = *obj; exec 586 drivers/gpu/drm/vc4/vc4_render_cl.c if (!vc4_check_tex_size(exec, *obj, surf->offset, tiling, exec 587 drivers/gpu/drm/vc4/vc4_render_cl.c exec->args->width, exec->args->height, cpp)) { exec 594 drivers/gpu/drm/vc4/vc4_render_cl.c int vc4_get_rcl(struct drm_device *dev, struct vc4_exec_info *exec) exec 597 drivers/gpu/drm/vc4/vc4_render_cl.c struct drm_vc4_submit_cl *args = exec->args; exec 610 drivers/gpu/drm/vc4/vc4_render_cl.c (args->max_x_tile > exec->bin_tiles_x || exec 611 drivers/gpu/drm/vc4/vc4_render_cl.c args->max_y_tile > exec->bin_tiles_y)) { exec 615 drivers/gpu/drm/vc4/vc4_render_cl.c exec->bin_tiles_x, exec->bin_tiles_y); exec 619 drivers/gpu/drm/vc4/vc4_render_cl.c ret = vc4_rcl_render_config_surface_setup(exec, &setup, exec 625 drivers/gpu/drm/vc4/vc4_render_cl.c ret = vc4_rcl_surface_setup(exec, &setup.color_read, &args->color_read, exec 630 drivers/gpu/drm/vc4/vc4_render_cl.c ret = vc4_rcl_surface_setup(exec, &setup.zs_read, &args->zs_read, exec 635 drivers/gpu/drm/vc4/vc4_render_cl.c ret = vc4_rcl_surface_setup(exec, &setup.zs_write, &args->zs_write, exec 640 drivers/gpu/drm/vc4/vc4_render_cl.c ret = vc4_rcl_msaa_surface_setup(exec, &setup.msaa_color_write, exec 645 drivers/gpu/drm/vc4/vc4_render_cl.c ret = vc4_rcl_msaa_surface_setup(exec, &setup.msaa_zs_write, exec 659 drivers/gpu/drm/vc4/vc4_render_cl.c return vc4_create_rcl_bo(dev, exec, &setup); exec 175 drivers/gpu/drm/vc4/vc4_v3d.c struct vc4_exec_info *exec; exec 191 drivers/gpu/drm/vc4/vc4_v3d.c exec = vc4_last_render_job(vc4); exec 192 drivers/gpu/drm/vc4/vc4_v3d.c if (exec) exec 193 drivers/gpu/drm/vc4/vc4_v3d.c seqno = exec->seqno; exec 51 drivers/gpu/drm/vc4/vc4_validate.c struct vc4_exec_info *exec, \ exec 106 drivers/gpu/drm/vc4/vc4_validate.c vc4_use_bo(struct vc4_exec_info *exec, uint32_t hindex) exec 111 drivers/gpu/drm/vc4/vc4_validate.c if (hindex >= exec->bo_count) { exec 113 drivers/gpu/drm/vc4/vc4_validate.c hindex, exec->bo_count); exec 116 drivers/gpu/drm/vc4/vc4_validate.c obj = exec->bo[hindex]; exec 129 drivers/gpu/drm/vc4/vc4_validate.c vc4_use_handle(struct vc4_exec_info *exec, uint32_t gem_handles_packet_index) exec 131 drivers/gpu/drm/vc4/vc4_validate.c return vc4_use_bo(exec, exec->bo_index[gem_handles_packet_index]); exec 135 drivers/gpu/drm/vc4/vc4_validate.c validate_bin_pos(struct vc4_exec_info *exec, void *untrusted, uint32_t pos) exec 140 drivers/gpu/drm/vc4/vc4_validate.c return (untrusted - 1 == exec->bin_u + pos); exec 159 drivers/gpu/drm/vc4/vc4_validate.c vc4_check_tex_size(struct vc4_exec_info *exec, struct drm_gem_cma_object *fbo, exec 216 drivers/gpu/drm/vc4/vc4_validate.c if (!validate_bin_pos(exec, untrusted, exec->args->bin_cl_size - 1)) { exec 220 drivers/gpu/drm/vc4/vc4_validate.c exec->found_flush = true; exec 228 drivers/gpu/drm/vc4/vc4_validate.c if (exec->found_start_tile_binning_packet) { exec 232 drivers/gpu/drm/vc4/vc4_validate.c exec->found_start_tile_binning_packet = true; exec 234 drivers/gpu/drm/vc4/vc4_validate.c if (!exec->found_tile_binning_mode_config_packet) { exec 245 drivers/gpu/drm/vc4/vc4_validate.c if (!validate_bin_pos(exec, untrusted, exec->args->bin_cl_size - 2)) { exec 250 drivers/gpu/drm/vc4/vc4_validate.c exec->found_increment_semaphore_packet = true; exec 266 drivers/gpu/drm/vc4/vc4_validate.c if (exec->shader_state_count == 0) { exec 270 drivers/gpu/drm/vc4/vc4_validate.c shader_state = &exec->shader_state[exec->shader_state_count - 1]; exec 275 drivers/gpu/drm/vc4/vc4_validate.c ib = vc4_use_handle(exec, 0); exec 279 drivers/gpu/drm/vc4/vc4_validate.c exec->bin_dep_seqno = max(exec->bin_dep_seqno, exec 303 drivers/gpu/drm/vc4/vc4_validate.c if (exec->shader_state_count == 0) { exec 307 drivers/gpu/drm/vc4/vc4_validate.c shader_state = &exec->shader_state[exec->shader_state_count - 1]; exec 324 drivers/gpu/drm/vc4/vc4_validate.c uint32_t i = exec->shader_state_count++; exec 326 drivers/gpu/drm/vc4/vc4_validate.c if (i >= exec->shader_state_size) { exec 331 drivers/gpu/drm/vc4/vc4_validate.c exec->shader_state[i].addr = *(uint32_t *)untrusted; exec 332 drivers/gpu/drm/vc4/vc4_validate.c exec->shader_state[i].max_index = 0; exec 334 drivers/gpu/drm/vc4/vc4_validate.c if (exec->shader_state[i].addr & ~0xf) { exec 339 drivers/gpu/drm/vc4/vc4_validate.c *(uint32_t *)validated = (exec->shader_rec_p + exec 340 drivers/gpu/drm/vc4/vc4_validate.c exec->shader_state[i].addr); exec 342 drivers/gpu/drm/vc4/vc4_validate.c exec->shader_rec_p += exec 343 drivers/gpu/drm/vc4/vc4_validate.c roundup(gl_shader_rec_size(exec->shader_state[i].addr), 16); exec 351 drivers/gpu/drm/vc4/vc4_validate.c struct drm_device *dev = exec->exec_bo->base.dev; exec 358 drivers/gpu/drm/vc4/vc4_validate.c if (exec->found_tile_binning_mode_config_packet) { exec 362 drivers/gpu/drm/vc4/vc4_validate.c exec->found_tile_binning_mode_config_packet = true; exec 364 drivers/gpu/drm/vc4/vc4_validate.c exec->bin_tiles_x = *(uint8_t *)(untrusted + 12); exec 365 drivers/gpu/drm/vc4/vc4_validate.c exec->bin_tiles_y = *(uint8_t *)(untrusted + 13); exec 366 drivers/gpu/drm/vc4/vc4_validate.c tile_count = exec->bin_tiles_x * exec->bin_tiles_y; exec 369 drivers/gpu/drm/vc4/vc4_validate.c if (exec->bin_tiles_x == 0 || exec 370 drivers/gpu/drm/vc4/vc4_validate.c exec->bin_tiles_y == 0) { exec 372 drivers/gpu/drm/vc4/vc4_validate.c exec->bin_tiles_x, exec->bin_tiles_y); exec 394 drivers/gpu/drm/vc4/vc4_validate.c exec->bin_slots |= BIT(bin_slot); exec 403 drivers/gpu/drm/vc4/vc4_validate.c exec->tile_alloc_offset = bin_addr + roundup(tile_state_size, 4096); exec 415 drivers/gpu/drm/vc4/vc4_validate.c *(uint32_t *)(validated + 0) = exec->tile_alloc_offset; exec 418 drivers/gpu/drm/vc4/vc4_validate.c exec->tile_alloc_offset); exec 428 drivers/gpu/drm/vc4/vc4_validate.c memcpy(exec->bo_index, untrusted, sizeof(exec->bo_index)); exec 438 drivers/gpu/drm/vc4/vc4_validate.c int (*func)(struct vc4_exec_info *exec, void *validated, exec 483 drivers/gpu/drm/vc4/vc4_validate.c struct vc4_exec_info *exec) exec 485 drivers/gpu/drm/vc4/vc4_validate.c uint32_t len = exec->args->bin_cl_size; exec 519 drivers/gpu/drm/vc4/vc4_validate.c if (info->func && info->func(exec, exec 537 drivers/gpu/drm/vc4/vc4_validate.c exec->ct0ea = exec->ct0ca + dst_offset; exec 539 drivers/gpu/drm/vc4/vc4_validate.c if (!exec->found_start_tile_binning_packet) { exec 551 drivers/gpu/drm/vc4/vc4_validate.c if (!exec->found_increment_semaphore_packet || !exec->found_flush) { exec 561 drivers/gpu/drm/vc4/vc4_validate.c reloc_tex(struct vc4_exec_info *exec, exec 573 drivers/gpu/drm/vc4/vc4_validate.c uint32_t *validated_p0 = exec->uniforms_v + sample->p_offset[0]; exec 583 drivers/gpu/drm/vc4/vc4_validate.c tex = vc4_use_bo(exec, texture_handle_index); exec 678 drivers/gpu/drm/vc4/vc4_validate.c if (!vc4_check_tex_size(exec, tex, offset + cube_map_stride * 5, exec 730 drivers/gpu/drm/vc4/vc4_validate.c exec->bin_dep_seqno = max(exec->bin_dep_seqno, exec 745 drivers/gpu/drm/vc4/vc4_validate.c struct vc4_exec_info *exec, exec 766 drivers/gpu/drm/vc4/vc4_validate.c if (nr_relocs * 4 > exec->shader_rec_size) { exec 769 drivers/gpu/drm/vc4/vc4_validate.c nr_relocs, exec->shader_rec_size); exec 772 drivers/gpu/drm/vc4/vc4_validate.c src_handles = exec->shader_rec_u; exec 773 drivers/gpu/drm/vc4/vc4_validate.c exec->shader_rec_u += nr_relocs * 4; exec 774 drivers/gpu/drm/vc4/vc4_validate.c exec->shader_rec_size -= nr_relocs * 4; exec 776 drivers/gpu/drm/vc4/vc4_validate.c if (packet_size > exec->shader_rec_size) { exec 779 drivers/gpu/drm/vc4/vc4_validate.c packet_size, exec->shader_rec_size); exec 782 drivers/gpu/drm/vc4/vc4_validate.c pkt_u = exec->shader_rec_u; exec 783 drivers/gpu/drm/vc4/vc4_validate.c pkt_v = exec->shader_rec_v; exec 785 drivers/gpu/drm/vc4/vc4_validate.c exec->shader_rec_u += packet_size; exec 792 drivers/gpu/drm/vc4/vc4_validate.c exec->shader_rec_v += roundup(packet_size, 16); exec 793 drivers/gpu/drm/vc4/vc4_validate.c exec->shader_rec_size -= packet_size; exec 796 drivers/gpu/drm/vc4/vc4_validate.c if (src_handles[i] > exec->bo_count) { exec 801 drivers/gpu/drm/vc4/vc4_validate.c bo[i] = exec->bo[src_handles[i]]; exec 806 drivers/gpu/drm/vc4/vc4_validate.c bo[i] = vc4_use_bo(exec, src_handles[i]); exec 844 drivers/gpu/drm/vc4/vc4_validate.c exec->uniforms_size) { exec 849 drivers/gpu/drm/vc4/vc4_validate.c texture_handles_u = exec->uniforms_u; exec 853 drivers/gpu/drm/vc4/vc4_validate.c memcpy(exec->uniforms_v, uniform_data_u, exec 859 drivers/gpu/drm/vc4/vc4_validate.c if (!reloc_tex(exec, exec 876 drivers/gpu/drm/vc4/vc4_validate.c ((uint32_t *)exec->uniforms_v)[o] = exec->uniforms_p; exec 879 drivers/gpu/drm/vc4/vc4_validate.c *(uint32_t *)(pkt_v + o + 4) = exec->uniforms_p; exec 881 drivers/gpu/drm/vc4/vc4_validate.c exec->uniforms_u += validated_shader->uniforms_src_size; exec 882 drivers/gpu/drm/vc4/vc4_validate.c exec->uniforms_v += validated_shader->uniforms_size; exec 883 drivers/gpu/drm/vc4/vc4_validate.c exec->uniforms_p += validated_shader->uniforms_size; exec 895 drivers/gpu/drm/vc4/vc4_validate.c exec->bin_dep_seqno = max(exec->bin_dep_seqno, exec 927 drivers/gpu/drm/vc4/vc4_validate.c struct vc4_exec_info *exec) exec 932 drivers/gpu/drm/vc4/vc4_validate.c for (i = 0; i < exec->shader_state_count; i++) { exec 933 drivers/gpu/drm/vc4/vc4_validate.c ret = validate_gl_shader_rec(dev, exec, &exec->shader_state[i]); exec 165 drivers/leds/leds-lp5521.c u8 exec; exec 184 drivers/leds/leds-lp5521.c ret = lp55xx_read(chip, LP5521_REG_ENABLE, &exec); exec 191 drivers/leds/leds-lp5521.c exec = (exec & ~LP5521_EXEC_R_M) | LP5521_RUN_R; exec 196 drivers/leds/leds-lp5521.c exec = (exec & ~LP5521_EXEC_G_M) | LP5521_RUN_G; exec 201 drivers/leds/leds-lp5521.c exec = (exec & ~LP5521_EXEC_B_M) | LP5521_RUN_B; exec 207 drivers/leds/leds-lp5521.c lp55xx_update_bits(chip, LP5521_REG_ENABLE, LP5521_EXEC_M, exec); exec 221 drivers/leds/leds-lp5523.c u8 exec; exec 239 drivers/leds/leds-lp5523.c ret = lp55xx_read(chip, LP5523_REG_ENABLE, &exec); exec 246 drivers/leds/leds-lp5523.c exec = (exec & ~LP5523_EXEC_ENG1_M) | LP5523_RUN_ENG1; exec 251 drivers/leds/leds-lp5523.c exec = (exec & ~LP5523_EXEC_ENG2_M) | LP5523_RUN_ENG2; exec 256 drivers/leds/leds-lp5523.c exec = (exec & ~LP5523_EXEC_ENG3_M) | LP5523_RUN_ENG3; exec 262 drivers/leds/leds-lp5523.c lp55xx_update_bits(chip, LP5523_REG_ENABLE, LP5523_EXEC_M, exec); exec 157 drivers/leds/leds-lp5562.c u8 exec; exec 179 drivers/leds/leds-lp5562.c ret = lp55xx_read(chip, LP5562_REG_ENABLE, &exec); exec 186 drivers/leds/leds-lp5562.c exec = (exec & ~LP5562_EXEC_ENG1_M) | LP5562_RUN_ENG1; exec 191 drivers/leds/leds-lp5562.c exec = (exec & ~LP5562_EXEC_ENG2_M) | LP5562_RUN_ENG2; exec 196 drivers/leds/leds-lp5562.c exec = (exec & ~LP5562_EXEC_ENG3_M) | LP5562_RUN_ENG3; exec 202 drivers/leds/leds-lp5562.c lp55xx_update_bits(chip, LP5562_REG_ENABLE, LP5562_EXEC_M, exec); exec 160 drivers/leds/leds-lp8501.c u8 exec; exec 178 drivers/leds/leds-lp8501.c ret = lp55xx_read(chip, LP8501_REG_ENABLE, &exec); exec 185 drivers/leds/leds-lp8501.c exec = (exec & ~LP8501_EXEC_ENG1_M) | LP8501_RUN_ENG1; exec 190 drivers/leds/leds-lp8501.c exec = (exec & ~LP8501_EXEC_ENG2_M) | LP8501_RUN_ENG2; exec 195 drivers/leds/leds-lp8501.c exec = (exec & ~LP8501_EXEC_ENG3_M) | LP8501_RUN_ENG3; exec 201 drivers/leds/leds-lp8501.c lp55xx_update_bits(chip, LP8501_REG_ENABLE, LP8501_EXEC_M, exec); exec 2210 drivers/mtd/nand/raw/nand_base.c ret = pattern->exec(chip, &ctx.subop); exec 298 drivers/mtd/nand/raw/qcom_nandc.c __le32 exec; exec 613 drivers/mtd/nand/raw/qcom_nandc.c return ®s->exec; exec 55 drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c exe_q_execute exec, exec 72 drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c o->execute = exec; exec 1162 drivers/net/ethernet/brocade/bna/bfa_ioc.c if (swab32(fwhdr.exec) == BFI_FWBOOT_TYPE_NORMAL) { exec 257 drivers/net/ethernet/brocade/bna/bfi.h u32 exec; /*!< exec vector */ exec 2340 drivers/net/wireless/realtek/rtlwifi/base.c void rtl_c2hcmd_launcher(struct ieee80211_hw *hw, int exec) exec 2364 drivers/net/wireless/realtek/rtlwifi/base.c if (exec) exec 114 drivers/net/wireless/realtek/rtlwifi/base.h void rtl_c2hcmd_launcher(struct ieee80211_hw *hw, int exec); exec 864 drivers/sbus/char/oradax.c ctx->result.exec.status = DAX_SUBMIT_ERR_THR_INIT; exec 871 drivers/sbus/char/oradax.c ctx->result.exec.status = DAX_SUBMIT_ERR_NO_CA_AVAIL; exec 881 drivers/sbus/char/oradax.c ctx->result.exec.status = DAX_SUBMIT_ERR_CCB_ARR_MMU_MISS; exec 889 drivers/sbus/char/oradax.c ctx->result.exec.status = DAX_SUBMIT_ERR_NO_CA_AVAIL; exec 895 drivers/sbus/char/oradax.c ctx->result.exec.status = dax_preprocess_usr_ccbs(ctx, idx, nccbs); exec 896 drivers/sbus/char/oradax.c if (ctx->result.exec.status != DAX_SUBMIT_OK) exec 899 drivers/sbus/char/oradax.c ctx->result.exec.status = dax_lock_pages(ctx, idx, nccbs, exec 900 drivers/sbus/char/oradax.c &ctx->result.exec.status_data); exec 901 drivers/sbus/char/oradax.c if (ctx->result.exec.status != DAX_SUBMIT_OK) exec 909 drivers/sbus/char/oradax.c &accepted_len, &ctx->result.exec.status_data); exec 922 drivers/sbus/char/oradax.c ctx->result.exec.status = DAX_SUBMIT_OK; exec 930 drivers/sbus/char/oradax.c ctx->result.exec.status = DAX_SUBMIT_ERR_WOULDBLOCK; exec 938 drivers/sbus/char/oradax.c ctx->result.exec.status = DAX_SUBMIT_ERR_NOMAP; exec 948 drivers/sbus/char/oradax.c ctx->result.exec.status = DAX_SUBMIT_ERR_CCB_INVAL; exec 957 drivers/sbus/char/oradax.c ctx->result.exec.status = DAX_SUBMIT_ERR_NOACCESS; exec 966 drivers/sbus/char/oradax.c ctx->result.exec.status = DAX_SUBMIT_ERR_UNAVAIL; exec 969 drivers/sbus/char/oradax.c ctx->result.exec.status = DAX_SUBMIT_ERR_INTERNAL; exec 986 drivers/sbus/char/oradax.c hv_rv, accepted_len, ctx->result.exec.status_data, exec 987 drivers/sbus/char/oradax.c ctx->result.exec.status); exec 725 drivers/scsi/bfa/bfa_ioc.c if (swab32(fwhdr.exec) == BFI_FWBOOT_TYPE_NORMAL) { exec 743 drivers/scsi/bfa/bfa_ioc.c bfa_trc(iocpf->ioc, swab32(fwhdr.exec)); exec 350 drivers/scsi/bfa/bfi.h u32 exec; /* exec vector */ exec 78 fs/binfmt_aout.c put_user(bprm->exec, --sp); exec 120 fs/binfmt_aout.c struct exec ex; exec 126 fs/binfmt_aout.c ex = *((struct exec *) bprm->buf); /* exec-header */ exec 262 fs/binfmt_aout.c struct exec ex; exec 164 fs/binfmt_elf.c create_elf_tables(struct linux_binprm *bprm, struct elfhdr *exec, exec 249 fs/binfmt_elf.c NEW_AUX_ENT(AT_PHDR, load_addr + exec->e_phoff); exec 251 fs/binfmt_elf.c NEW_AUX_ENT(AT_PHNUM, exec->e_phnum); exec 254 fs/binfmt_elf.c NEW_AUX_ENT(AT_ENTRY, exec->e_entry); exec 264 fs/binfmt_elf.c NEW_AUX_ENT(AT_EXECFN, bprm->exec); exec 292 fs/binfmt_elf.c bprm->exec = (unsigned long)sp; /* XXX: PARISC HACK */ exec 657 fs/binfmt_elf_fdpic.c NEW_AUX_ENT(AT_EXECFN, bprm->exec); exec 740 fs/exec.c bprm->exec -= stack_shift; exec 1243 fs/exec.c void __set_task_comm(struct task_struct *tsk, const char *buf, bool exec) exec 1249 fs/exec.c perf_event_comm(tsk, exec); exec 1813 fs/exec.c bprm->exec = bprm->p; exec 63 include/linux/binfmts.h unsigned long loader, exec; exec 815 include/linux/mtd/rawnand.h int (*exec)(struct nand_chip *chip, const struct nand_subop *subop); exec 820 include/linux/mtd/rawnand.h .exec = _exec, \ exec 1183 include/linux/perf_event.h extern void perf_event_comm(struct task_struct *tsk, bool exec); exec 1406 include/linux/perf_event.h static inline void perf_event_comm(struct task_struct *tsk, bool exec) { } exec 1683 include/linux/sched.h extern void __set_task_comm(struct task_struct *tsk, const char *from, bool exec); exec 44 include/uapi/linux/a.out.h #define N_MAGIC(exec) ((exec).a_info & 0xffff) exec 46 include/uapi/linux/a.out.h #define N_MACHTYPE(exec) ((enum machine_type)(((exec).a_info >> 16) & 0xff)) exec 47 include/uapi/linux/a.out.h #define N_FLAGS(exec) (((exec).a_info >> 24) & 0xff) exec 48 include/uapi/linux/a.out.h #define N_SET_INFO(exec, magic, type, flags) \ exec 49 include/uapi/linux/a.out.h ((exec).a_info = ((magic) & 0xffff) \ exec 52 include/uapi/linux/a.out.h #define N_SET_MAGIC(exec, magic) \ exec 53 include/uapi/linux/a.out.h ((exec).a_info = (((exec).a_info & 0xffff0000) | ((magic) & 0xffff))) exec 55 include/uapi/linux/a.out.h #define N_SET_MACHTYPE(exec, machtype) \ exec 56 include/uapi/linux/a.out.h ((exec).a_info = \ exec 57 include/uapi/linux/a.out.h ((exec).a_info&0xff00ffff) | ((((int)(machtype))&0xff) << 16)) exec 59 include/uapi/linux/a.out.h #define N_SET_FLAGS(exec, flags) \ exec 60 include/uapi/linux/a.out.h ((exec).a_info = \ exec 61 include/uapi/linux/a.out.h ((exec).a_info&0x00ffffff) | (((flags) & 0xff) << 24)) exec 83 include/uapi/linux/a.out.h #define _N_HDROFF(x) (1024 - sizeof (struct exec)) exec 87 include/uapi/linux/a.out.h (N_MAGIC(x) == ZMAGIC ? _N_HDROFF((x)) + sizeof (struct exec) : \ exec 88 include/uapi/linux/a.out.h (N_MAGIC(x) == QMAGIC ? 0 : sizeof (struct exec))) exec 83 include/uapi/linux/cn_proc.h } exec; exec 625 include/uapi/linux/openvswitch.h bool exec; /* When true, actions in sample will not exec 7196 kernel/events/core.c void perf_event_comm(struct task_struct *task, bool exec) exec 7210 kernel/events/core.c .misc = exec ? PERF_RECORD_MISC_COMM_EXEC : 0, exec 989 net/openvswitch/actions.c clone_flow_key = !arg->exec; exec 2457 net/openvswitch/flow_netlink.c arg.exec = last || !actions_may_change_flow(actions); exec 2484 net/openvswitch/flow_netlink.c u32 exec; exec 2493 net/openvswitch/flow_netlink.c exec = last || !actions_may_change_flow(attr); exec 2495 net/openvswitch/flow_netlink.c err = ovs_nla_add_action(sfa, OVS_CLONE_ATTR_EXEC, &exec, exec 2496 net/openvswitch/flow_netlink.c sizeof(exec), log); exec 902 scripts/kconfig/qconf.cc headerPopup->exec(e->globalPos()); exec 1752 scripts/kconfig/qconf.cc switch (mb.exec()) { exec 1889 scripts/kconfig/qconf.cc configApp->exec(); exec 108 tools/perf/util/comm.c struct comm *comm__new(const char *str, u64 timestamp, bool exec) exec 116 tools/perf/util/comm.c comm->exec = exec; exec 127 tools/perf/util/comm.c int comm__override(struct comm *comm, const char *str, u64 timestamp, bool exec) exec 138 tools/perf/util/comm.c if (exec) exec 139 tools/perf/util/comm.c comm->exec = true; exec 15 tools/perf/util/comm.h bool exec; exec 23 tools/perf/util/comm.h struct comm *comm__new(const char *str, u64 timestamp, bool exec); exec 26 tools/perf/util/comm.h bool exec); exec 602 tools/perf/util/machine.c bool exec = event->header.misc & PERF_RECORD_MISC_COMM_EXEC; exec 605 tools/perf/util/machine.c if (exec) exec 612 tools/perf/util/machine.c __thread__set_comm(thread, event->comm.comm, sample->time, exec)) { exec 182 tools/perf/util/probe-event.c static int convert_exec_to_group(const char *exec, char **result) exec 188 tools/perf/util/probe-event.c exec_copy = strdup(exec); exec 528 tools/perf/util/probe-event.c static int get_text_start_address(const char *exec, unsigned long *address, exec 538 tools/perf/util/probe-event.c fd = open(exec, O_RDONLY); exec 677 tools/perf/util/probe-event.c int ntevs, const char *exec, exec 683 tools/perf/util/probe-event.c if (!exec) exec 686 tools/perf/util/probe-event.c ret = get_text_start_address(exec, &stext, nsi); exec 693 tools/perf/util/probe-event.c tevs[i].point.module = strdup(exec); exec 1027 tools/perf/util/scripting-engines/trace-event-python.c tuple_set_s32(t, 4, comm->exec); exec 219 tools/perf/util/thread.c if (comm->exec) exec 238 tools/perf/util/thread.c u64 timestamp, bool exec) exec 244 tools/perf/util/thread.c int err = comm__override(curr, str, timestamp, exec); exec 248 tools/perf/util/thread.c new = comm__new(str, timestamp, exec); exec 253 tools/perf/util/thread.c if (exec) exec 263 tools/perf/util/thread.c bool exec) exec 268 tools/perf/util/thread.c ret = ____thread__set_comm(thread, str, timestamp, exec); exec 80 tools/perf/util/thread.h bool exec);