evt2irq 83 arch/sh/boards/board-apsh4a3a.c .start = evt2irq(0x200), evt2irq 84 arch/sh/boards/board-apsh4a3a.c .end = evt2irq(0x200), evt2irq 35 arch/sh/boards/board-apsh4ad0a.c .start = evt2irq(0x200), evt2irq 36 arch/sh/boards/board-apsh4ad0a.c .end = evt2irq(0x200), evt2irq 25 arch/sh/boards/board-edosk7705.c #define ETHERNET_IRQ evt2irq(0x320) evt2irq 88 arch/sh/boards/board-edosk7760.c .start = evt2irq(0x9e0), evt2irq 89 arch/sh/boards/board-edosk7760.c .end = evt2irq(0x9e0), evt2irq 111 arch/sh/boards/board-edosk7760.c .start = evt2irq(0x9c0), evt2irq 112 arch/sh/boards/board-edosk7760.c .end = evt2irq(0x9c0), evt2irq 139 arch/sh/boards/board-edosk7760.c .start = evt2irq(0x2a0), evt2irq 140 arch/sh/boards/board-edosk7760.c .end = evt2irq(0x2a0), evt2irq 72 arch/sh/boards/board-espt.c .start = evt2irq(0x920), /* irq number */ evt2irq 254 arch/sh/boards/board-magicpanelr2.c .start = evt2irq(0x660), evt2irq 255 arch/sh/boards/board-magicpanelr2.c .end = evt2irq(0x660), evt2irq 369 arch/sh/boards/board-magicpanelr2.c irq_set_irq_type(evt2irq(0x600), IRQ_TYPE_LEVEL_LOW); /* IRQ0 CAN1 */ evt2irq 370 arch/sh/boards/board-magicpanelr2.c irq_set_irq_type(evt2irq(0x620), IRQ_TYPE_LEVEL_LOW); /* IRQ1 CAN2 */ evt2irq 371 arch/sh/boards/board-magicpanelr2.c irq_set_irq_type(evt2irq(0x640), IRQ_TYPE_LEVEL_LOW); /* IRQ2 CAN3 */ evt2irq 372 arch/sh/boards/board-magicpanelr2.c irq_set_irq_type(evt2irq(0x660), IRQ_TYPE_LEVEL_LOW); /* IRQ3 SMSC9115 */ evt2irq 373 arch/sh/boards/board-magicpanelr2.c irq_set_irq_type(evt2irq(0x680), IRQ_TYPE_EDGE_RISING); /* IRQ4 touchscreen */ evt2irq 374 arch/sh/boards/board-magicpanelr2.c irq_set_irq_type(evt2irq(0x6a0), IRQ_TYPE_EDGE_FALLING); /* IRQ5 touchscreen */ evt2irq 376 arch/sh/boards/board-magicpanelr2.c intc_set_priority(evt2irq(0x600), 13); /* IRQ0 CAN1 */ evt2irq 377 arch/sh/boards/board-magicpanelr2.c intc_set_priority(evt2irq(0x620), 13); /* IRQ0 CAN2 */ evt2irq 378 arch/sh/boards/board-magicpanelr2.c intc_set_priority(evt2irq(0x640), 13); /* IRQ0 CAN3 */ evt2irq 379 arch/sh/boards/board-magicpanelr2.c intc_set_priority(evt2irq(0x660), 6); /* IRQ3 SMSC9115 */ evt2irq 39 arch/sh/boards/board-secureedge5410.c unsigned int irq = evt2irq(0x240); evt2irq 40 arch/sh/boards/board-sh2007.c .start = evt2irq(0x240), evt2irq 41 arch/sh/boards/board-sh2007.c .end = evt2irq(0x240), evt2irq 53 arch/sh/boards/board-sh2007.c .start = evt2irq(0x280), evt2irq 54 arch/sh/boards/board-sh2007.c .end = evt2irq(0x280), evt2irq 91 arch/sh/boards/board-sh2007.c .start = evt2irq(0x2c0), evt2irq 92 arch/sh/boards/board-sh2007.c .end = evt2irq(0x2c0), evt2irq 68 arch/sh/boards/board-sh7757lcr.c .start = evt2irq(0xc80), evt2irq 69 arch/sh/boards/board-sh7757lcr.c .end = evt2irq(0xc80), evt2irq 95 arch/sh/boards/board-sh7757lcr.c .start = evt2irq(0xc80), evt2irq 96 arch/sh/boards/board-sh7757lcr.c .end = evt2irq(0xc80), evt2irq 138 arch/sh/boards/board-sh7757lcr.c .start = evt2irq(0x2960), evt2irq 139 arch/sh/boards/board-sh7757lcr.c .end = evt2irq(0x2960), evt2irq 171 arch/sh/boards/board-sh7757lcr.c .start = evt2irq(0x2980), evt2irq 172 arch/sh/boards/board-sh7757lcr.c .end = evt2irq(0x2980), evt2irq 210 arch/sh/boards/board-sh7757lcr.c .start = evt2irq(0x1c60), evt2irq 214 arch/sh/boards/board-sh7757lcr.c .start = evt2irq(0x1c80), evt2irq 252 arch/sh/boards/board-sh7757lcr.c .start = evt2irq(0x480), evt2irq 288 arch/sh/boards/board-sh7757lcr.c .start = evt2irq(0x840), evt2irq 289 arch/sh/boards/board-sh7757lcr.c .end = evt2irq(0x840), evt2irq 107 arch/sh/boards/board-sh7785lcr.c .start = evt2irq(0x240), evt2irq 108 arch/sh/boards/board-sh7785lcr.c .end = evt2irq(0x240), evt2irq 137 arch/sh/boards/board-sh7785lcr.c .start = evt2irq(0x340), evt2irq 225 arch/sh/boards/board-sh7785lcr.c .start = evt2irq(0x380), evt2irq 226 arch/sh/boards/board-sh7785lcr.c .end = evt2irq(0x380), evt2irq 238 arch/sh/boards/board-sh7785lcr.c .start = evt2irq(0x380), evt2irq 239 arch/sh/boards/board-sh7785lcr.c .end = evt2irq(0x380), evt2irq 79 arch/sh/boards/board-urquell.c .start = evt2irq(0x360), evt2irq 64 arch/sh/boards/mach-ap325rxa/setup.c .start = evt2irq(0x660), evt2irq 65 arch/sh/boards/mach-ap325rxa/setup.c .end = evt2irq(0x660), evt2irq 247 arch/sh/boards/mach-ap325rxa/setup.c .start = evt2irq(0x580), evt2irq 290 arch/sh/boards/mach-ap325rxa/setup.c .start = evt2irq(0x880), evt2irq 322 arch/sh/boards/mach-ap325rxa/setup.c .start = evt2irq(0xe80), evt2irq 349 arch/sh/boards/mach-ap325rxa/setup.c .start = evt2irq(0x4e0), evt2irq 159 arch/sh/boards/mach-ecovec24/setup.c .start = evt2irq(0xd60), evt2irq 198 arch/sh/boards/mach-ecovec24/setup.c .start = evt2irq(0xa20), evt2irq 199 arch/sh/boards/mach-ecovec24/setup.c .end = evt2irq(0xa20), evt2irq 234 arch/sh/boards/mach-ecovec24/setup.c .start = evt2irq(0xa40), evt2irq 235 arch/sh/boards/mach-ecovec24/setup.c .end = evt2irq(0xa40), evt2irq 291 arch/sh/boards/mach-ecovec24/setup.c .start = evt2irq(0xa40), evt2irq 292 arch/sh/boards/mach-ecovec24/setup.c .end = evt2irq(0xa40), evt2irq 360 arch/sh/boards/mach-ecovec24/setup.c .start = evt2irq(0xf40), evt2irq 417 arch/sh/boards/mach-ecovec24/setup.c .start = evt2irq(0x880), evt2irq 454 arch/sh/boards/mach-ecovec24/setup.c .start = evt2irq(0x9e0), evt2irq 530 arch/sh/boards/mach-ecovec24/setup.c .irq = evt2irq(0x620), evt2irq 561 arch/sh/boards/mach-ecovec24/setup.c .start = evt2irq(0xbe0), evt2irq 577 arch/sh/boards/mach-ecovec24/setup.c #define IRQ0 evt2irq(0x600) evt2irq 718 arch/sh/boards/mach-ecovec24/setup.c .start = evt2irq(0xe80), evt2irq 759 arch/sh/boards/mach-ecovec24/setup.c .start = evt2irq(0x4e0), evt2irq 825 arch/sh/boards/mach-ecovec24/setup.c .start = evt2irq(0xc80), evt2irq 859 arch/sh/boards/mach-ecovec24/setup.c .start = evt2irq(0xf80), evt2irq 904 arch/sh/boards/mach-ecovec24/setup.c .start = evt2irq(0x480), evt2irq 941 arch/sh/boards/mach-ecovec24/setup.c .start = evt2irq(0x8e0), evt2irq 967 arch/sh/boards/mach-ecovec24/setup.c .start = evt2irq(0x5a0), evt2irq 972 arch/sh/boards/mach-ecovec24/setup.c .start = evt2irq(0x5c0), evt2irq 37 arch/sh/boards/mach-hp6xx/setup.c .start = evt2irq(0xba0), evt2irq 127 arch/sh/boards/mach-kfr2r09/setup.c .start = evt2irq(0xbe0), evt2irq 190 arch/sh/boards/mach-kfr2r09/setup.c .start = evt2irq(0xf40), evt2irq 226 arch/sh/boards/mach-kfr2r09/setup.c .start = evt2irq(0xa20), evt2irq 227 arch/sh/boards/mach-kfr2r09/setup.c .end = evt2irq(0xa20), evt2irq 265 arch/sh/boards/mach-kfr2r09/setup.c .start = evt2irq(0x880), evt2irq 266 arch/sh/boards/mach-kfr2r09/setup.c .end = evt2irq(0x880), evt2irq 316 arch/sh/boards/mach-kfr2r09/setup.c .start = evt2irq(0xe80), evt2irq 63 arch/sh/boards/mach-migor/setup.c .start = evt2irq(0x600), /* IRQ0 */ evt2irq 97 arch/sh/boards/mach-migor/setup.c .start = evt2irq(0xbe0), evt2irq 291 arch/sh/boards/mach-migor/setup.c .start = evt2irq(0x580), evt2irq 333 arch/sh/boards/mach-migor/setup.c .start = evt2irq(0x880), evt2irq 381 arch/sh/boards/mach-migor/setup.c .start = evt2irq(0xe80), evt2irq 416 arch/sh/boards/mach-migor/setup.c .irq = evt2irq(0x6c0), /* IRQ6 */ evt2irq 55 arch/sh/boards/mach-sdk7786/setup.c .start = evt2irq(0x2c0), evt2irq 56 arch/sh/boards/mach-sdk7786/setup.c .end = evt2irq(0x2c0), evt2irq 116 arch/sh/boards/mach-se/7722/setup.c .start = evt2irq(0xbe0), evt2irq 210 arch/sh/boards/mach-se/7724/setup.c .start = evt2irq(0xf40), evt2irq 237 arch/sh/boards/mach-se/7724/setup.c .start = evt2irq(0x880), evt2irq 265 arch/sh/boards/mach-se/7724/setup.c .start = evt2irq(0x9e0), evt2irq 290 arch/sh/boards/mach-se/7724/setup.c .start = evt2irq(0xf80), evt2irq 347 arch/sh/boards/mach-se/7724/setup.c .start = evt2irq(0xbe0), evt2irq 370 arch/sh/boards/mach-se/7724/setup.c .start = evt2irq(0xd60), evt2irq 401 arch/sh/boards/mach-se/7724/setup.c .start = evt2irq(0xa20), evt2irq 402 arch/sh/boards/mach-se/7724/setup.c .end = evt2irq(0xa20), evt2irq 430 arch/sh/boards/mach-se/7724/setup.c .start = evt2irq(0xa40), evt2irq 431 arch/sh/boards/mach-se/7724/setup.c .end = evt2irq(0xa40), evt2irq 465 arch/sh/boards/mach-se/7724/setup.c .start = evt2irq(0xe80), evt2irq 494 arch/sh/boards/mach-se/7724/setup.c .start = evt2irq(0x4e0), evt2irq 524 arch/sh/boards/mach-se/7724/setup.c .start = evt2irq(0x480), evt2irq 562 arch/sh/boards/mach-se/7724/setup.c .start = evt2irq(0x8e0), evt2irq 80 arch/sh/boards/mach-sh7763rdp/setup.c .start = evt2irq(0x920), /* irq number */ evt2irq 29 arch/sh/drivers/pci/fixups-landisk.c int irq = ((slot + pin - 1) & 0x3) + evt2irq(0x2a0); evt2irq 17 arch/sh/drivers/pci/fixups-r7780rp.c return evt2irq(0xa20) + slot; evt2irq 16 arch/sh/drivers/pci/fixups-sdk7780.c #define IRQ_INTA evt2irq(0xa20) evt2irq 17 arch/sh/drivers/pci/fixups-sdk7780.c #define IRQ_INTB evt2irq(0xa40) evt2irq 18 arch/sh/drivers/pci/fixups-sdk7780.c #define IRQ_INTC evt2irq(0xa60) evt2irq 19 arch/sh/drivers/pci/fixups-sdk7780.c #define IRQ_INTD evt2irq(0xa80) evt2irq 14 arch/sh/drivers/pci/fixups-se7751.c case 0: return evt2irq(0x3a0); evt2irq 15 arch/sh/drivers/pci/fixups-se7751.c case 1: return evt2irq(0x3a0); /* AMD Ethernet controller */ evt2irq 14 arch/sh/drivers/pci/fixups-sh03.c case 4: return evt2irq(0x2a0); /* eth0 */ evt2irq 15 arch/sh/drivers/pci/fixups-sh03.c case 8: return evt2irq(0x2a0); /* eth1 */ evt2irq 16 arch/sh/drivers/pci/fixups-sh03.c case 6: return evt2irq(0x240); /* PCI bridge */ evt2irq 20 arch/sh/drivers/pci/fixups-sh03.c return evt2irq(0x240); evt2irq 24 arch/sh/drivers/pci/fixups-sh03.c case 0: irq = evt2irq(0x240); break; evt2irq 25 arch/sh/drivers/pci/fixups-sh03.c case 1: irq = evt2irq(0x240); break; evt2irq 26 arch/sh/drivers/pci/fixups-sh03.c case 2: irq = evt2irq(0x240); break; evt2irq 27 arch/sh/drivers/pci/fixups-sh03.c case 3: irq = evt2irq(0x240); break; evt2irq 28 arch/sh/drivers/pci/fixups-sh03.c case 4: irq = evt2irq(0x240); break; evt2irq 26 arch/sh/drivers/pci/fixups-snapgear.c case 11: irq = evt2irq(0x300); break; /* USB */ evt2irq 27 arch/sh/drivers/pci/fixups-snapgear.c case 12: irq = evt2irq(0x360); break; /* PCMCIA */ evt2irq 28 arch/sh/drivers/pci/fixups-snapgear.c case 13: irq = evt2irq(0x2a0); break; /* eth0 */ evt2irq 29 arch/sh/drivers/pci/fixups-snapgear.c case 14: irq = evt2irq(0x300); break; /* eth1 */ evt2irq 30 arch/sh/drivers/pci/fixups-snapgear.c case 15: irq = evt2irq(0x360); break; /* safenet (unused) */ evt2irq 62 arch/sh/drivers/pci/pci-sh7780.c .serr_irq = evt2irq(0xa00), evt2irq 63 arch/sh/drivers/pci/pci-sh7780.c .err_irq = evt2irq(0xaa0), evt2irq 485 arch/sh/drivers/pci/pcie-sh7786.c return evt2irq(0xae0); evt2irq 16 arch/sh/include/cpu-sh3/cpu/dma.h #define DMTE0_IRQ evt2irq(0x800) evt2irq 17 arch/sh/include/cpu-sh3/cpu/dma.h #define DMTE4_IRQ evt2irq(0xb80) evt2irq 10 arch/sh/include/cpu-sh4/cpu/dma.h #define DMTE0_IRQ evt2irq(0x640) evt2irq 11 arch/sh/include/cpu-sh4/cpu/dma.h #define DMTE4_IRQ evt2irq(0x780) evt2irq 12 arch/sh/include/cpu-sh4/cpu/dma.h #define DMTE6_IRQ evt2irq(0x7c0) evt2irq 13 arch/sh/include/cpu-sh4/cpu/dma.h #define DMAE0_IRQ evt2irq(0x6c0) evt2irq 9 arch/sh/include/cpu-sh4a/cpu/dma.h #define DMTE0_IRQ evt2irq(0x800) evt2irq 10 arch/sh/include/cpu-sh4a/cpu/dma.h #define DMTE4_IRQ evt2irq(0xb80) evt2irq 11 arch/sh/include/cpu-sh4a/cpu/dma.h #define DMAE0_IRQ evt2irq(0xbc0) /* DMA Error IRQ*/ evt2irq 14 arch/sh/include/cpu-sh4a/cpu/dma.h #define DMTE0_IRQ evt2irq(0x800) evt2irq 15 arch/sh/include/cpu-sh4a/cpu/dma.h #define DMTE4_IRQ evt2irq(0xb80) evt2irq 16 arch/sh/include/cpu-sh4a/cpu/dma.h #define DMAE0_IRQ evt2irq(0xbc0) /* DMA Error IRQ*/ evt2irq 19 arch/sh/include/cpu-sh4a/cpu/dma.h #define DMTE0_IRQ evt2irq(0x640) evt2irq 20 arch/sh/include/cpu-sh4a/cpu/dma.h #define DMTE4_IRQ evt2irq(0x780) evt2irq 21 arch/sh/include/cpu-sh4a/cpu/dma.h #define DMAE0_IRQ evt2irq(0x6c0) evt2irq 24 arch/sh/include/cpu-sh4a/cpu/dma.h #define DMTE0_IRQ evt2irq(0x800) /* DMAC0A*/ evt2irq 25 arch/sh/include/cpu-sh4a/cpu/dma.h #define DMTE4_IRQ evt2irq(0xb80) /* DMAC0B */ evt2irq 26 arch/sh/include/cpu-sh4a/cpu/dma.h #define DMTE6_IRQ evt2irq(0x700) evt2irq 27 arch/sh/include/cpu-sh4a/cpu/dma.h #define DMTE8_IRQ evt2irq(0x740) /* DMAC1A */ evt2irq 28 arch/sh/include/cpu-sh4a/cpu/dma.h #define DMTE9_IRQ evt2irq(0x760) evt2irq 29 arch/sh/include/cpu-sh4a/cpu/dma.h #define DMTE10_IRQ evt2irq(0xb00) /* DMAC1B */ evt2irq 30 arch/sh/include/cpu-sh4a/cpu/dma.h #define DMTE11_IRQ evt2irq(0xb20) evt2irq 31 arch/sh/include/cpu-sh4a/cpu/dma.h #define DMAE0_IRQ evt2irq(0xbc0) /* DMA Error IRQ*/ evt2irq 32 arch/sh/include/cpu-sh4a/cpu/dma.h #define DMAE1_IRQ evt2irq(0xb40) /* DMA Error IRQ*/ evt2irq 36 arch/sh/include/cpu-sh4a/cpu/dma.h #define DMTE0_IRQ evt2irq(0x800) /* DMAC0A*/ evt2irq 37 arch/sh/include/cpu-sh4a/cpu/dma.h #define DMTE4_IRQ evt2irq(0xb80) /* DMAC0B */ evt2irq 38 arch/sh/include/cpu-sh4a/cpu/dma.h #define DMTE6_IRQ evt2irq(0x700) evt2irq 39 arch/sh/include/cpu-sh4a/cpu/dma.h #define DMTE8_IRQ evt2irq(0x740) /* DMAC1A */ evt2irq 40 arch/sh/include/cpu-sh4a/cpu/dma.h #define DMTE9_IRQ evt2irq(0x760) evt2irq 41 arch/sh/include/cpu-sh4a/cpu/dma.h #define DMTE10_IRQ evt2irq(0xb00) /* DMAC1B */ evt2irq 42 arch/sh/include/cpu-sh4a/cpu/dma.h #define DMTE11_IRQ evt2irq(0xb20) evt2irq 43 arch/sh/include/cpu-sh4a/cpu/dma.h #define DMAE0_IRQ evt2irq(0xbc0) /* DMA Error IRQ*/ evt2irq 44 arch/sh/include/cpu-sh4a/cpu/dma.h #define DMAE1_IRQ evt2irq(0xb40) /* DMA Error IRQ*/ evt2irq 48 arch/sh/include/cpu-sh4a/cpu/dma.h #define DMTE0_IRQ evt2irq(0x640) evt2irq 49 arch/sh/include/cpu-sh4a/cpu/dma.h #define DMTE4_IRQ evt2irq(0x780) evt2irq 50 arch/sh/include/cpu-sh4a/cpu/dma.h #define DMTE6_IRQ evt2irq(0x7c0) evt2irq 51 arch/sh/include/cpu-sh4a/cpu/dma.h #define DMTE8_IRQ evt2irq(0xd80) evt2irq 52 arch/sh/include/cpu-sh4a/cpu/dma.h #define DMTE9_IRQ evt2irq(0xda0) evt2irq 53 arch/sh/include/cpu-sh4a/cpu/dma.h #define DMTE10_IRQ evt2irq(0xdc0) evt2irq 54 arch/sh/include/cpu-sh4a/cpu/dma.h #define DMTE11_IRQ evt2irq(0xde0) evt2irq 55 arch/sh/include/cpu-sh4a/cpu/dma.h #define DMAE0_IRQ evt2irq(0x6c0) /* DMA Error IRQ */ evt2irq 59 arch/sh/include/cpu-sh4a/cpu/dma.h #define DMTE0_IRQ evt2irq(0x620) evt2irq 60 arch/sh/include/cpu-sh4a/cpu/dma.h #define DMTE4_IRQ evt2irq(0x6a0) evt2irq 61 arch/sh/include/cpu-sh4a/cpu/dma.h #define DMTE6_IRQ evt2irq(0x880) evt2irq 62 arch/sh/include/cpu-sh4a/cpu/dma.h #define DMTE8_IRQ evt2irq(0x8c0) evt2irq 63 arch/sh/include/cpu-sh4a/cpu/dma.h #define DMTE9_IRQ evt2irq(0x8e0) evt2irq 64 arch/sh/include/cpu-sh4a/cpu/dma.h #define DMTE10_IRQ evt2irq(0x900) evt2irq 65 arch/sh/include/cpu-sh4a/cpu/dma.h #define DMTE11_IRQ evt2irq(0x920) evt2irq 66 arch/sh/include/cpu-sh4a/cpu/dma.h #define DMAE0_IRQ evt2irq(0x6e0) /* DMA Error IRQ0 */ evt2irq 67 arch/sh/include/cpu-sh4a/cpu/dma.h #define DMAE1_IRQ evt2irq(0x940) /* DMA Error IRQ1 */ evt2irq 10 arch/sh/include/mach-common/mach/hp6xx.h #define HP680_BTN_IRQ evt2irq(0x600) /* IRQ0_IRQ */ evt2irq 11 arch/sh/include/mach-common/mach/hp6xx.h #define HP680_TS_IRQ evt2irq(0x660) /* IRQ3_IRQ */ evt2irq 12 arch/sh/include/mach-common/mach/hp6xx.h #define HP680_HD64461_IRQ evt2irq(0x680) /* IRQ4_IRQ */ evt2irq 12 arch/sh/include/mach-common/mach/lboxre2.h #define IRQ_CF1 evt2irq(0x320) /* CF1 */ evt2irq 13 arch/sh/include/mach-common/mach/lboxre2.h #define IRQ_CF0 evt2irq(0x340) /* CF0 */ evt2irq 14 arch/sh/include/mach-common/mach/lboxre2.h #define IRQ_INTD evt2irq(0x360) /* INTD */ evt2irq 15 arch/sh/include/mach-common/mach/lboxre2.h #define IRQ_ETH1 evt2irq(0x380) /* Ether1 */ evt2irq 16 arch/sh/include/mach-common/mach/lboxre2.h #define IRQ_ETH0 evt2irq(0x3a0) /* Ether0 */ evt2irq 17 arch/sh/include/mach-common/mach/lboxre2.h #define IRQ_INTA evt2irq(0x3c0) /* INTA */ evt2irq 68 arch/sh/include/mach-common/mach/sdk7780.h #define IRQ_CFCARD evt2irq(0x3c0) evt2irq 70 arch/sh/include/mach-common/mach/sdk7780.h #define IRQ_ETHERNET evt2irq(0x2c0) evt2irq 14 arch/sh/include/mach-common/mach/titan.h #define TITAN_IRQ_WAN evt2irq(0x240) /* eth0 (WAN) */ evt2irq 15 arch/sh/include/mach-common/mach/titan.h #define TITAN_IRQ_LAN evt2irq(0x2a0) /* eth1 (LAN) */ evt2irq 16 arch/sh/include/mach-common/mach/titan.h #define TITAN_IRQ_MPCIA evt2irq(0x300) /* mPCI A */ evt2irq 17 arch/sh/include/mach-common/mach/titan.h #define TITAN_IRQ_MPCIB evt2irq(0x360) /* mPCI B */ evt2irq 18 arch/sh/include/mach-common/mach/titan.h #define TITAN_IRQ_USB evt2irq(0x360) /* USB */ evt2irq 30 arch/sh/include/mach-landisk/mach/iodata_landisk.h #define IRQ_PCIINTA evt2irq(0x2a0) /* PCI INTA IRQ */ evt2irq 31 arch/sh/include/mach-landisk/mach/iodata_landisk.h #define IRQ_PCIINTB evt2irq(0x2c0) /* PCI INTB IRQ */ evt2irq 32 arch/sh/include/mach-landisk/mach/iodata_landisk.h #define IRQ_PCIINTC evt2irq(0x2e0) /* PCI INTC IRQ */ evt2irq 33 arch/sh/include/mach-landisk/mach/iodata_landisk.h #define IRQ_PCIINTD evt2irq(0x300) /* PCI INTD IRQ */ evt2irq 34 arch/sh/include/mach-landisk/mach/iodata_landisk.h #define IRQ_ATA evt2irq(0x320) /* ATA IRQ */ evt2irq 35 arch/sh/include/mach-landisk/mach/iodata_landisk.h #define IRQ_FATA evt2irq(0x340) /* FATA IRQ */ evt2irq 36 arch/sh/include/mach-landisk/mach/iodata_landisk.h #define IRQ_POWER evt2irq(0x360) /* Power Switch IRQ */ evt2irq 37 arch/sh/include/mach-landisk/mach/iodata_landisk.h #define IRQ_BUTTON evt2irq(0x380) /* USL-5P Button IRQ */ evt2irq 38 arch/sh/include/mach-landisk/mach/iodata_landisk.h #define IRQ_FAULT evt2irq(0x3a0) /* USL-5P Fault IRQ */ evt2irq 87 arch/sh/include/mach-se/mach/se.h #define IRQ0_IRQ evt2irq(0x600) evt2irq 88 arch/sh/include/mach-se/mach/se.h #define IRQ1_IRQ evt2irq(0x620) evt2irq 92 arch/sh/include/mach-se/mach/se.h #define IRQ_STNIC evt2irq(0x380) evt2irq 93 arch/sh/include/mach-se/mach/se.h #define IRQ_CFCARD evt2irq(0x3c0) evt2irq 95 arch/sh/include/mach-se/mach/se.h #define IRQ_STNIC evt2irq(0x340) evt2irq 96 arch/sh/include/mach-se/mach/se.h #define IRQ_CFCARD evt2irq(0x2e0) evt2irq 111 arch/sh/include/mach-se/mach/se.h #define SH_ETH0_IRQ evt2irq(0xc00) evt2irq 112 arch/sh/include/mach-se/mach/se.h #define SH_ETH1_IRQ evt2irq(0xc20) evt2irq 113 arch/sh/include/mach-se/mach/se.h #define SH_TSU_IRQ evt2irq(0xc40) evt2irq 120 arch/sh/include/mach-se/mach/se7343.h #define IRQ0_IRQ evt2irq(0x600) evt2irq 121 arch/sh/include/mach-se/mach/se7343.h #define IRQ1_IRQ evt2irq(0x620) evt2irq 122 arch/sh/include/mach-se/mach/se7343.h #define IRQ4_IRQ evt2irq(0x680) evt2irq 123 arch/sh/include/mach-se/mach/se7343.h #define IRQ5_IRQ evt2irq(0x6a0) evt2irq 52 arch/sh/include/mach-se/mach/se7721.h #define MRSHPC_IRQ0 evt2irq(0x340) evt2irq 77 arch/sh/include/mach-se/mach/se7722.h #define IRQ0_IRQ evt2irq(0x600) evt2irq 78 arch/sh/include/mach-se/mach/se7722.h #define IRQ1_IRQ evt2irq(0x620) evt2irq 35 arch/sh/include/mach-se/mach/se7724.h #define IRQ0_IRQ evt2irq(0x600) evt2irq 36 arch/sh/include/mach-se/mach/se7724.h #define IRQ1_IRQ evt2irq(0x620) evt2irq 37 arch/sh/include/mach-se/mach/se7724.h #define IRQ2_IRQ evt2irq(0x640) evt2irq 68 arch/sh/include/mach-se/mach/se7751.h #define IRQ_79C973 evt2irq(0x3a0) evt2irq 81 arch/sh/include/mach-se/mach/se7780.h #define IRQ_IDE0 evt2irq(0xa60) /* iVDR */ evt2irq 84 arch/sh/include/mach-se/mach/se7780.h #define SMC_IRQ evt2irq(0x300) evt2irq 87 arch/sh/include/mach-se/mach/se7780.h #define SM501_IRQ evt2irq(0x200) evt2irq 78 arch/sh/kernel/cpu/sh3/setup-sh7705.c DEFINE_RES_IRQ(evt2irq(0x900)), evt2irq 99 arch/sh/kernel/cpu/sh3/setup-sh7705.c DEFINE_RES_IRQ(evt2irq(0x880)), evt2irq 119 arch/sh/kernel/cpu/sh3/setup-sh7705.c .start = evt2irq(0x480), evt2irq 144 arch/sh/kernel/cpu/sh3/setup-sh7705.c DEFINE_RES_IRQ(evt2irq(0x400)), evt2irq 145 arch/sh/kernel/cpu/sh3/setup-sh7705.c DEFINE_RES_IRQ(evt2irq(0x420)), evt2irq 146 arch/sh/kernel/cpu/sh3/setup-sh7705.c DEFINE_RES_IRQ(evt2irq(0x440)), evt2irq 96 arch/sh/kernel/cpu/sh3/setup-sh770x.c .start = evt2irq(0x480), evt2irq 115 arch/sh/kernel/cpu/sh3/setup-sh770x.c DEFINE_RES_IRQ(evt2irq(0x4e0)), evt2irq 138 arch/sh/kernel/cpu/sh3/setup-sh770x.c DEFINE_RES_IRQ(evt2irq(0x900)), evt2irq 160 arch/sh/kernel/cpu/sh3/setup-sh770x.c DEFINE_RES_IRQ(evt2irq(0x880)), evt2irq 180 arch/sh/kernel/cpu/sh3/setup-sh770x.c DEFINE_RES_IRQ(evt2irq(0x400)), evt2irq 181 arch/sh/kernel/cpu/sh3/setup-sh770x.c DEFINE_RES_IRQ(evt2irq(0x420)), evt2irq 182 arch/sh/kernel/cpu/sh3/setup-sh770x.c DEFINE_RES_IRQ(evt2irq(0x440)), evt2irq 78 arch/sh/kernel/cpu/sh3/setup-sh7710.c .start = evt2irq(0x480), evt2irq 104 arch/sh/kernel/cpu/sh3/setup-sh7710.c DEFINE_RES_IRQ(evt2irq(0x880)), evt2irq 124 arch/sh/kernel/cpu/sh3/setup-sh7710.c DEFINE_RES_IRQ(evt2irq(0x900)), evt2irq 143 arch/sh/kernel/cpu/sh3/setup-sh7710.c DEFINE_RES_IRQ(evt2irq(0x400)), evt2irq 144 arch/sh/kernel/cpu/sh3/setup-sh7710.c DEFINE_RES_IRQ(evt2irq(0x420)), evt2irq 145 arch/sh/kernel/cpu/sh3/setup-sh7710.c DEFINE_RES_IRQ(evt2irq(0x440)), evt2irq 32 arch/sh/kernel/cpu/sh3/setup-sh7720.c .start = evt2irq(0x480), evt2irq 59 arch/sh/kernel/cpu/sh3/setup-sh7720.c DEFINE_RES_IRQ(evt2irq(0xc00)), evt2irq 80 arch/sh/kernel/cpu/sh3/setup-sh7720.c DEFINE_RES_IRQ(evt2irq(0xc20)), evt2irq 100 arch/sh/kernel/cpu/sh3/setup-sh7720.c .start = evt2irq(0xa60), evt2irq 101 arch/sh/kernel/cpu/sh3/setup-sh7720.c .end = evt2irq(0xa60), evt2irq 131 arch/sh/kernel/cpu/sh3/setup-sh7720.c .start = evt2irq(0xa20), evt2irq 132 arch/sh/kernel/cpu/sh3/setup-sh7720.c .end = evt2irq(0xa20), evt2irq 154 arch/sh/kernel/cpu/sh3/setup-sh7720.c DEFINE_RES_IRQ(evt2irq(0xf00)), evt2irq 173 arch/sh/kernel/cpu/sh3/setup-sh7720.c DEFINE_RES_IRQ(evt2irq(0x400)), evt2irq 174 arch/sh/kernel/cpu/sh3/setup-sh7720.c DEFINE_RES_IRQ(evt2irq(0x420)), evt2irq 175 arch/sh/kernel/cpu/sh3/setup-sh7720.c DEFINE_RES_IRQ(evt2irq(0x440)), evt2irq 23 arch/sh/kernel/cpu/sh4/setup-sh4-202.c DEFINE_RES_IRQ(evt2irq(0x700)), evt2irq 24 arch/sh/kernel/cpu/sh4/setup-sh4-202.c DEFINE_RES_IRQ(evt2irq(0x720)), evt2irq 25 arch/sh/kernel/cpu/sh4/setup-sh4-202.c DEFINE_RES_IRQ(evt2irq(0x760)), evt2irq 26 arch/sh/kernel/cpu/sh4/setup-sh4-202.c DEFINE_RES_IRQ(evt2irq(0x740)), evt2irq 45 arch/sh/kernel/cpu/sh4/setup-sh4-202.c DEFINE_RES_IRQ(evt2irq(0x400)), evt2irq 46 arch/sh/kernel/cpu/sh4/setup-sh4-202.c DEFINE_RES_IRQ(evt2irq(0x420)), evt2irq 47 arch/sh/kernel/cpu/sh4/setup-sh4-202.c DEFINE_RES_IRQ(evt2irq(0x440)), evt2irq 25 arch/sh/kernel/cpu/sh4/setup-sh7750.c .start = evt2irq(0x480), evt2irq 43 arch/sh/kernel/cpu/sh4/setup-sh7750.c DEFINE_RES_IRQ(evt2irq(0x4e0)), evt2irq 63 arch/sh/kernel/cpu/sh4/setup-sh7750.c DEFINE_RES_IRQ(evt2irq(0x700)), evt2irq 82 arch/sh/kernel/cpu/sh4/setup-sh7750.c DEFINE_RES_IRQ(evt2irq(0x400)), evt2irq 83 arch/sh/kernel/cpu/sh4/setup-sh7750.c DEFINE_RES_IRQ(evt2irq(0x420)), evt2irq 84 arch/sh/kernel/cpu/sh4/setup-sh7750.c DEFINE_RES_IRQ(evt2irq(0x440)), evt2irq 108 arch/sh/kernel/cpu/sh4/setup-sh7750.c DEFINE_RES_IRQ(evt2irq(0xb00)), evt2irq 109 arch/sh/kernel/cpu/sh4/setup-sh7750.c DEFINE_RES_IRQ(evt2irq(0xb80)), evt2irq 135 arch/sh/kernel/cpu/sh4/setup-sh7760.c DEFINE_RES_IRQ(evt2irq(0x880)), evt2irq 136 arch/sh/kernel/cpu/sh4/setup-sh7760.c DEFINE_RES_IRQ(evt2irq(0x8a0)), evt2irq 137 arch/sh/kernel/cpu/sh4/setup-sh7760.c DEFINE_RES_IRQ(evt2irq(0x8e0)), evt2irq 138 arch/sh/kernel/cpu/sh4/setup-sh7760.c DEFINE_RES_IRQ(evt2irq(0x8c0)), evt2irq 159 arch/sh/kernel/cpu/sh4/setup-sh7760.c DEFINE_RES_IRQ(evt2irq(0xb00)), evt2irq 160 arch/sh/kernel/cpu/sh4/setup-sh7760.c DEFINE_RES_IRQ(evt2irq(0xb20)), evt2irq 161 arch/sh/kernel/cpu/sh4/setup-sh7760.c DEFINE_RES_IRQ(evt2irq(0xb60)), evt2irq 162 arch/sh/kernel/cpu/sh4/setup-sh7760.c DEFINE_RES_IRQ(evt2irq(0xb40)), evt2irq 183 arch/sh/kernel/cpu/sh4/setup-sh7760.c DEFINE_RES_IRQ(evt2irq(0xb80)), evt2irq 184 arch/sh/kernel/cpu/sh4/setup-sh7760.c DEFINE_RES_IRQ(evt2irq(0xba0)), evt2irq 185 arch/sh/kernel/cpu/sh4/setup-sh7760.c DEFINE_RES_IRQ(evt2irq(0xbe0)), evt2irq 186 arch/sh/kernel/cpu/sh4/setup-sh7760.c DEFINE_RES_IRQ(evt2irq(0xbc0)), evt2irq 212 arch/sh/kernel/cpu/sh4/setup-sh7760.c DEFINE_RES_IRQ(evt2irq(0xc00)), evt2irq 213 arch/sh/kernel/cpu/sh4/setup-sh7760.c DEFINE_RES_IRQ(evt2irq(0xc20)), evt2irq 214 arch/sh/kernel/cpu/sh4/setup-sh7760.c DEFINE_RES_IRQ(evt2irq(0xc40)), evt2irq 233 arch/sh/kernel/cpu/sh4/setup-sh7760.c DEFINE_RES_IRQ(evt2irq(0x400)), evt2irq 234 arch/sh/kernel/cpu/sh4/setup-sh7760.c DEFINE_RES_IRQ(evt2irq(0x420)), evt2irq 235 arch/sh/kernel/cpu/sh4/setup-sh7760.c DEFINE_RES_IRQ(evt2irq(0x440)), evt2irq 24 arch/sh/kernel/cpu/sh4a/setup-sh7343.c DEFINE_RES_IRQ(evt2irq(0xc00)), evt2irq 44 arch/sh/kernel/cpu/sh4a/setup-sh7343.c DEFINE_RES_IRQ(evt2irq(0xc20)), evt2irq 64 arch/sh/kernel/cpu/sh4a/setup-sh7343.c DEFINE_RES_IRQ(evt2irq(0xc40)), evt2irq 84 arch/sh/kernel/cpu/sh4a/setup-sh7343.c DEFINE_RES_IRQ(evt2irq(0xc60)), evt2irq 105 arch/sh/kernel/cpu/sh4a/setup-sh7343.c .start = evt2irq(0xe00), evt2irq 106 arch/sh/kernel/cpu/sh4a/setup-sh7343.c .end = evt2irq(0xe60), evt2irq 126 arch/sh/kernel/cpu/sh4a/setup-sh7343.c .start = evt2irq(0x780), evt2irq 127 arch/sh/kernel/cpu/sh4a/setup-sh7343.c .end = evt2irq(0x7e0), evt2irq 142 arch/sh/kernel/cpu/sh4a/setup-sh7343.c .irq = evt2irq(0x980), evt2irq 170 arch/sh/kernel/cpu/sh4a/setup-sh7343.c .irq = evt2irq(0x8c0), evt2irq 198 arch/sh/kernel/cpu/sh4a/setup-sh7343.c .irq = evt2irq(0x560), evt2irq 229 arch/sh/kernel/cpu/sh4a/setup-sh7343.c DEFINE_RES_IRQ(evt2irq(0xf00)), evt2irq 248 arch/sh/kernel/cpu/sh4a/setup-sh7343.c DEFINE_RES_IRQ(evt2irq(0x400)), evt2irq 249 arch/sh/kernel/cpu/sh4a/setup-sh7343.c DEFINE_RES_IRQ(evt2irq(0x420)), evt2irq 250 arch/sh/kernel/cpu/sh4a/setup-sh7343.c DEFINE_RES_IRQ(evt2irq(0x440)), evt2irq 26 arch/sh/kernel/cpu/sh4a/setup-sh7366.c DEFINE_RES_IRQ(evt2irq(0xc00)), evt2irq 47 arch/sh/kernel/cpu/sh4a/setup-sh7366.c .start = evt2irq(0xe00), evt2irq 48 arch/sh/kernel/cpu/sh4a/setup-sh7366.c .end = evt2irq(0xe60), evt2irq 71 arch/sh/kernel/cpu/sh4a/setup-sh7366.c .start = evt2irq(0xa20), evt2irq 72 arch/sh/kernel/cpu/sh4a/setup-sh7366.c .end = evt2irq(0xa20), evt2irq 92 arch/sh/kernel/cpu/sh4a/setup-sh7366.c .irq = evt2irq(0x980), evt2irq 120 arch/sh/kernel/cpu/sh4a/setup-sh7366.c .irq = evt2irq(0x8c0), evt2irq 148 arch/sh/kernel/cpu/sh4a/setup-sh7366.c .irq = evt2irq(0x560), evt2irq 179 arch/sh/kernel/cpu/sh4a/setup-sh7366.c DEFINE_RES_IRQ(evt2irq(0xf00)), evt2irq 198 arch/sh/kernel/cpu/sh4a/setup-sh7366.c DEFINE_RES_IRQ(evt2irq(0x400)), evt2irq 199 arch/sh/kernel/cpu/sh4a/setup-sh7366.c DEFINE_RES_IRQ(evt2irq(0x420)), evt2irq 200 arch/sh/kernel/cpu/sh4a/setup-sh7366.c DEFINE_RES_IRQ(evt2irq(0x440)), evt2irq 149 arch/sh/kernel/cpu/sh4a/setup-sh7722.c .start = evt2irq(0xbc0), evt2irq 150 arch/sh/kernel/cpu/sh4a/setup-sh7722.c .end = evt2irq(0xbc0), evt2irq 155 arch/sh/kernel/cpu/sh4a/setup-sh7722.c .start = evt2irq(0x800), evt2irq 156 arch/sh/kernel/cpu/sh4a/setup-sh7722.c .end = evt2irq(0x860), evt2irq 161 arch/sh/kernel/cpu/sh4a/setup-sh7722.c .start = evt2irq(0xb80), evt2irq 162 arch/sh/kernel/cpu/sh4a/setup-sh7722.c .end = evt2irq(0xba0), evt2irq 187 arch/sh/kernel/cpu/sh4a/setup-sh7722.c DEFINE_RES_IRQ(evt2irq(0xc00)), evt2irq 209 arch/sh/kernel/cpu/sh4a/setup-sh7722.c DEFINE_RES_IRQ(evt2irq(0xc20)), evt2irq 231 arch/sh/kernel/cpu/sh4a/setup-sh7722.c DEFINE_RES_IRQ(evt2irq(0xc40)), evt2irq 252 arch/sh/kernel/cpu/sh4a/setup-sh7722.c .start = evt2irq(0x7a0), evt2irq 257 arch/sh/kernel/cpu/sh4a/setup-sh7722.c .start = evt2irq(0x7c0), evt2irq 262 arch/sh/kernel/cpu/sh4a/setup-sh7722.c .start = evt2irq(0x780), evt2irq 286 arch/sh/kernel/cpu/sh4a/setup-sh7722.c .start = evt2irq(0xa20), evt2irq 287 arch/sh/kernel/cpu/sh4a/setup-sh7722.c .end = evt2irq(0xa20), evt2irq 312 arch/sh/kernel/cpu/sh4a/setup-sh7722.c .start = evt2irq(0xe00), evt2irq 313 arch/sh/kernel/cpu/sh4a/setup-sh7722.c .end = evt2irq(0xe60), evt2irq 328 arch/sh/kernel/cpu/sh4a/setup-sh7722.c .irq = evt2irq(0x980), evt2irq 356 arch/sh/kernel/cpu/sh4a/setup-sh7722.c .irq = evt2irq(0x8c0), evt2irq 384 arch/sh/kernel/cpu/sh4a/setup-sh7722.c .irq = evt2irq(0x560), evt2irq 415 arch/sh/kernel/cpu/sh4a/setup-sh7722.c DEFINE_RES_IRQ(evt2irq(0xf00)), evt2irq 434 arch/sh/kernel/cpu/sh4a/setup-sh7722.c DEFINE_RES_IRQ(evt2irq(0x400)), evt2irq 435 arch/sh/kernel/cpu/sh4a/setup-sh7722.c DEFINE_RES_IRQ(evt2irq(0x420)), evt2irq 436 arch/sh/kernel/cpu/sh4a/setup-sh7722.c DEFINE_RES_IRQ(evt2irq(0x440)), evt2irq 463 arch/sh/kernel/cpu/sh4a/setup-sh7722.c .start = evt2irq(0xf80), evt2irq 30 arch/sh/kernel/cpu/sh4a/setup-sh7723.c DEFINE_RES_IRQ(evt2irq(0xc00)), evt2irq 51 arch/sh/kernel/cpu/sh4a/setup-sh7723.c DEFINE_RES_IRQ(evt2irq(0xc20)), evt2irq 72 arch/sh/kernel/cpu/sh4a/setup-sh7723.c DEFINE_RES_IRQ(evt2irq(0xc40)), evt2irq 92 arch/sh/kernel/cpu/sh4a/setup-sh7723.c DEFINE_RES_IRQ(evt2irq(0x900)), evt2irq 112 arch/sh/kernel/cpu/sh4a/setup-sh7723.c DEFINE_RES_IRQ(evt2irq(0xd00)), evt2irq 132 arch/sh/kernel/cpu/sh4a/setup-sh7723.c DEFINE_RES_IRQ(evt2irq(0xfa0)), evt2irq 148 arch/sh/kernel/cpu/sh4a/setup-sh7723.c .irq = evt2irq(0x980), evt2irq 176 arch/sh/kernel/cpu/sh4a/setup-sh7723.c .irq = evt2irq(0x8c0), evt2irq 204 arch/sh/kernel/cpu/sh4a/setup-sh7723.c .irq = evt2irq(0x560), evt2irq 235 arch/sh/kernel/cpu/sh4a/setup-sh7723.c DEFINE_RES_IRQ(evt2irq(0xf00)), evt2irq 254 arch/sh/kernel/cpu/sh4a/setup-sh7723.c DEFINE_RES_IRQ(evt2irq(0x400)), evt2irq 255 arch/sh/kernel/cpu/sh4a/setup-sh7723.c DEFINE_RES_IRQ(evt2irq(0x420)), evt2irq 256 arch/sh/kernel/cpu/sh4a/setup-sh7723.c DEFINE_RES_IRQ(evt2irq(0x440)), evt2irq 275 arch/sh/kernel/cpu/sh4a/setup-sh7723.c DEFINE_RES_IRQ(evt2irq(0x920)), evt2irq 276 arch/sh/kernel/cpu/sh4a/setup-sh7723.c DEFINE_RES_IRQ(evt2irq(0x940)), evt2irq 277 arch/sh/kernel/cpu/sh4a/setup-sh7723.c DEFINE_RES_IRQ(evt2irq(0x960)), evt2irq 298 arch/sh/kernel/cpu/sh4a/setup-sh7723.c .start = evt2irq(0xaa0), evt2irq 303 arch/sh/kernel/cpu/sh4a/setup-sh7723.c .start = evt2irq(0xac0), evt2irq 308 arch/sh/kernel/cpu/sh4a/setup-sh7723.c .start = evt2irq(0xa80), evt2irq 331 arch/sh/kernel/cpu/sh4a/setup-sh7723.c .start = evt2irq(0xa20), evt2irq 332 arch/sh/kernel/cpu/sh4a/setup-sh7723.c .end = evt2irq(0xa20), evt2irq 357 arch/sh/kernel/cpu/sh4a/setup-sh7723.c .start = evt2irq(0xe00), evt2irq 358 arch/sh/kernel/cpu/sh4a/setup-sh7723.c .end = evt2irq(0xe60), evt2irq 216 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .start = evt2irq(0xbc0), evt2irq 217 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .end = evt2irq(0xbc0), evt2irq 222 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .start = evt2irq(0x800), evt2irq 223 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .end = evt2irq(0x860), evt2irq 228 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .start = evt2irq(0xb80), evt2irq 229 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .end = evt2irq(0xba0), evt2irq 250 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .start = evt2irq(0xb40), evt2irq 251 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .end = evt2irq(0xb40), evt2irq 256 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .start = evt2irq(0x700), evt2irq 257 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .end = evt2irq(0x760), evt2irq 262 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .start = evt2irq(0xb00), evt2irq 263 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .end = evt2irq(0xb20), evt2irq 297 arch/sh/kernel/cpu/sh4a/setup-sh7724.c DEFINE_RES_IRQ(evt2irq(0xc00)), evt2irq 318 arch/sh/kernel/cpu/sh4a/setup-sh7724.c DEFINE_RES_IRQ(evt2irq(0xc20)), evt2irq 339 arch/sh/kernel/cpu/sh4a/setup-sh7724.c DEFINE_RES_IRQ(evt2irq(0xc40)), evt2irq 359 arch/sh/kernel/cpu/sh4a/setup-sh7724.c DEFINE_RES_IRQ(evt2irq(0x900)), evt2irq 379 arch/sh/kernel/cpu/sh4a/setup-sh7724.c DEFINE_RES_IRQ(evt2irq(0xd00)), evt2irq 399 arch/sh/kernel/cpu/sh4a/setup-sh7724.c DEFINE_RES_IRQ(evt2irq(0xfa0)), evt2irq 421 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .start = evt2irq(0xaa0), evt2irq 426 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .start = evt2irq(0xac0), evt2irq 431 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .start = evt2irq(0xa80), evt2irq 452 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .start = evt2irq(0xe00), evt2irq 453 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .end = evt2irq(0xe60), evt2irq 474 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .start = evt2irq(0xd80), evt2irq 475 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .end = evt2irq(0xde0), evt2irq 491 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .irq = evt2irq(0x980), evt2irq 520 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .irq = evt2irq(0xc60), evt2irq 549 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .irq = evt2irq(0x8c0), evt2irq 578 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .irq = evt2irq(0x8A0), evt2irq 607 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .irq = evt2irq(0xA00), evt2irq 638 arch/sh/kernel/cpu/sh4a/setup-sh7724.c DEFINE_RES_IRQ(evt2irq(0xf00)), evt2irq 657 arch/sh/kernel/cpu/sh4a/setup-sh7724.c DEFINE_RES_IRQ(evt2irq(0x400)), evt2irq 658 arch/sh/kernel/cpu/sh4a/setup-sh7724.c DEFINE_RES_IRQ(evt2irq(0x420)), evt2irq 659 arch/sh/kernel/cpu/sh4a/setup-sh7724.c DEFINE_RES_IRQ(evt2irq(0x440)), evt2irq 678 arch/sh/kernel/cpu/sh4a/setup-sh7724.c DEFINE_RES_IRQ(evt2irq(0x920)), evt2irq 679 arch/sh/kernel/cpu/sh4a/setup-sh7724.c DEFINE_RES_IRQ(evt2irq(0x940)), evt2irq 680 arch/sh/kernel/cpu/sh4a/setup-sh7724.c DEFINE_RES_IRQ(evt2irq(0x960)), evt2irq 697 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .irq = evt2irq(0x560), evt2irq 726 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .irq = evt2irq(0xcc0), evt2irq 755 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .irq = evt2irq(0xce0), evt2irq 32 arch/sh/kernel/cpu/sh4a/setup-sh7734.c DEFINE_RES_IRQ(evt2irq(0x8c0)), evt2irq 53 arch/sh/kernel/cpu/sh4a/setup-sh7734.c DEFINE_RES_IRQ(evt2irq(0x8e0)), evt2irq 74 arch/sh/kernel/cpu/sh4a/setup-sh7734.c DEFINE_RES_IRQ(evt2irq(0x900)), evt2irq 95 arch/sh/kernel/cpu/sh4a/setup-sh7734.c DEFINE_RES_IRQ(evt2irq(0x920)), evt2irq 116 arch/sh/kernel/cpu/sh4a/setup-sh7734.c DEFINE_RES_IRQ(evt2irq(0x940)), evt2irq 137 arch/sh/kernel/cpu/sh4a/setup-sh7734.c DEFINE_RES_IRQ(evt2irq(0x960)), evt2irq 159 arch/sh/kernel/cpu/sh4a/setup-sh7734.c .start = evt2irq(0xC00), evt2irq 180 arch/sh/kernel/cpu/sh4a/setup-sh7734.c .start = evt2irq(0x860), evt2irq 199 arch/sh/kernel/cpu/sh4a/setup-sh7734.c DEFINE_RES_IRQ(evt2irq(0x400)), evt2irq 200 arch/sh/kernel/cpu/sh4a/setup-sh7734.c DEFINE_RES_IRQ(evt2irq(0x420)), evt2irq 201 arch/sh/kernel/cpu/sh4a/setup-sh7734.c DEFINE_RES_IRQ(evt2irq(0x440)), evt2irq 220 arch/sh/kernel/cpu/sh4a/setup-sh7734.c DEFINE_RES_IRQ(evt2irq(0x480)), evt2irq 221 arch/sh/kernel/cpu/sh4a/setup-sh7734.c DEFINE_RES_IRQ(evt2irq(0x4a0)), evt2irq 222 arch/sh/kernel/cpu/sh4a/setup-sh7734.c DEFINE_RES_IRQ(evt2irq(0x4c0)), evt2irq 241 arch/sh/kernel/cpu/sh4a/setup-sh7734.c DEFINE_RES_IRQ(evt2irq(0x500)), evt2irq 242 arch/sh/kernel/cpu/sh4a/setup-sh7734.c DEFINE_RES_IRQ(evt2irq(0x520)), evt2irq 243 arch/sh/kernel/cpu/sh4a/setup-sh7734.c DEFINE_RES_IRQ(evt2irq(0x540)), evt2irq 30 arch/sh/kernel/cpu/sh4a/setup-sh7757.c DEFINE_RES_IRQ(evt2irq(0x700)), evt2irq 50 arch/sh/kernel/cpu/sh4a/setup-sh7757.c DEFINE_RES_IRQ(evt2irq(0xb80)), evt2irq 70 arch/sh/kernel/cpu/sh4a/setup-sh7757.c DEFINE_RES_IRQ(evt2irq(0xf00)), evt2irq 89 arch/sh/kernel/cpu/sh4a/setup-sh7757.c DEFINE_RES_IRQ(evt2irq(0x580)), evt2irq 90 arch/sh/kernel/cpu/sh4a/setup-sh7757.c DEFINE_RES_IRQ(evt2irq(0x5a0)), evt2irq 110 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .start = evt2irq(0xcc0), evt2irq 454 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .start = evt2irq(0x640), evt2irq 455 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .end = evt2irq(0x640), evt2irq 476 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .start = evt2irq(0x640), evt2irq 477 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .end = evt2irq(0x640), evt2irq 482 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .start = evt2irq(0x7c0), evt2irq 483 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .end = evt2irq(0x7c0), evt2irq 488 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .start = evt2irq(0x7c0), evt2irq 489 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .end = evt2irq(0x7c0), evt2irq 494 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .start = evt2irq(0xd00), evt2irq 495 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .end = evt2irq(0xd00), evt2irq 500 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .start = evt2irq(0xd00), evt2irq 501 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .end = evt2irq(0xd00), evt2irq 506 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .start = evt2irq(0xd00), evt2irq 507 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .end = evt2irq(0xd00), evt2irq 512 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .start = evt2irq(0xd00), evt2irq 513 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .end = evt2irq(0xd00), evt2irq 518 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .start = evt2irq(0xd00), evt2irq 519 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .end = evt2irq(0xd00), evt2irq 524 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .start = evt2irq(0xd00), evt2irq 525 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .end = evt2irq(0xd00), evt2irq 546 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .start = evt2irq(0x2a60), evt2irq 547 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .end = evt2irq(0x2a60), evt2irq 552 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .start = evt2irq(0x2400), evt2irq 553 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .end = evt2irq(0x2480), evt2irq 558 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .start = evt2irq(0x24e0), evt2irq 559 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .end = evt2irq(0x24e0), evt2irq 580 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .start = evt2irq(0x2a80), evt2irq 581 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .end = evt2irq(0x2a80), evt2irq 586 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .start = evt2irq(0x2500), evt2irq 587 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .end = evt2irq(0x2580), evt2irq 592 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .start = evt2irq(0x2600), evt2irq 593 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .end = evt2irq(0x2600), evt2irq 656 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .start = evt2irq(0x8c0), evt2irq 675 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .start = evt2irq(0x1d80), evt2irq 694 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .start = evt2irq(0x920), evt2irq 695 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .end = evt2irq(0x920), evt2irq 718 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .start = evt2irq(0x920), evt2irq 719 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .end = evt2irq(0x920), evt2irq 26 arch/sh/kernel/cpu/sh4a/setup-sh7763.c DEFINE_RES_IRQ(evt2irq(0x700)), evt2irq 47 arch/sh/kernel/cpu/sh4a/setup-sh7763.c DEFINE_RES_IRQ(evt2irq(0xb80)), evt2irq 68 arch/sh/kernel/cpu/sh4a/setup-sh7763.c DEFINE_RES_IRQ(evt2irq(0xf00)), evt2irq 89 arch/sh/kernel/cpu/sh4a/setup-sh7763.c .start = evt2irq(0x480), evt2irq 108 arch/sh/kernel/cpu/sh4a/setup-sh7763.c .start = evt2irq(0xc60), evt2irq 109 arch/sh/kernel/cpu/sh4a/setup-sh7763.c .end = evt2irq(0xc60), evt2irq 137 arch/sh/kernel/cpu/sh4a/setup-sh7763.c .start = evt2irq(0xc80), evt2irq 138 arch/sh/kernel/cpu/sh4a/setup-sh7763.c .end = evt2irq(0xc80), evt2irq 160 arch/sh/kernel/cpu/sh4a/setup-sh7763.c DEFINE_RES_IRQ(evt2irq(0x580)), evt2irq 161 arch/sh/kernel/cpu/sh4a/setup-sh7763.c DEFINE_RES_IRQ(evt2irq(0x5a0)), evt2irq 162 arch/sh/kernel/cpu/sh4a/setup-sh7763.c DEFINE_RES_IRQ(evt2irq(0x5c0)), evt2irq 181 arch/sh/kernel/cpu/sh4a/setup-sh7763.c DEFINE_RES_IRQ(evt2irq(0xe00)), evt2irq 182 arch/sh/kernel/cpu/sh4a/setup-sh7763.c DEFINE_RES_IRQ(evt2irq(0xe20)), evt2irq 183 arch/sh/kernel/cpu/sh4a/setup-sh7763.c DEFINE_RES_IRQ(evt2irq(0xe40)), evt2irq 22 arch/sh/kernel/cpu/sh4a/setup-sh7770.c DEFINE_RES_IRQ(evt2irq(0x9a0)), evt2irq 42 arch/sh/kernel/cpu/sh4a/setup-sh7770.c DEFINE_RES_IRQ(evt2irq(0x9c0)), evt2irq 62 arch/sh/kernel/cpu/sh4a/setup-sh7770.c DEFINE_RES_IRQ(evt2irq(0x9e0)), evt2irq 82 arch/sh/kernel/cpu/sh4a/setup-sh7770.c DEFINE_RES_IRQ(evt2irq(0xa00)), evt2irq 102 arch/sh/kernel/cpu/sh4a/setup-sh7770.c DEFINE_RES_IRQ(evt2irq(0xa20)), evt2irq 122 arch/sh/kernel/cpu/sh4a/setup-sh7770.c DEFINE_RES_IRQ(evt2irq(0xa40)), evt2irq 142 arch/sh/kernel/cpu/sh4a/setup-sh7770.c DEFINE_RES_IRQ(evt2irq(0xa60)), evt2irq 162 arch/sh/kernel/cpu/sh4a/setup-sh7770.c DEFINE_RES_IRQ(evt2irq(0xa80)), evt2irq 182 arch/sh/kernel/cpu/sh4a/setup-sh7770.c DEFINE_RES_IRQ(evt2irq(0xaa0)), evt2irq 202 arch/sh/kernel/cpu/sh4a/setup-sh7770.c DEFINE_RES_IRQ(evt2irq(0xac0)), evt2irq 221 arch/sh/kernel/cpu/sh4a/setup-sh7770.c DEFINE_RES_IRQ(evt2irq(0x400)), evt2irq 222 arch/sh/kernel/cpu/sh4a/setup-sh7770.c DEFINE_RES_IRQ(evt2irq(0x420)), evt2irq 223 arch/sh/kernel/cpu/sh4a/setup-sh7770.c DEFINE_RES_IRQ(evt2irq(0x440)), evt2irq 242 arch/sh/kernel/cpu/sh4a/setup-sh7770.c DEFINE_RES_IRQ(evt2irq(0x460)), evt2irq 243 arch/sh/kernel/cpu/sh4a/setup-sh7770.c DEFINE_RES_IRQ(evt2irq(0x480)), evt2irq 244 arch/sh/kernel/cpu/sh4a/setup-sh7770.c DEFINE_RES_IRQ(evt2irq(0x4a0)), evt2irq 263 arch/sh/kernel/cpu/sh4a/setup-sh7770.c DEFINE_RES_IRQ(evt2irq(0x4c0)), evt2irq 264 arch/sh/kernel/cpu/sh4a/setup-sh7770.c DEFINE_RES_IRQ(evt2irq(0x4e0)), evt2irq 265 arch/sh/kernel/cpu/sh4a/setup-sh7770.c DEFINE_RES_IRQ(evt2irq(0x500)), evt2irq 25 arch/sh/kernel/cpu/sh4a/setup-sh7780.c DEFINE_RES_IRQ(evt2irq(0x700)), evt2irq 46 arch/sh/kernel/cpu/sh4a/setup-sh7780.c DEFINE_RES_IRQ(evt2irq(0xb80)), evt2irq 65 arch/sh/kernel/cpu/sh4a/setup-sh7780.c DEFINE_RES_IRQ(evt2irq(0x580)), evt2irq 66 arch/sh/kernel/cpu/sh4a/setup-sh7780.c DEFINE_RES_IRQ(evt2irq(0x5a0)), evt2irq 67 arch/sh/kernel/cpu/sh4a/setup-sh7780.c DEFINE_RES_IRQ(evt2irq(0x5c0)), evt2irq 86 arch/sh/kernel/cpu/sh4a/setup-sh7780.c DEFINE_RES_IRQ(evt2irq(0xe00)), evt2irq 87 arch/sh/kernel/cpu/sh4a/setup-sh7780.c DEFINE_RES_IRQ(evt2irq(0xe20)), evt2irq 88 arch/sh/kernel/cpu/sh4a/setup-sh7780.c DEFINE_RES_IRQ(evt2irq(0xe40)), evt2irq 109 arch/sh/kernel/cpu/sh4a/setup-sh7780.c .start = evt2irq(0x480), evt2irq 211 arch/sh/kernel/cpu/sh4a/setup-sh7780.c .start = evt2irq(0x640), evt2irq 212 arch/sh/kernel/cpu/sh4a/setup-sh7780.c .end = evt2irq(0x640), evt2irq 231 arch/sh/kernel/cpu/sh4a/setup-sh7780.c .start = evt2irq(0x7c0), evt2irq 232 arch/sh/kernel/cpu/sh4a/setup-sh7780.c .end = evt2irq(0x7c0), evt2irq 27 arch/sh/kernel/cpu/sh4a/setup-sh7785.c DEFINE_RES_IRQ(evt2irq(0x700)), evt2irq 48 arch/sh/kernel/cpu/sh4a/setup-sh7785.c DEFINE_RES_IRQ(evt2irq(0x780)), evt2irq 69 arch/sh/kernel/cpu/sh4a/setup-sh7785.c DEFINE_RES_IRQ(evt2irq(0x980)), evt2irq 90 arch/sh/kernel/cpu/sh4a/setup-sh7785.c DEFINE_RES_IRQ(evt2irq(0x9a0)), evt2irq 111 arch/sh/kernel/cpu/sh4a/setup-sh7785.c DEFINE_RES_IRQ(evt2irq(0x9c0)), evt2irq 132 arch/sh/kernel/cpu/sh4a/setup-sh7785.c DEFINE_RES_IRQ(evt2irq(0x9e0)), evt2irq 151 arch/sh/kernel/cpu/sh4a/setup-sh7785.c DEFINE_RES_IRQ(evt2irq(0x580)), evt2irq 152 arch/sh/kernel/cpu/sh4a/setup-sh7785.c DEFINE_RES_IRQ(evt2irq(0x5a0)), evt2irq 153 arch/sh/kernel/cpu/sh4a/setup-sh7785.c DEFINE_RES_IRQ(evt2irq(0x5c0)), evt2irq 172 arch/sh/kernel/cpu/sh4a/setup-sh7785.c DEFINE_RES_IRQ(evt2irq(0xe00)), evt2irq 173 arch/sh/kernel/cpu/sh4a/setup-sh7785.c DEFINE_RES_IRQ(evt2irq(0xe20)), evt2irq 174 arch/sh/kernel/cpu/sh4a/setup-sh7785.c DEFINE_RES_IRQ(evt2irq(0xe40)), evt2irq 277 arch/sh/kernel/cpu/sh4a/setup-sh7785.c .start = evt2irq(0x620), evt2irq 278 arch/sh/kernel/cpu/sh4a/setup-sh7785.c .end = evt2irq(0x620), evt2irq 297 arch/sh/kernel/cpu/sh4a/setup-sh7785.c .start = evt2irq(0x880), evt2irq 298 arch/sh/kernel/cpu/sh4a/setup-sh7785.c .end = evt2irq(0x880), evt2irq 35 arch/sh/kernel/cpu/sh4a/setup-sh7786.c DEFINE_RES_IRQ(evt2irq(0x700)), evt2irq 36 arch/sh/kernel/cpu/sh4a/setup-sh7786.c DEFINE_RES_IRQ(evt2irq(0x720)), evt2irq 37 arch/sh/kernel/cpu/sh4a/setup-sh7786.c DEFINE_RES_IRQ(evt2irq(0x760)), evt2irq 38 arch/sh/kernel/cpu/sh4a/setup-sh7786.c DEFINE_RES_IRQ(evt2irq(0x740)), evt2irq 62 arch/sh/kernel/cpu/sh4a/setup-sh7786.c DEFINE_RES_IRQ(evt2irq(0x780)), evt2irq 92 arch/sh/kernel/cpu/sh4a/setup-sh7786.c DEFINE_RES_IRQ(evt2irq(0x840)), evt2irq 113 arch/sh/kernel/cpu/sh4a/setup-sh7786.c DEFINE_RES_IRQ(evt2irq(0x860)), evt2irq 134 arch/sh/kernel/cpu/sh4a/setup-sh7786.c DEFINE_RES_IRQ(evt2irq(0x880)), evt2irq 155 arch/sh/kernel/cpu/sh4a/setup-sh7786.c DEFINE_RES_IRQ(evt2irq(0x8a0)), evt2irq 174 arch/sh/kernel/cpu/sh4a/setup-sh7786.c DEFINE_RES_IRQ(evt2irq(0x400)), evt2irq 175 arch/sh/kernel/cpu/sh4a/setup-sh7786.c DEFINE_RES_IRQ(evt2irq(0x420)), evt2irq 176 arch/sh/kernel/cpu/sh4a/setup-sh7786.c DEFINE_RES_IRQ(evt2irq(0x440)), evt2irq 195 arch/sh/kernel/cpu/sh4a/setup-sh7786.c DEFINE_RES_IRQ(evt2irq(0x480)), evt2irq 196 arch/sh/kernel/cpu/sh4a/setup-sh7786.c DEFINE_RES_IRQ(evt2irq(0x4a0)), evt2irq 197 arch/sh/kernel/cpu/sh4a/setup-sh7786.c DEFINE_RES_IRQ(evt2irq(0x4c0)), evt2irq 216 arch/sh/kernel/cpu/sh4a/setup-sh7786.c DEFINE_RES_IRQ(evt2irq(0x7a0)), evt2irq 217 arch/sh/kernel/cpu/sh4a/setup-sh7786.c DEFINE_RES_IRQ(evt2irq(0x7a0)), evt2irq 218 arch/sh/kernel/cpu/sh4a/setup-sh7786.c DEFINE_RES_IRQ(evt2irq(0x7a0)), evt2irq 237 arch/sh/kernel/cpu/sh4a/setup-sh7786.c DEFINE_RES_IRQ(evt2irq(0x7c0)), evt2irq 238 arch/sh/kernel/cpu/sh4a/setup-sh7786.c DEFINE_RES_IRQ(evt2irq(0x7c0)), evt2irq 239 arch/sh/kernel/cpu/sh4a/setup-sh7786.c DEFINE_RES_IRQ(evt2irq(0x7c0)), evt2irq 308 arch/sh/kernel/cpu/sh4a/setup-sh7786.c .start = evt2irq(0x5c0), evt2irq 309 arch/sh/kernel/cpu/sh4a/setup-sh7786.c .end = evt2irq(0x5c0), evt2irq 313 arch/sh/kernel/cpu/sh4a/setup-sh7786.c .start = evt2irq(0x500), evt2irq 314 arch/sh/kernel/cpu/sh4a/setup-sh7786.c .end = evt2irq(0x5a0), evt2irq 339 arch/sh/kernel/cpu/sh4a/setup-sh7786.c .start = evt2irq(0xba0), evt2irq 340 arch/sh/kernel/cpu/sh4a/setup-sh7786.c .end = evt2irq(0xba0), evt2irq 363 arch/sh/kernel/cpu/sh4a/setup-sh7786.c .start = evt2irq(0xba0), evt2irq 364 arch/sh/kernel/cpu/sh4a/setup-sh7786.c .end = evt2irq(0xba0), evt2irq 34 arch/sh/kernel/cpu/sh4a/setup-shx3.c DEFINE_RES_IRQ(evt2irq(0x700)), evt2irq 35 arch/sh/kernel/cpu/sh4a/setup-shx3.c DEFINE_RES_IRQ(evt2irq(0x720)), evt2irq 36 arch/sh/kernel/cpu/sh4a/setup-shx3.c DEFINE_RES_IRQ(evt2irq(0x760)), evt2irq 37 arch/sh/kernel/cpu/sh4a/setup-shx3.c DEFINE_RES_IRQ(evt2irq(0x740)), evt2irq 57 arch/sh/kernel/cpu/sh4a/setup-shx3.c DEFINE_RES_IRQ(evt2irq(0x780)), evt2irq 58 arch/sh/kernel/cpu/sh4a/setup-shx3.c DEFINE_RES_IRQ(evt2irq(0x7a0)), evt2irq 59 arch/sh/kernel/cpu/sh4a/setup-shx3.c DEFINE_RES_IRQ(evt2irq(0x7e0)), evt2irq 60 arch/sh/kernel/cpu/sh4a/setup-shx3.c DEFINE_RES_IRQ(evt2irq(0x7c0)), evt2irq 80 arch/sh/kernel/cpu/sh4a/setup-shx3.c DEFINE_RES_IRQ(evt2irq(0x880)), evt2irq 81 arch/sh/kernel/cpu/sh4a/setup-shx3.c DEFINE_RES_IRQ(evt2irq(0x8a0)), evt2irq 82 arch/sh/kernel/cpu/sh4a/setup-shx3.c DEFINE_RES_IRQ(evt2irq(0x8e0)), evt2irq 83 arch/sh/kernel/cpu/sh4a/setup-shx3.c DEFINE_RES_IRQ(evt2irq(0x8c0)), evt2irq 102 arch/sh/kernel/cpu/sh4a/setup-shx3.c DEFINE_RES_IRQ(evt2irq(0x400)), evt2irq 103 arch/sh/kernel/cpu/sh4a/setup-shx3.c DEFINE_RES_IRQ(evt2irq(0x420)), evt2irq 104 arch/sh/kernel/cpu/sh4a/setup-shx3.c DEFINE_RES_IRQ(evt2irq(0x440)), evt2irq 123 arch/sh/kernel/cpu/sh4a/setup-shx3.c DEFINE_RES_IRQ(evt2irq(0x460)), evt2irq 124 arch/sh/kernel/cpu/sh4a/setup-shx3.c DEFINE_RES_IRQ(evt2irq(0x480)), evt2irq 125 arch/sh/kernel/cpu/sh4a/setup-shx3.c DEFINE_RES_IRQ(evt2irq(0x4a0)), evt2irq 313 drivers/sh/intc/core.c unsigned int irq = evt2irq(vect->vect); evt2irq 338 drivers/sh/intc/core.c unsigned int irq2 = evt2irq(vect2->vect); evt2irq 34 drivers/sh/intc/irqdomain.c *out_hwirq = evt2irq(intspec[0]); evt2irq 52 drivers/sh/intc/irqdomain.c irq_base = evt2irq(hw->vectors[0].vect); evt2irq 53 drivers/sh/intc/irqdomain.c irq_end = evt2irq(hw->vectors[hw->nr_vectors - 1].vect);