CI                 39 arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c 	CI(ver_code, VERSION);
CI                 70 arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c 	CI(pvr_user1, USER1);
CI                 71 arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c 	CI(pvr_user2, USER2);
CI                 73 arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c 	CI(mmu, USE_MMU);
CI                 74 arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c 	CI(mmu_privins, MMU_PRIVINS);
CI                 75 arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c 	CI(endian, ENDIAN);
CI                 77 arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c 	CI(use_icache, USE_ICACHE);
CI                 78 arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c 	CI(icache_tagbits, ICACHE_ADDR_TAG_BITS);
CI                 79 arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c 	CI(icache_write, ICACHE_ALLOW_WR);
CI                 81 arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c 	CI(icache_size, ICACHE_BYTE_SIZE);
CI                 82 arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c 	CI(icache_base, ICACHE_BASEADDR);
CI                 83 arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c 	CI(icache_high, ICACHE_HIGHADDR);
CI                 85 arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c 	CI(use_dcache, USE_DCACHE);
CI                 86 arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c 	CI(dcache_tagbits, DCACHE_ADDR_TAG_BITS);
CI                 87 arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c 	CI(dcache_write, DCACHE_ALLOW_WR);
CI                 89 arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c 	CI(dcache_size, DCACHE_BYTE_SIZE);
CI                 90 arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c 	CI(dcache_base, DCACHE_BASEADDR);
CI                 91 arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c 	CI(dcache_high, DCACHE_HIGHADDR);
CI                 98 arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c 	CI(use_dopb, D_OPB);
CI                 99 arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c 	CI(use_iopb, I_OPB);
CI                100 arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c 	CI(use_dlmb, D_LMB);
CI                101 arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c 	CI(use_ilmb, I_LMB);
CI                102 arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c 	CI(num_fsl, FSL_LINKS);
CI                104 arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c 	CI(irq_edge, INTERRUPT_IS_EDGE);
CI                105 arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c 	CI(irq_positive, EDGE_IS_POSITIVE);
CI                107 arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c 	CI(area_optimised, AREA_OPTIMISED);
CI                109 arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c 	CI(hw_debug, DEBUG_ENABLED);
CI                110 arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c 	CI(num_pc_brk, NUMBER_OF_PC_BRK);
CI                111 arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c 	CI(num_rd_brk, NUMBER_OF_RD_ADDR_BRK);
CI                112 arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c 	CI(num_wr_brk, NUMBER_OF_WR_ADDR_BRK);
CI                114 arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c 	CI(fpga_family_code, TARGET_FAMILY);
CI                724 drivers/net/ethernet/huawei/hinic/hinic_hw_cmdq.c 		HINIC_CMDQ_CTXT_BLOCK_INFO_SET(atomic_read(&wq->cons_idx), CI);
CI                136 drivers/net/ethernet/huawei/hinic/hinic_hw_qp.c 		HINIC_SQ_CTXT_PREF_SET(ci_start, CI) |
CI                180 drivers/net/ethernet/huawei/hinic/hinic_hw_qp.c 				HINIC_RQ_CTXT_WQ_PAGE_SET(ci_start, CI);
CI                193 drivers/net/ethernet/huawei/hinic/hinic_hw_qp.c 		HINIC_RQ_CTXT_PREF_SET(ci_start, CI);
CI                 99 drivers/scsi/pm8001/pm8001_defs.h #define OB			(CI + PM8001_MAX_SPCV_INB_NUM)
CI                234 drivers/scsi/pm8001/pm8001_hwi.c 			pm8001_ha->memoryMap.region[CI + i].phys_addr_hi;
CI                236 drivers/scsi/pm8001/pm8001_hwi.c 			pm8001_ha->memoryMap.region[CI + i].phys_addr_lo;
CI                238 drivers/scsi/pm8001/pm8001_hwi.c 			pm8001_ha->memoryMap.region[CI + i].virt_ptr;
CI                277 drivers/scsi/pm8001/pm8001_init.c 		pm8001_ha->memoryMap.region[CI+i].num_elements = 1;
CI                278 drivers/scsi/pm8001/pm8001_init.c 		pm8001_ha->memoryMap.region[CI+i].element_size = 4;
CI                279 drivers/scsi/pm8001/pm8001_init.c 		pm8001_ha->memoryMap.region[CI+i].total_len = 4;
CI                280 drivers/scsi/pm8001/pm8001_init.c 		pm8001_ha->memoryMap.region[CI+i].alignment = 4;
CI                511 drivers/scsi/pm8001/pm80xx_hwi.c 			pm8001_ha->memoryMap.region[CI + i].phys_addr_hi;
CI                513 drivers/scsi/pm8001/pm80xx_hwi.c 			pm8001_ha->memoryMap.region[CI + i].phys_addr_lo;
CI                515 drivers/scsi/pm8001/pm80xx_hwi.c 			pm8001_ha->memoryMap.region[CI + i].virt_ptr;
CI                 58 tools/perf/util/c++/clang.cpp 	CompilerInvocation *CI = tooling::newInvocation(&Diags, CCArgs);
CI                 60 tools/perf/util/c++/clang.cpp 	FrontendOptions& Opts = CI->getFrontendOpts();
CI                 64 tools/perf/util/c++/clang.cpp 	return CI;
CI                 77 tools/perf/util/c++/clang.cpp 	IntrusiveRefCntPtr<CompilerInvocation> CI =
CI                 80 tools/perf/util/c++/clang.cpp 	Clang.setInvocation(&*CI);
CI                 82 tools/perf/util/c++/clang.cpp 	std::shared_ptr<CompilerInvocation> CI(
CI                 85 tools/perf/util/c++/clang.cpp 	Clang.setInvocation(CI);