enable_fbc        485 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c 	.enable_fbc = dce110_compressor_enable_fbc,
enable_fbc       1874 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 		compr->funcs->enable_fbc(compr, &params);
enable_fbc       2103 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 		enable_fbc(dc, dc->current_state);
enable_fbc       2634 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 		enable_fbc(dc, context);
enable_fbc         67 drivers/gpu/drm/amd/display/dc/inc/compressor.h 	void (*enable_fbc)(struct compressor *cp,
enable_fbc       13757 drivers/gpu/drm/i915/display/intel_display.c 	if (new_crtc_state->update_pipe && !new_crtc_state->enable_fbc)
enable_fbc        913 drivers/gpu/drm/i915/display/intel_display_types.h 	bool enable_fbc;
enable_fbc        814 drivers/gpu/drm/i915/display/intel_fbc.c 	if (!i915_modparams.enable_fbc) {
enable_fbc        923 drivers/gpu/drm/i915/display/intel_fbc.c 	if (!i915_modparams.enable_fbc) {
enable_fbc       1059 drivers/gpu/drm/i915/display/intel_fbc.c 		crtc_state->enable_fbc = true;
enable_fbc       1097 drivers/gpu/drm/i915/display/intel_fbc.c 			WARN_ON(!crtc_state->enable_fbc);
enable_fbc       1103 drivers/gpu/drm/i915/display/intel_fbc.c 	if (!crtc_state->enable_fbc)
enable_fbc       1279 drivers/gpu/drm/i915/display/intel_fbc.c 	if (i915_modparams.enable_fbc >= 0)
enable_fbc       1280 drivers/gpu/drm/i915/display/intel_fbc.c 		return !!i915_modparams.enable_fbc;
enable_fbc       1325 drivers/gpu/drm/i915/display/intel_fbc.c 	i915_modparams.enable_fbc = intel_sanitize_fbc_option(dev_priv);
enable_fbc       1327 drivers/gpu/drm/i915/display/intel_fbc.c 		      i915_modparams.enable_fbc);
enable_fbc         51 drivers/gpu/drm/i915/i915_params.c i915_param_named_unsafe(enable_fbc, int, 0600,
enable_fbc         52 drivers/gpu/drm/i915/i915_params.h 	param(int, enable_fbc, -1) \