emma2rh_in32       30 arch/mips/emma/markeins/irq.c 	reg_value = emma2rh_in32(reg_index);
emma2rh_in32       42 arch/mips/emma/markeins/irq.c 	reg_value = emma2rh_in32(reg_index);
emma2rh_in32       68 arch/mips/emma/markeins/irq.c 	reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
emma2rh_in32       78 arch/mips/emma/markeins/irq.c 	reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
emma2rh_in32      104 arch/mips/emma/markeins/irq.c 	reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
emma2rh_in32      114 arch/mips/emma/markeins/irq.c 	reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
emma2rh_in32      133 arch/mips/emma/markeins/irq.c 	reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
emma2rh_in32      173 arch/mips/emma/markeins/irq.c 	intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_0) &
emma2rh_in32      174 arch/mips/emma/markeins/irq.c 		    emma2rh_in32(EMMA2RH_BHIF_INT_EN_0);
emma2rh_in32      179 arch/mips/emma/markeins/irq.c 		swIntStatus = emma2rh_in32(EMMA2RH_BHIF_SW_INT)
emma2rh_in32      180 arch/mips/emma/markeins/irq.c 		    & emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
emma2rh_in32      199 arch/mips/emma/markeins/irq.c 	intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_1) &
emma2rh_in32      200 arch/mips/emma/markeins/irq.c 		    emma2rh_in32(EMMA2RH_BHIF_INT_EN_1);
emma2rh_in32      205 arch/mips/emma/markeins/irq.c 		gpioIntStatus = emma2rh_in32(EMMA2RH_GPIO_INT_ST)
emma2rh_in32      206 arch/mips/emma/markeins/irq.c 		    & emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
emma2rh_in32      225 arch/mips/emma/markeins/irq.c 	intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_2) &
emma2rh_in32      226 arch/mips/emma/markeins/irq.c 		    emma2rh_in32(EMMA2RH_BHIF_INT_EN_2);
emma2rh_in32      255 arch/mips/emma/markeins/irq.c 	reg = emma2rh_in32(EMMA2RH_GPIO_DIR);
emma2rh_in32      258 arch/mips/emma/markeins/irq.c 	reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
emma2rh_in32      261 arch/mips/emma/markeins/irq.c 	reg = emma2rh_in32(EMMA2RH_GPIO_INT_MODE);
emma2rh_in32      263 arch/mips/emma/markeins/irq.c 	reg = emma2rh_in32(EMMA2RH_GPIO_INT_CND_A);
emma2rh_in32       29 arch/mips/emma/markeins/led.c 	if (emma2rh_in32(0xb0000800) & (0x1 << 18))
emma2rh_in32       55 arch/mips/emma/markeins/setup.c 	reg = emma2rh_in32(EMMA2RH_BHIF_STRAP_0);
emma2rh_in32       67 arch/mips/emma/markeins/setup.c 	reg = emma2rh_in32(EMMA2RH_BHIF_STRAP_0);
emma2rh_in32       71 arch/mips/emma/markeins/setup.c 		reg = emma2rh_in32(EMMA2RH_BHIF_MAIN_CTRL);
emma2rh_in32      108 arch/mips/emma/markeins/setup.c 	val = emma2rh_in32(EMMA2RH_PBRD_INT_EN);	/* open serial interrupts. */
emma2rh_in32      110 arch/mips/emma/markeins/setup.c 	val = emma2rh_in32(EMMA2RH_PBRD_CLKSEL);	/* set serial clocks. */
emma2rh_in32       82 arch/mips/pci/ops-emma2rh.c 	backup_win0 = emma2rh_in32(EMMA2RH_PCI_IWIN0_CTR);
emma2rh_in32      108 arch/mips/pci/ops-emma2rh.c 	if (emma2rh_in32(EMMA2RH_PCI_INT) & RMABORT)
emma2rh_in32      126 arch/mips/pci/ops-emma2rh.c 	backup_win0 = emma2rh_in32(EMMA2RH_PCI_IWIN0_CTR);
emma2rh_in32      158 arch/mips/pci/ops-emma2rh.c 	if (emma2rh_in32(EMMA2RH_PCI_INT) & RMABORT)