edp_phy            23 drivers/gpu/drm/msm/edp/edp.h struct edp_phy;
edp_phy            55 drivers/gpu/drm/msm/edp/edp.h bool msm_edp_phy_ready(struct edp_phy *phy);
edp_phy            56 drivers/gpu/drm/msm/edp/edp.h void msm_edp_phy_ctrl(struct edp_phy *phy, int enable);
edp_phy            57 drivers/gpu/drm/msm/edp/edp.h void msm_edp_phy_vm_pe_init(struct edp_phy *phy);
edp_phy            58 drivers/gpu/drm/msm/edp/edp.h void msm_edp_phy_vm_pe_cfg(struct edp_phy *phy, u32 v0, u32 v1);
edp_phy            59 drivers/gpu/drm/msm/edp/edp.h void msm_edp_phy_lane_power_ctrl(struct edp_phy *phy, bool up, u32 max_lane);
edp_phy           110 drivers/gpu/drm/msm/edp/edp_ctrl.c 	struct edp_phy *phy;
edp_phy            15 drivers/gpu/drm/msm/edp/edp_phy.c bool msm_edp_phy_ready(struct edp_phy *phy)
edp_phy            36 drivers/gpu/drm/msm/edp/edp_phy.c void msm_edp_phy_ctrl(struct edp_phy *phy, int enable)
edp_phy            55 drivers/gpu/drm/msm/edp/edp_phy.c void msm_edp_phy_vm_pe_init(struct edp_phy *phy)
edp_phy            62 drivers/gpu/drm/msm/edp/edp_phy.c void msm_edp_phy_vm_pe_cfg(struct edp_phy *phy, u32 v0, u32 v1)
edp_phy            68 drivers/gpu/drm/msm/edp/edp_phy.c void msm_edp_phy_lane_power_ctrl(struct edp_phy *phy, bool up, u32 max_lane)
edp_phy            89 drivers/gpu/drm/msm/edp/edp_phy.c 	struct edp_phy *phy = NULL;