dsi_phy_tst_set   385 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	dsi_phy_tst_set(base, CLK_TLPX, phy->clk_t_lpx);
dsi_phy_tst_set   386 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	dsi_phy_tst_set(base, CLK_THS_PREPARE, phy->clk_t_hs_prepare);
dsi_phy_tst_set   387 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	dsi_phy_tst_set(base, CLK_THS_ZERO, phy->clk_t_hs_zero);
dsi_phy_tst_set   388 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	dsi_phy_tst_set(base, CLK_THS_TRAIL, phy->clk_t_hs_trial);
dsi_phy_tst_set   389 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	dsi_phy_tst_set(base, CLK_TWAKEUP, phy->clk_t_wakeup);
dsi_phy_tst_set   396 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 		dsi_phy_tst_set(base, DATA_TLPX(i), phy->data_t_lpx);
dsi_phy_tst_set   397 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 		dsi_phy_tst_set(base, DATA_THS_PREPARE(i),
dsi_phy_tst_set   399 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 		dsi_phy_tst_set(base, DATA_THS_ZERO(i), phy->data_t_hs_zero);
dsi_phy_tst_set   400 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 		dsi_phy_tst_set(base, DATA_THS_TRAIL(i), phy->data_t_hs_trial);
dsi_phy_tst_set   401 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 		dsi_phy_tst_set(base, DATA_TTA_GO(i), phy->data_t_ta_go);
dsi_phy_tst_set   402 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 		dsi_phy_tst_set(base, DATA_TTA_GET(i), phy->data_t_ta_get);
dsi_phy_tst_set   403 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 		dsi_phy_tst_set(base, DATA_TWAKEUP(i), phy->data_t_wakeup);
dsi_phy_tst_set   410 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	dsi_phy_tst_set(base, PHY_CFG_I, phy->hstx_ckg_sel);
dsi_phy_tst_set   413 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	dsi_phy_tst_set(base, PHY_CFG_PLL_I, val);
dsi_phy_tst_set   414 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	dsi_phy_tst_set(base, PHY_CFG_PLL_II, phy->pll_fbd_p);
dsi_phy_tst_set   415 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	dsi_phy_tst_set(base, PHY_CFG_PLL_III, phy->pll_fbd_s);
dsi_phy_tst_set   417 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	dsi_phy_tst_set(base, PHY_CFG_PLL_IV, val);
dsi_phy_tst_set   420 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	dsi_phy_tst_set(base, PHY_CFG_PLL_V, val);