dsc_config       1876 drivers/gpu/drm/amd/display/dc/core/dc.c 	if (update->dsc_config) {
dsc_config       1879 drivers/gpu/drm/amd/display/dc/core/dc.c 		uint32_t enable_dsc = (update->dsc_config->num_slices_h != 0 &&
dsc_config       1880 drivers/gpu/drm/amd/display/dc/core/dc.c 				       update->dsc_config->num_slices_v != 0);
dsc_config       1882 drivers/gpu/drm/amd/display/dc/core/dc.c 		stream->timing.dsc_cfg = *update->dsc_config;
dsc_config       1949 drivers/gpu/drm/amd/display/dc/core/dc.c 			if (stream_update->dsc_config && dc->hwss.pipe_control_lock_global) {
dsc_config        394 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c 		struct dsc_config dsc_cfg;
dsc_config        496 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c 		struct dsc_config dsc_cfg;
dsc_config        245 drivers/gpu/drm/amd/display/dc/dc_stream.h 	struct dc_dsc_config *dsc_config;
dsc_config         32 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c static bool dsc_prepare_config(const struct dsc_config *dsc_cfg, struct dsc_reg_values *dsc_reg_vals,
dsc_config         43 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c static bool dsc2_validate_stream(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg);
dsc_config         44 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c static void dsc2_set_config(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg,
dsc_config         46 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c static bool dsc2_get_packed_pps(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg, uint8_t *dsc_packed_pps);
dsc_config        164 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c static bool dsc2_validate_stream(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg)
dsc_config        176 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c static void dsc_config_log(struct display_stream_compressor *dsc, const struct dsc_config *config)
dsc_config        187 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c static void dsc2_set_config(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg,
dsc_config        204 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c static bool dsc2_get_packed_pps(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg, uint8_t *dsc_packed_pps)
dsc_config        307 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c static bool dsc_prepare_config(const struct dsc_config *dsc_cfg, struct dsc_reg_values *dsc_reg_vals,
dsc_config       2261 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		struct dsc_config dsc_cfg;
dsc_config         93 drivers/gpu/drm/amd/display/dc/inc/hw/dsc.h 	bool (*dsc_validate_stream)(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg);
dsc_config         94 drivers/gpu/drm/amd/display/dc/inc/hw/dsc.h 	void (*dsc_set_config)(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg,
dsc_config         96 drivers/gpu/drm/amd/display/dc/inc/hw/dsc.h 	bool (*dsc_get_packed_pps)(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg,