dsaf_set_dev_bit 67 drivers/net/ethernet/hisilicon/hns/hns_dsaf_gmac.c dsaf_set_dev_bit(drv, GMAC_PORT_EN_REG, GMAC_PORT_TX_EN_B, 1); dsaf_set_dev_bit 71 drivers/net/ethernet/hisilicon/hns/hns_dsaf_gmac.c dsaf_set_dev_bit(drv, GMAC_PCS_RX_EN_REG, 0, 0); dsaf_set_dev_bit 72 drivers/net/ethernet/hisilicon/hns/hns_dsaf_gmac.c dsaf_set_dev_bit(drv, GMAC_PORT_EN_REG, GMAC_PORT_RX_EN_B, 1); dsaf_set_dev_bit 82 drivers/net/ethernet/hisilicon/hns/hns_dsaf_gmac.c dsaf_set_dev_bit(drv, GMAC_PORT_EN_REG, GMAC_PORT_TX_EN_B, 0); dsaf_set_dev_bit 86 drivers/net/ethernet/hisilicon/hns/hns_dsaf_gmac.c dsaf_set_dev_bit(drv, GMAC_PCS_RX_EN_REG, 0, 1); dsaf_set_dev_bit 87 drivers/net/ethernet/hisilicon/hns/hns_dsaf_gmac.c dsaf_set_dev_bit(drv, GMAC_PORT_EN_REG, GMAC_PORT_RX_EN_B, 0); dsaf_set_dev_bit 137 drivers/net/ethernet/hisilicon/hns/hns_dsaf_gmac.c dsaf_set_dev_bit(drv, GMAC_PAUSE_EN_REG, dsaf_set_dev_bit 167 drivers/net/ethernet/hisilicon/hns/hns_dsaf_gmac.c dsaf_set_dev_bit(drv, GMAC_TRANSMIT_CONTROL_REG, dsaf_set_dev_bit 186 drivers/net/ethernet/hisilicon/hns/hns_dsaf_gmac.c dsaf_set_dev_bit(drv, GMAC_DUPLEX_TYPE_REG, dsaf_set_dev_bit 277 drivers/net/ethernet/hisilicon/hns/hns_dsaf_gmac.c dsaf_set_dev_bit(drv, GMAC_DUPLEX_TYPE_REG, dsaf_set_dev_bit 310 drivers/net/ethernet/hisilicon/hns/hns_dsaf_gmac.c dsaf_set_dev_bit(drv, GMAC_REC_FILT_CONTROL_REG, dsaf_set_dev_bit 312 drivers/net/ethernet/hisilicon/hns/hns_dsaf_gmac.c dsaf_set_dev_bit(drv, GMAC_STATION_ADDR_HIGH_2_REG, dsaf_set_dev_bit 368 drivers/net/ethernet/hisilicon/hns/hns_dsaf_gmac.c dsaf_set_dev_bit(drv, GMAC_MODE_CHANGE_EN_REG, dsaf_set_dev_bit 493 drivers/net/ethernet/hisilicon/hns/hns_dsaf_gmac.c dsaf_set_dev_bit(drv, GMAC_LOOP_REG, GMAC_LP_REG_CF2MI_LP_EN_B, dsaf_set_dev_bit 214 drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c dsaf_set_dev_bit(dsaf_dev, DSAF_CFG_0_REG, DSAF_CFG_SBM_INIT_S, 1); dsaf_set_dev_bit 225 drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c dsaf_set_dev_bit(dsaf_dev, DSAF_DSA_REG_CNT_CLR_CE_REG, dsaf_set_dev_bit 357 drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c dsaf_set_dev_bit(dsaf_dev, reg, DSAF_SBM_CFG_MIB_EN_S, 0); dsaf_set_dev_bit 362 drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c dsaf_set_dev_bit(dsaf_dev, reg, DSAF_SBM_CFG_MIB_EN_S, 1); dsaf_set_dev_bit 765 drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c dsaf_set_dev_bit(dsaf_dev, DSAF_CFG_0_REG, dsaf_set_dev_bit 793 drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c dsaf_set_dev_bit(dsaf_dev, DSAF_XGE_CTRL_SIG_CFG_0_REG, dsaf_set_dev_bit 1177 drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c dsaf_set_dev_bit(dsaf_dev, DSAF_PAUSE_CFG_REG + mac_id * 4, dsaf_set_dev_bit 1179 drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c dsaf_set_dev_bit(dsaf_dev, DSAF_PAUSE_CFG_REG + mac_id * 4, dsaf_set_dev_bit 1193 drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c dsaf_set_dev_bit(dsaf_dev, DSAF_PAUSE_CFG_REG + mac_id * 4, dsaf_set_dev_bit 20 drivers/net/ethernet/hisilicon/hns/hns_dsaf_ppe.c dsaf_set_dev_bit(ppe_cb, PPEV2_CFG_TSO_EN_REG, 0, !!value); dsaf_set_dev_bit 135 drivers/net/ethernet/hisilicon/hns/hns_dsaf_ppe.c dsaf_set_dev_bit(ppe_cb, PPE_TNL_0_5_CNT_CLR_CE_REG, dsaf_set_dev_bit 250 drivers/net/ethernet/hisilicon/hns/hns_dsaf_ppe.c dsaf_set_dev_bit(ppe_common, PPE_COM_COMMON_CNT_CLR_CE_REG, dsaf_set_dev_bit 405 drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.c dsaf_set_dev_bit(rcb_common, RCBV2_COM_CFG_USER_REG, dsaf_set_dev_bit 407 drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.c dsaf_set_dev_bit(rcb_common, RCBV2_COM_CFG_USER_REG, dsaf_set_dev_bit 409 drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.c dsaf_set_dev_bit(rcb_common, RCBV2_COM_CFG_TSO_MODE_REG, dsaf_set_dev_bit 93 drivers/net/ethernet/hisilicon/hns/hns_dsaf_xgmac.c dsaf_set_dev_bit(drv, XGMAC_MAC_ENABLE_REG, XGMAC_ENABLE_TX_B, !!value); dsaf_set_dev_bit 103 drivers/net/ethernet/hisilicon/hns/hns_dsaf_xgmac.c dsaf_set_dev_bit(drv, XGMAC_MAC_ENABLE_REG, XGMAC_ENABLE_RX_B, !!value); dsaf_set_dev_bit 277 drivers/net/ethernet/hisilicon/hns/hns_dsaf_xgmac.c dsaf_set_dev_bit(drv, XGMAC_MAC_PAUSE_CTRL_REG, dsaf_set_dev_bit 290 drivers/net/ethernet/hisilicon/hns/hns_dsaf_xgmac.c dsaf_set_dev_bit(drv, XGMAC_MAC_PAUSE_CTRL_REG,