CHAN_MASK          50 drivers/mailbox/pl320-ipc.c 	writel_relaxed(CHAN_MASK(source), ipc_base + IPCMxDSET(mbox));
CHAN_MASK          51 drivers/mailbox/pl320-ipc.c 	writel_relaxed(CHAN_MASK(source), ipc_base + IPCMxMSET(mbox));
CHAN_MASK          56 drivers/mailbox/pl320-ipc.c 	writel_relaxed(CHAN_MASK(source), ipc_base + IPCMxDCLEAR(mbox));
CHAN_MASK          57 drivers/mailbox/pl320-ipc.c 	writel_relaxed(CHAN_MASK(source), ipc_base + IPCMxMCLEAR(mbox));
CHAN_MASK         146 drivers/mailbox/pl320-ipc.c 	writel_relaxed(CHAN_MASK(A9_SOURCE),
CHAN_MASK         148 drivers/mailbox/pl320-ipc.c 	writel_relaxed(CHAN_MASK(M3_SOURCE),
CHAN_MASK         150 drivers/mailbox/pl320-ipc.c 	writel_relaxed(CHAN_MASK(M3_SOURCE) | CHAN_MASK(A9_SOURCE),
CHAN_MASK         154 drivers/mailbox/pl320-ipc.c 	writel_relaxed(CHAN_MASK(M3_SOURCE),
CHAN_MASK         156 drivers/mailbox/pl320-ipc.c 	writel_relaxed(CHAN_MASK(A9_SOURCE),
CHAN_MASK         158 drivers/mailbox/pl320-ipc.c 	writel_relaxed(CHAN_MASK(M3_SOURCE) | CHAN_MASK(A9_SOURCE),