drm_rect_width 159 drivers/gpu/drm/armada/armada_overlay.c if (drm_rect_width(&old_state->src) != drm_rect_width(&state->src) || drm_rect_width 160 drivers/gpu/drm/armada/armada_overlay.c drm_rect_width(&old_state->dst) != drm_rect_width(&state->dst)) { drm_rect_width 162 drivers/gpu/drm/armada/armada_overlay.c if (drm_rect_width(&state->src) >> 16 != drm_rect_width 163 drivers/gpu/drm/armada/armada_overlay.c drm_rect_width(&state->dst)) drm_rect_width 146 drivers/gpu/drm/armada/armada_plane.c st->src_hw |= drm_rect_width(&state->src) >> 16; drm_rect_width 150 drivers/gpu/drm/armada/armada_plane.c st->dst_hw |= drm_rect_width(&state->dst) & 0x0000ffff; drm_rect_width 229 drivers/gpu/drm/armada/armada_plane.c if (drm_rect_width(&old_state->src) != drm_rect_width(&state->src) || drm_rect_width 230 drivers/gpu/drm/armada/armada_plane.c drm_rect_width(&old_state->dst) != drm_rect_width(&state->dst)) { drm_rect_width 232 drivers/gpu/drm/armada/armada_plane.c if (drm_rect_width(&state->src) >> 16 != drm_rect_width 233 drivers/gpu/drm/armada/armada_plane.c drm_rect_width(&state->dst)) drm_rect_width 622 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c state->src_w = drm_rect_width(&s->src); drm_rect_width 626 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c state->crtc_w = drm_rect_width(&s->dst); drm_rect_width 119 drivers/gpu/drm/drm_plane_helper.c .src_w = drm_rect_width(src), drm_rect_width 123 drivers/gpu/drm/drm_plane_helper.c .crtc_w = drm_rect_width(dst), drm_rect_width 94 drivers/gpu/drm/drm_rect.c u32 new_src_w = clip_scaled(drm_rect_width(src), drm_rect_width 95 drivers/gpu/drm/drm_rect.c drm_rect_width(dst), diff); drm_rect_width 110 drivers/gpu/drm/drm_rect.c u32 new_src_w = clip_scaled(drm_rect_width(src), drm_rect_width 111 drivers/gpu/drm/drm_rect.c drm_rect_width(dst), diff); drm_rect_width 168 drivers/gpu/drm/drm_rect.c int src_w = drm_rect_width(src); drm_rect_width 169 drivers/gpu/drm/drm_rect.c int dst_w = drm_rect_width(dst); drm_rect_width 2813 drivers/gpu/drm/i915/display/intel_display.c src_w = drm_rect_width(&plane_state->base.src) >> 16; drm_rect_width 3395 drivers/gpu/drm/i915/display/intel_display.c int w = drm_rect_width(&plane_state->base.src) >> 16; drm_rect_width 3489 drivers/gpu/drm/i915/display/intel_display.c int w = drm_rect_width(&plane_state->base.src) >> 17; drm_rect_width 3705 drivers/gpu/drm/i915/display/intel_display.c int src_w = drm_rect_width(&plane_state->base.src) >> 16; drm_rect_width 3786 drivers/gpu/drm/i915/display/intel_display.c int crtc_w = drm_rect_width(&plane_state->base.dst); drm_rect_width 5548 drivers/gpu/drm/i915/display/intel_display.c drm_rect_width(&plane_state->base.src) >> 16, drm_rect_width 5550 drivers/gpu/drm/i915/display/intel_display.c drm_rect_width(&plane_state->base.dst), drm_rect_width 11482 drivers/gpu/drm/i915/display/intel_display.c drm_rect_width(&new->base.src) != drm_rect_width(&cur->base.src) || drm_rect_width 11484 drivers/gpu/drm/i915/display/intel_display.c drm_rect_width(&new->base.dst) != drm_rect_width(&cur->base.dst) || drm_rect_width 11493 drivers/gpu/drm/i915/display/intel_display.c int src_w = drm_rect_width(&state->base.src) >> 16; drm_rect_width 11495 drivers/gpu/drm/i915/display/intel_display.c int dst_w = drm_rect_width(&state->base.dst); drm_rect_width 679 drivers/gpu/drm/i915/display/intel_fbc.c cache->plane.src_w = drm_rect_width(&plane_state->base.src) >> 16; drm_rect_width 299 drivers/gpu/drm/i915/display/intel_sprite.c src_w = drm_rect_width(src) >> 16; drm_rect_width 370 drivers/gpu/drm/i915/display/intel_sprite.c u32 crtc_w = drm_rect_width(&plane_state->base.dst); drm_rect_width 555 drivers/gpu/drm/i915/display/intel_sprite.c u32 src_w = drm_rect_width(&plane_state->base.src) >> 16; drm_rect_width 943 drivers/gpu/drm/i915/display/intel_sprite.c u32 crtc_w = drm_rect_width(&plane_state->base.dst); drm_rect_width 1159 drivers/gpu/drm/i915/display/intel_sprite.c u32 crtc_w = drm_rect_width(&plane_state->base.dst); drm_rect_width 1163 drivers/gpu/drm/i915/display/intel_sprite.c u32 src_w = drm_rect_width(&plane_state->base.src) >> 16; drm_rect_width 1412 drivers/gpu/drm/i915/display/intel_sprite.c u32 crtc_w = drm_rect_width(&plane_state->base.dst); drm_rect_width 1416 drivers/gpu/drm/i915/display/intel_sprite.c u32 src_w = drm_rect_width(&plane_state->base.src) >> 16; drm_rect_width 1536 drivers/gpu/drm/i915/display/intel_sprite.c crtc_w = drm_rect_width(dst); drm_rect_width 1540 drivers/gpu/drm/i915/display/intel_sprite.c src_w = drm_rect_width(src) >> 16; drm_rect_width 1763 drivers/gpu/drm/i915/display/intel_sprite.c int crtc_w = drm_rect_width(&plane_state->base.dst); drm_rect_width 1791 drivers/gpu/drm/i915/display/intel_sprite.c int src_w = drm_rect_width(&plane_state->base.src) >> 16; drm_rect_width 1151 drivers/gpu/drm/i915/intel_pm.c width = drm_rect_width(&plane_state->base.dst); drm_rect_width 2527 drivers/gpu/drm/i915/intel_pm.c drm_rect_width(&plane_state->base.dst), drm_rect_width 2555 drivers/gpu/drm/i915/intel_pm.c drm_rect_width(&plane_state->base.dst), drm_rect_width 2595 drivers/gpu/drm/i915/intel_pm.c return ilk_wm_fbc(pri_val, drm_rect_width(&plane_state->base.dst), cpp); drm_rect_width 3145 drivers/gpu/drm/i915/intel_pm.c (drm_rect_width(&sprstate->base.dst) != drm_rect_width(&sprstate->base.src) >> 16 || drm_rect_width 4098 drivers/gpu/drm/i915/intel_pm.c src_w = drm_rect_width(&plane_state->base.src) >> 16; drm_rect_width 4100 drivers/gpu/drm/i915/intel_pm.c dst_w = drm_rect_width(&plane_state->base.dst); drm_rect_width 4230 drivers/gpu/drm/i915/intel_pm.c width = drm_rect_width(&plane_state->base.src) >> 16; drm_rect_width 4746 drivers/gpu/drm/i915/intel_pm.c width = drm_rect_width(&plane_state->base.src) >> 16; drm_rect_width 384 drivers/gpu/drm/imx/ipuv3-plane.c if (drm_rect_width(&state->dst) < 13) drm_rect_width 405 drivers/gpu/drm/imx/ipuv3-plane.c (drm_rect_width(&state->dst) != drm_rect_width(&old_state->dst) || drm_rect_width 593 drivers/gpu/drm/imx/ipuv3-plane.c drm_rect_width(&state->src) >> 16, drm_rect_width 626 drivers/gpu/drm/imx/ipuv3-plane.c ipu_dmfc_config_wait4eot(ipu_plane->dmfc, drm_rect_width(dst)); drm_rect_width 628 drivers/gpu/drm/imx/ipuv3-plane.c width = drm_rect_width(&state->src) >> 16; drm_rect_width 692 drivers/gpu/drm/imx/ipuv3-plane.c drm_rect_width(&state->src) >> 16, drm_rect_width 133 drivers/gpu/drm/mediatek/mtk_drm_plane.c state->pending.width = drm_rect_width(&plane->state->dst); drm_rect_width 107 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c cfg.out_width = drm_rect_width(lm_roi); drm_rect_width 1018 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c } else if (right_rect.x1 != drm_rect_width(&left_rect)) { drm_rect_width 458 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c drm_rect_width(&cfg->src_rect); drm_rect_width 461 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c drm_rect_width(&cfg->dst_rect); drm_rect_width 159 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c drm_rect_width(&tmp->pipe_cfg.src_rect)); drm_rect_width 161 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c drm_rect_width(&tmp->pipe_cfg.src_rect)); drm_rect_width 237 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c drm_rect_width(&pdpu->pipe_cfg.src_rect)); drm_rect_width 379 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c ot_params.width = drm_rect_width(&pdpu->pipe_cfg.src_rect); drm_rect_width 557 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c drm_rect_width(&pdpu->pipe_cfg.src_rect), drm_rect_width 559 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c drm_rect_width(&pdpu->pipe_cfg.dst_rect), drm_rect_width 597 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c drm_rect_width(&pdpu->pipe_cfg.dst_rect); drm_rect_width 704 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c drm_rect_width(&src[i]) > width_threshold) drm_rect_width 828 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c if (drm_rect_width(fb_rect) > MAX_IMG_WIDTH || drm_rect_width 833 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c if (drm_rect_width(src) < min_src_size || drm_rect_width 900 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c drm_rect_width(&src) & 0x1 || drm_rect_width 907 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c } else if (drm_rect_width(&dst) < 0x1 || drm_rect_height(&dst) < 0x1) { drm_rect_width 913 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c } else if (drm_rect_width(&src) > max_linewidth) { drm_rect_width 948 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c src_w = drm_rect_width(src); drm_rect_width 953 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c crtc_w = drm_rect_width(dest); drm_rect_width 356 drivers/gpu/drm/rcar-du/rcar_du_plane.c pitch = drm_rect_width(&state->state.src) >> 16; drm_rect_width 528 drivers/gpu/drm/rcar-du/rcar_du_plane.c rcar_du_plane_write(rgrp, index, PnDSXR, drm_rect_width(dst)); drm_rect_width 164 drivers/gpu/drm/rcar-du/rcar_du_vsp.c cfg.src.width = drm_rect_width(&state->state.src) >> 16; drm_rect_width 169 drivers/gpu/drm/rcar-du/rcar_du_vsp.c cfg.dst.width = drm_rect_width(&state->state.dst); drm_rect_width 822 drivers/gpu/drm/rockchip/rockchip_drm_vop.c actual_w = drm_rect_width(src) >> 16; drm_rect_width 827 drivers/gpu/drm/rockchip/rockchip_drm_vop.c dsp_info |= (drm_rect_width(dest) - 1) & 0xffff; drm_rect_width 882 drivers/gpu/drm/rockchip/rockchip_drm_vop.c drm_rect_width(dest), drm_rect_height(dest), drm_rect_width 41 drivers/gpu/drm/selftests/test-drm_plane_helper.c drm_rect_width(&plane_state->src) != src_w || drm_rect_width 66 drivers/gpu/drm/selftests/test-drm_plane_helper.c drm_rect_width(&plane_state->dst) != crtc_w || drm_rect_width 91 drivers/gpu/drm/sun4i/sun8i_ui_layer.c src_w = drm_rect_width(&state->src) >> 16; drm_rect_width 93 drivers/gpu/drm/sun4i/sun8i_ui_layer.c dst_w = drm_rect_width(&state->dst); drm_rect_width 88 drivers/gpu/drm/sun4i/sun8i_vi_layer.c src_w = drm_rect_width(&state->src) >> 16; drm_rect_width 90 drivers/gpu/drm/sun4i/sun8i_vi_layer.c dst_w = drm_rect_width(&state->dst); drm_rect_width 702 drivers/gpu/drm/tegra/dc.c window.src.w = drm_rect_width(&plane->state->src) >> 16; drm_rect_width 706 drivers/gpu/drm/tegra/dc.c window.dst.w = drm_rect_width(&plane->state->dst); drm_rect_width 27 drivers/gpu/drm/vkms/vkms_composer.c int w_src = drm_rect_width(&composer->src) >> 16; drm_rect_width 73 drivers/gpu/drm/vkms/vkms_composer.c int w_dst = drm_rect_width(&src_composer->dst); drm_rect_width 1467 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c (drm_rect_width(&rects[i]) > dev_priv->stdu_max_width || drm_rect_width 1480 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c total_pixels += (u64) drm_rect_width(&rects[i]) * drm_rect_width 2051 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c du->pref_width = drm_rect_width(&rects[du->unit]); drm_rect_width 1235 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c box->w = drm_rect_width(clip); drm_rect_width 1335 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c box->w = drm_rect_width(&diff.rect); drm_rect_width 1464 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c box->w = drm_rect_width(&clip); drm_rect_width 1508 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c box->w = drm_rect_width(clip); drm_rect_width 207 drivers/gpu/drm/zte/zx_plane.c src_w = drm_rect_width(src) >> 16; drm_rect_width 212 drivers/gpu/drm/zte/zx_plane.c dst_w = drm_rect_width(dst); drm_rect_width 53 include/drm/drm_rect.h #define DRM_RECT_ARG(r) drm_rect_width(r), drm_rect_height(r), (r)->x1, (r)->y1 drm_rect_width 67 include/drm/drm_rect.h drm_rect_width(r) >> 16, ((drm_rect_width(r) & 0xffff) * 15625) >> 10, \ drm_rect_width 158 include/drm/drm_rect.h return drm_rect_width(r) > 0 && drm_rect_height(r) > 0;